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23 lines
572 B
23 lines
572 B
/* |
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* Copyright (c) 2023 Synopsys |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#include <zephyr/arch/cpu.h> |
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#include <zephyr/init.h> |
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#define DFSS_SPI0_BASE 0x80010000 |
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#define DFSS_SPI1_BASE 0x80010100 |
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#define REG_CLK_ENA_OFFSET (0x16) /* DFSS only */ |
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/* Enable clock for DFSS SPI0 controller & DFSS SPI1 controller */ |
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static int emsdp_dfss_clock_init(void) |
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{ |
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sys_out32(1, DFSS_SPI0_BASE + REG_CLK_ENA_OFFSET); |
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sys_out32(1, DFSS_SPI1_BASE + REG_CLK_ENA_OFFSET); |
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return 0; |
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} |
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SYS_INIT(emsdp_dfss_clock_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
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