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47 lines
799 B
47 lines
799 B
# MIMX8ML8 SoC defconfig |
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# Copyright (c) 2021, Laird Connectivity |
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# Copyright 2024 NXP |
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# SPDX-License-Identifier: Apache-2.0 |
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if SOC_MIMX8ML8_M7 |
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config SYS_CLOCK_HW_CYCLES_PER_SEC |
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default 800000000 |
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config GPIO |
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default y |
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config IPM_IMX |
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default y |
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depends on IPM |
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if CODE_ITCM |
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config FLASH_SIZE |
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default $(dt_node_reg_size_int,/soc/itcm@0,0,K) |
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config FLASH_BASE_ADDRESS |
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default $(dt_node_reg_addr_hex,/soc/itcm@0) |
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endif # CODE_ITCM |
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if CODE_DDR |
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config FLASH_SIZE |
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default $(dt_node_reg_size_int,/soc/code@80000000,0,K) |
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config FLASH_BASE_ADDRESS |
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default $(dt_node_reg_addr_hex,/soc/code@80000000) |
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endif # CODE_DDR |
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config NUM_IRQS |
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# must be >= the highest interrupt number used |
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default 159 |
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config PINCTRL_IMX |
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default y if HAS_MCUX_IOMUXC |
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depends on PINCTRL |
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endif # SOC_MIMX8ML8_M7
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