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352 lines
8.5 KiB
352 lines
8.5 KiB
/* |
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* Copyright (c) 2024 Vogl Electronic GmbH |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#define DT_DRV_COMPAT litex_litei2c |
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#include <zephyr/device.h> |
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#include <zephyr/drivers/i2c.h> |
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#include <zephyr/logging/log.h> |
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LOG_MODULE_REGISTER(i2c_litex_litei2c, CONFIG_I2C_LOG_LEVEL); |
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#include "i2c-priv.h" |
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#include <soc.h> |
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#define MASTER_STATUS_TX_READY_OFFSET 0x0 |
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#define MASTER_STATUS_RX_READY_OFFSET 0x1 |
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#define MASTER_STATUS_NACK_OFFSET 0x8 |
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struct i2c_litex_litei2c_config { |
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uint32_t phy_speed_mode_addr; |
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uint32_t master_active_addr; |
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uint32_t master_settings_addr; |
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uint32_t master_addr_addr; |
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uint32_t master_rxtx_addr; |
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uint32_t master_status_addr; |
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uint32_t bitrate; |
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}; |
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struct i2c_litex_litei2c_data { |
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struct k_mutex mutex; |
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}; |
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static int i2c_litex_configure(const struct device *dev, uint32_t dev_config) |
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{ |
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const struct i2c_litex_litei2c_config *config = dev->config; |
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struct i2c_litex_litei2c_data *data = dev->data; |
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if (I2C_ADDR_10_BITS & dev_config) { |
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return -ENOTSUP; |
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} |
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if (!(I2C_MODE_CONTROLLER & dev_config)) { |
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return -ENOTSUP; |
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} |
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k_mutex_lock(&data->mutex, K_FOREVER); |
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/* Setup speed to use */ |
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switch (I2C_SPEED_GET(dev_config)) { |
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case I2C_SPEED_STANDARD: |
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litex_write8(0, config->phy_speed_mode_addr); |
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break; |
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case I2C_SPEED_FAST: |
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litex_write8(1, config->phy_speed_mode_addr); |
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break; |
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case I2C_SPEED_FAST_PLUS: |
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litex_write8(2, config->phy_speed_mode_addr); |
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break; |
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default: |
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k_mutex_unlock(&data->mutex); |
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return -ENOTSUP; |
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} |
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k_mutex_unlock(&data->mutex); |
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return 0; |
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} |
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static int i2c_litex_get_config(const struct device *dev, uint32_t *config) |
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{ |
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const struct i2c_litex_litei2c_config *dev_config = dev->config; |
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*config = I2C_MODE_CONTROLLER; |
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switch (litex_read8(dev_config->phy_speed_mode_addr)) { |
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case 0: |
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*config |= I2C_SPEED_SET(I2C_SPEED_STANDARD); |
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break; |
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case 1: |
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*config |= I2C_SPEED_SET(I2C_SPEED_FAST); |
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break; |
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case 2: |
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*config |= I2C_SPEED_SET(I2C_SPEED_FAST_PLUS); |
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break; |
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default: |
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break; |
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} |
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return 0; |
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} |
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static int i2c_litex_write_settings(const struct device *dev, uint8_t len_tx, uint8_t len_rx, |
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bool recover) |
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{ |
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const struct i2c_litex_litei2c_config *config = dev->config; |
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uint32_t settings = len_tx | (len_rx << 8) | (recover << 16); |
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litex_write32(settings, config->master_settings_addr); |
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return 0; |
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} |
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static int i2c_litex_transfer(const struct device *dev, struct i2c_msg *msgs, uint8_t num_msgs, |
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uint16_t addr) |
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{ |
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const struct i2c_litex_litei2c_config *config = dev->config; |
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struct i2c_litex_litei2c_data *data = dev->data; |
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uint32_t len_tx_buf = 0; |
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uint32_t len_rx_buf = 0; |
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uint8_t len_tx = 0; |
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uint8_t len_rx = 0; |
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uint8_t *tx_buf_ptr; |
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uint8_t *rx_buf_ptr; |
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uint32_t tx_buf; |
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uint32_t rx_buf; |
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uint32_t tx_j = 0; |
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uint32_t rx_j = 0; |
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int ret = 0; |
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k_mutex_lock(&data->mutex, K_FOREVER); |
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litex_write8(1, config->master_active_addr); |
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LOG_DBG("addr: 0x%x", addr); |
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litex_write8((uint8_t)addr, config->master_addr_addr); |
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for (uint8_t i = 0; i < num_msgs; i++) { |
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if (msgs[i].flags & I2C_MSG_READ) { |
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len_tx_buf = 0; |
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len_rx_buf = msgs[i].len; |
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rx_buf_ptr = msgs[i].buf; |
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tx_buf_ptr = NULL; |
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} else { |
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len_tx_buf = msgs[i].len; |
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tx_buf_ptr = msgs[i].buf; |
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if (!(msgs[i].flags & I2C_MSG_STOP) && (i + 1 < num_msgs) && |
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(msgs[i + 1].flags & I2C_MSG_READ) && |
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(msgs[i + 1].flags & I2C_MSG_RESTART)) { |
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i++; |
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len_rx_buf = msgs[i].len; |
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rx_buf_ptr = msgs[i].buf; |
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} else { |
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len_rx_buf = 0; |
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rx_buf_ptr = NULL; |
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} |
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} |
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LOG_HEXDUMP_DBG(tx_buf_ptr, len_tx_buf, "tx_buf"); |
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tx_j = 0; |
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rx_j = 0; |
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do { |
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if (len_tx_buf > (tx_j + 4)) { |
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len_tx = 5; |
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len_rx = 0; |
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} else { |
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len_tx = len_tx_buf - tx_j; |
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if (len_rx_buf > (rx_j + 4)) { |
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len_rx = 5; |
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} else { |
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len_rx = len_rx_buf - rx_j; |
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} |
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} |
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tx_buf = 0; |
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switch (len_tx) { |
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case 5: |
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case 4: |
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tx_buf |= tx_buf_ptr[0 + tx_j] << 24; |
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tx_buf |= tx_buf_ptr[1 + tx_j] << 16; |
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tx_buf |= tx_buf_ptr[2 + tx_j] << 8; |
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tx_buf |= tx_buf_ptr[3 + tx_j]; |
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tx_j += 4; |
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break; |
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case 3: |
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tx_buf |= tx_buf_ptr[0 + tx_j] << 16; |
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tx_buf |= tx_buf_ptr[1 + tx_j] << 8; |
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tx_buf |= tx_buf_ptr[2 + tx_j]; |
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tx_j += 3; |
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break; |
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case 2: |
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tx_buf |= tx_buf_ptr[0 + tx_j] << 8; |
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tx_buf |= tx_buf_ptr[1 + tx_j]; |
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tx_j += 2; |
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break; |
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case 1: |
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tx_buf |= tx_buf_ptr[0 + tx_j]; |
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tx_j += 1; |
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break; |
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default: |
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break; |
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} |
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LOG_DBG("len_tx: %d, len_rx: %d", len_tx, len_rx); |
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i2c_litex_write_settings(dev, len_tx, len_rx, false); |
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while (!(litex_read8(config->master_status_addr) & |
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BIT(MASTER_STATUS_TX_READY_OFFSET))) { |
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; |
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} |
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LOG_DBG("tx_buf: 0x%x", tx_buf); |
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litex_write32(tx_buf, config->master_rxtx_addr); |
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while (!(litex_read8(config->master_status_addr) & |
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BIT(MASTER_STATUS_RX_READY_OFFSET))) { |
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; |
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} |
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if (litex_read16(config->master_status_addr) & |
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BIT(MASTER_STATUS_NACK_OFFSET)) { |
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LOG_DBG("NACK received (addr: 0x%x)", addr); |
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ret = -EIO; |
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} |
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rx_buf = litex_read32(config->master_rxtx_addr); |
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LOG_DBG("rx_buf: 0x%x", rx_buf); |
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switch (len_rx) { |
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case 5: |
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case 4: |
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rx_buf_ptr[0 + rx_j] = rx_buf >> 24; |
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rx_buf_ptr[1 + rx_j] = rx_buf >> 16; |
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rx_buf_ptr[2 + rx_j] = rx_buf >> 8; |
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rx_buf_ptr[3 + rx_j] = rx_buf; |
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rx_j += 4; |
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break; |
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case 3: |
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rx_buf_ptr[0 + rx_j] = rx_buf >> 16; |
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rx_buf_ptr[1 + rx_j] = rx_buf >> 8; |
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rx_buf_ptr[2 + rx_j] = rx_buf; |
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rx_j += 3; |
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break; |
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case 2: |
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rx_buf_ptr[0 + rx_j] = rx_buf >> 8; |
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rx_buf_ptr[1 + rx_j] = rx_buf; |
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rx_j += 2; |
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break; |
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case 1: |
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rx_buf_ptr[0 + rx_j] = rx_buf; |
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rx_j += 1; |
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break; |
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default: |
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break; |
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} |
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if (ret < 0) { |
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goto transfer_end; |
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} |
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} while ((tx_j < len_tx_buf) || (rx_j < len_rx_buf)); |
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LOG_HEXDUMP_DBG(rx_buf_ptr, len_rx_buf, "rx_buf"); |
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} |
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transfer_end: |
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litex_write8(0, config->master_active_addr); |
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k_mutex_unlock(&data->mutex); |
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return ret; |
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} |
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static int i2c_litex_recover_bus(const struct device *dev) |
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{ |
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const struct i2c_litex_litei2c_config *config = dev->config; |
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struct i2c_litex_litei2c_data *data = dev->data; |
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k_mutex_lock(&data->mutex, K_FOREVER); |
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litex_write8(1, config->master_active_addr); |
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i2c_litex_write_settings(dev, 0, 0, true); |
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while (!(litex_read8(config->master_status_addr) & BIT(MASTER_STATUS_TX_READY_OFFSET))) { |
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; |
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} |
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litex_write32(0, config->master_rxtx_addr); |
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while (!(litex_read8(config->master_status_addr) & BIT(MASTER_STATUS_RX_READY_OFFSET))) { |
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; |
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} |
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(void)litex_read32(config->master_rxtx_addr); |
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litex_write8(0, config->master_active_addr); |
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k_mutex_unlock(&data->mutex); |
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return 0; |
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} |
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static int i2c_litex_init(const struct device *dev) |
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{ |
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const struct i2c_litex_litei2c_config *config = dev->config; |
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struct i2c_litex_litei2c_data *data = dev->data; |
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int ret; |
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k_mutex_init(&data->mutex); |
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ret = i2c_litex_configure(dev, I2C_MODE_CONTROLLER | i2c_map_dt_bitrate(config->bitrate)); |
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if (ret != 0) { |
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LOG_ERR("failed to configure I2C: %d", ret); |
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} |
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return ret; |
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} |
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static DEVICE_API(i2c, i2c_litex_litei2c_driver_api) = { |
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.configure = i2c_litex_configure, |
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.get_config = i2c_litex_get_config, |
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.transfer = i2c_litex_transfer, |
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.recover_bus = i2c_litex_recover_bus, |
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#ifdef CONFIG_I2C_RTIO |
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.iodev_submit = i2c_iodev_submit_fallback, |
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#endif |
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}; |
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/* Device Instantiation */ |
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#define I2C_LITEX_INIT(n) \ |
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static struct i2c_litex_litei2c_data i2c_litex_litei2c_data_##n; \ |
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\ |
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static const struct i2c_litex_litei2c_config i2c_litex_litei2c_config_##n = { \ |
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.phy_speed_mode_addr = DT_INST_REG_ADDR_BY_NAME(n, phy_speed_mode), \ |
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.master_active_addr = DT_INST_REG_ADDR_BY_NAME(n, master_active), \ |
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.master_settings_addr = DT_INST_REG_ADDR_BY_NAME(n, master_settings), \ |
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.master_addr_addr = DT_INST_REG_ADDR_BY_NAME(n, master_addr), \ |
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.master_rxtx_addr = DT_INST_REG_ADDR_BY_NAME(n, master_rxtx), \ |
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.master_status_addr = DT_INST_REG_ADDR_BY_NAME(n, master_status), \ |
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.bitrate = DT_INST_PROP(n, clock_frequency), \ |
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}; \ |
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\ |
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I2C_DEVICE_DT_INST_DEFINE(n, i2c_litex_init, NULL, &i2c_litex_litei2c_data_##n, \ |
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&i2c_litex_litei2c_config_##n, POST_KERNEL, \ |
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CONFIG_I2C_INIT_PRIORITY, &i2c_litex_litei2c_driver_api); |
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DT_INST_FOREACH_STATUS_OKAY(I2C_LITEX_INIT)
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