Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
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/*
* Copyright (c) 2024-2025 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <mem.h>
#include <freq.h>
#include <zephyr/dt-bindings/adc/adc.h>
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/i2c/i2c.h>
#include <zephyr/dt-bindings/interrupt-controller/esp-esp32c6-intmux.h>
#include <zephyr/dt-bindings/clock/esp32c6_clock.h>
#include <dt-bindings/pinctrl/esp32c6-pinctrl.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
die-temp0 = &coretemp;
};
chosen {
zephyr,canbus = &twai0;
zephyr,entropy = &trng0;
zephyr,flash-controller = &flash;
zephyr,bt-hci = &esp32_bt_hci;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "espressif,riscv";
riscv,isa = "rv32imac_zicsr";
reg = <0>;
cpu-power-states = <&light_sleep &deep_sleep>;
clock-source = <ESP32_CPU_CLK_SRC_PLL>;
clock-frequency = <DT_FREQ_M(160)>;
xtal-freq = <DT_FREQ_M(40)>;
};
power-states {
light_sleep: light_sleep {
compatible = "zephyr,power-state";
power-state-name = "standby";
min-residency-us = <200>;
exit-latency-us = <60>;
};
deep_sleep: deep_sleep {
compatible = "zephyr,power-state";
power-state-name = "soft-off";
min-residency-us = <2000>;
exit-latency-us = <212>;
};
};
};
pinctrl: pin-controller {
compatible = "espressif,esp32-pinctrl";
status = "okay";
};
esp32_bt_hci: esp32_bt_hci {
compatible = "espressif,esp32-bt-hci";
status = "disabled";
};
clock: clock {
compatible = "espressif,esp32-clock";
fast-clk-src = <ESP32_RTC_FAST_CLK_SRC_RC_FAST>;
slow-clk-src = <ESP32_RTC_SLOW_CLK_SRC_RC_SLOW>;
#clock-cells = <1>;
status = "okay";
};
wifi: wifi {
compatible = "espressif,esp32-wifi";
status = "disabled";
};
ieee802154: ieee802154 {
compatible = "espressif,esp32-ieee802154";
status = "disabled";
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges;
sramhp: memory@40800000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x40800000 DT_SIZE_K(512)>;
zephyr,memory-region = "SRAMHP";
};
sramlp: memory@50000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x50000000 DT_SIZE_K(16)>;
zephyr,memory-region = "SRAMLP ";
shmlp: memory@0 {
reg = <0x0 0x10>;
};
};
intc: interrupt-controller@60010000 {
compatible = "espressif,esp32-intc";
#address-cells = <0>;
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x60010000 DT_SIZE_K(4)>;
status = "okay";
};
systimer0: systimer@6000a000 {
compatible = "espressif,esp32-systimer";
reg = <0x6000A000 DT_SIZE_K(4)>;
interrupts = <SYSTIMER_TARGET0_EDGE_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
status = "okay";
};
timer0: counter@60008000 {
compatible = "espressif,esp32-timer";
reg = <0x60008000 DT_SIZE_K(4)>;
clocks = <&clock ESP32_TIMG0_MODULE>;
group = <0>;
index = <0>;
interrupts = <TG0_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
status = "disabled";
counter {
compatible = "espressif,esp32-counter";
status = "disabled";
};
};
timer1: counter@60009000 {
compatible = "espressif,esp32-timer";
reg = <0x60009000 DT_SIZE_K(4)>;
clocks = <&clock ESP32_TIMG1_MODULE>;
group = <1>;
index = <0>;
interrupts = <TG1_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
status = "disabled";
counter {
compatible = "espressif,esp32-counter";
status = "disabled";
};
};
rtc_timer: rtc_timer@600b0c00 {
compatible = "espressif,esp32-rtc_timer";
reg = <0x600B0C00 DT_SIZE_K(1)>;
clocks = <&clock ESP32_MODULE_MAX>;
interrupts = <LP_RTC_TIMER_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
status = "disabled";
};
trng0: trng@600b2808 {
compatible = "espressif,esp32-trng";
reg = <0x600B2808 0x4>;
clocks = <&clock ESP32_RNG_MODULE>;
status = "disabled";
};
twai0: can@6000b000 {
compatible = "espressif,esp32-twai";
reg = <0x6000B000 DT_SIZE_K(4)>;
interrupts = <TWAI0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
clocks = <&clock ESP32_TWAI0_MODULE>;
status = "disabled";
};
twai1: can@6000d000 {
compatible = "espressif,esp32-twai";
reg = <0x6000D000 DT_SIZE_K(4)>;
interrupts = <TWAI1_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
clocks = <&clock ESP32_TWAI1_MODULE>;
status = "disabled";
};
spi2: spi@60081000 {
compatible = "espressif,esp32-spi";
reg = <0x60081000 DT_SIZE_K(4)>;
interrupts = <GSPI2_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
clocks = <&clock ESP32_SPI2_MODULE>;
dma-clk = <ESP32_GDMA_MODULE>;
dma-host = <0>;
status = "disabled";
};
wdt0: watchdog@60008048 {
compatible = "espressif,esp32-watchdog";
reg = <0x60008048 0x20>;
interrupts = <TG0_WDT_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
clocks = <&clock ESP32_TIMG0_MODULE>;
status = "disabled";
};
wdt1: watchdog@60009048 {
compatible = "espressif,esp32-watchdog";
reg = <0x60009048 0x20>;
interrupts = <TG1_WDT_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
clocks = <&clock ESP32_TIMG1_MODULE>;
status = "disabled";
};
flash: flash-controller@60002000 {
compatible = "espressif,esp32-flash-controller";
reg = <0x60002000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
flash0: flash@0 {
compatible = "soc-nv-flash";
erase-block-size = <4096>;
write-block-size = <4>;
/* Flash size is specified in SOC/SIP dtsi */
};
};
coretemp: coretemp@6000e058 {
compatible = "espressif,esp32-temp";
friendly-name = "coretemp";
reg = <0x6000E058 0x4>;
status = "disabled";
};
adc0: adc@6000e000 {
compatible = "espressif,esp32-adc";
reg = <0x6000E000 4>;
clocks = <&clock ESP32_SARADC_MODULE>;
unit = <1>;
channel-count = <7>;
#io-channel-cells = <1>;
status = "disabled";
};
dma: dma@60080000 {
compatible = "espressif,esp32-gdma";
reg = <0x60080000 DT_SIZE_K(4)>;
#dma-cells = <1>;
interrupts =
<DMA_IN_CH0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>,
<DMA_OUT_CH0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>,
<DMA_IN_CH1_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>,
<DMA_OUT_CH1_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>,
<DMA_IN_CH2_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>,
<DMA_OUT_CH2_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
clocks = <&clock ESP32_GDMA_MODULE>;
dma-channels = <6>;
dma-buf-addr-alignment = <4>;
status = "disabled";
};
gpio0: gpio@60091000 {
compatible = "espressif,esp32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x60091000 DT_SIZE_K(4)>;
interrupts = <GPIO_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
ngpios = <30>; /* 0..29 */
};
i2c0: i2c@60004000 {
compatible = "espressif,esp32-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x60004000 0x1000>;
interrupts = <I2C_EXT0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
clocks = <&clock ESP32_I2C0_MODULE>;
status = "disabled";
};
i2s: i2s@6000c000 {
compatible = "espressif,esp32-i2s";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x6000c000 0x1000>;
interrupts = <I2S1_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
clocks = <&clock ESP32_I2S1_MODULE>;
unit = <0>;
status = "disabled";
};
uart0: uart@60000000 {
compatible = "espressif,esp32-uart";
reg = <0x60000000 DT_SIZE_K(4)>;
status = "disabled";
interrupts = <UART0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
clocks = <&clock ESP32_UART0_MODULE>;
};
uart1: uart@60001000 {
compatible = "espressif,esp32-uart";
reg = <0x60001000 DT_SIZE_K(4)>;
status = "disabled";
interrupts = <UART1_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
clocks = <&clock ESP32_UART1_MODULE>;
current-speed = <115200>;
};
lp_uart: uart@600b1400 {
compatible = "espressif,esp32-lpuart";
reg = <0x600b1400 DT_SIZE_K(4)>;
status = "disabled";
current-speed = <115200>;
};
usb_serial: uart@6000f000 {
compatible = "espressif,esp32-usb-serial";
reg = <0x6000F000 0x1000>;
status = "disabled";
interrupts = <USB_SERIAL_JTAG_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
clocks = <&clock ESP32_USB_MODULE>;
};
ledc0: ledc@60007000 {
compatible = "espressif,esp32-ledc";
pwm-controller;
#pwm-cells = <3>;
reg = <0x60007000 0x1000>;
clocks = <&clock ESP32_LEDC_MODULE>;
status = "disabled";
};
mcpwm0: mcpwm@60014000 {
compatible = "espressif,esp32-mcpwm";
reg = <0x60014000 DT_SIZE_K(4)>;
interrupts = <MCPWM0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
clocks = <&clock ESP32_MCPWM0_MODULE>;
#pwm-cells = <3>;
status = "disabled";
};
pcnt: pcnt@60012000 {
compatible = "espressif,esp32-pcnt";
reg = <0x60012000 DT_SIZE_K(4)>;
interrupts = <PCNT_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
clocks = <&clock ESP32_PCNT_MODULE>;
status = "disabled";
};
};
};