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372 lines
9.3 KiB
372 lines
9.3 KiB
/* |
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* Copyright (c) 2024-2025 Espressif Systems (Shanghai) Co., Ltd. |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#include <mem.h> |
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#include <freq.h> |
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#include <zephyr/dt-bindings/adc/adc.h> |
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#include <zephyr/dt-bindings/gpio/gpio.h> |
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#include <zephyr/dt-bindings/i2c/i2c.h> |
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#include <zephyr/dt-bindings/interrupt-controller/esp-esp32c6-intmux.h> |
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#include <zephyr/dt-bindings/clock/esp32c6_clock.h> |
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#include <dt-bindings/pinctrl/esp32c6-pinctrl.h> |
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/ { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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aliases { |
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die-temp0 = &coretemp; |
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}; |
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chosen { |
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zephyr,canbus = &twai0; |
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zephyr,entropy = &trng0; |
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zephyr,flash-controller = &flash; |
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zephyr,bt-hci = &esp32_bt_hci; |
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}; |
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cpus { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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cpu0: cpu@0 { |
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device_type = "cpu"; |
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compatible = "espressif,riscv"; |
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riscv,isa = "rv32imac_zicsr"; |
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reg = <0>; |
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cpu-power-states = <&light_sleep &deep_sleep>; |
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clock-source = <ESP32_CPU_CLK_SRC_PLL>; |
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clock-frequency = <DT_FREQ_M(160)>; |
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xtal-freq = <DT_FREQ_M(40)>; |
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}; |
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power-states { |
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light_sleep: light_sleep { |
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compatible = "zephyr,power-state"; |
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power-state-name = "standby"; |
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min-residency-us = <200>; |
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exit-latency-us = <60>; |
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}; |
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deep_sleep: deep_sleep { |
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compatible = "zephyr,power-state"; |
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power-state-name = "soft-off"; |
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min-residency-us = <2000>; |
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exit-latency-us = <212>; |
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}; |
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}; |
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}; |
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pinctrl: pin-controller { |
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compatible = "espressif,esp32-pinctrl"; |
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status = "okay"; |
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}; |
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esp32_bt_hci: esp32_bt_hci { |
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compatible = "espressif,esp32-bt-hci"; |
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status = "disabled"; |
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}; |
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clock: clock { |
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compatible = "espressif,esp32-clock"; |
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fast-clk-src = <ESP32_RTC_FAST_CLK_SRC_RC_FAST>; |
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slow-clk-src = <ESP32_RTC_SLOW_CLK_SRC_RC_SLOW>; |
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#clock-cells = <1>; |
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status = "okay"; |
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}; |
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wifi: wifi { |
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compatible = "espressif,esp32-wifi"; |
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status = "disabled"; |
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}; |
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ieee802154: ieee802154 { |
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compatible = "espressif,esp32-ieee802154"; |
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status = "disabled"; |
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}; |
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soc { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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compatible = "simple-bus"; |
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ranges; |
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sramhp: memory@40800000 { |
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compatible = "zephyr,memory-region", "mmio-sram"; |
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reg = <0x40800000 DT_SIZE_K(512)>; |
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zephyr,memory-region = "SRAMHP"; |
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}; |
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sramlp: memory@50000000 { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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compatible = "zephyr,memory-region", "mmio-sram"; |
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reg = <0x50000000 DT_SIZE_K(16)>; |
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zephyr,memory-region = "SRAMLP "; |
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shmlp: memory@0 { |
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reg = <0x0 0x10>; |
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}; |
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}; |
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intc: interrupt-controller@60010000 { |
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compatible = "espressif,esp32-intc"; |
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#address-cells = <0>; |
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#interrupt-cells = <3>; |
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interrupt-controller; |
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reg = <0x60010000 DT_SIZE_K(4)>; |
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status = "okay"; |
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}; |
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systimer0: systimer@6000a000 { |
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compatible = "espressif,esp32-systimer"; |
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reg = <0x6000A000 DT_SIZE_K(4)>; |
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interrupts = <SYSTIMER_TARGET0_EDGE_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>; |
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interrupt-parent = <&intc>; |
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status = "okay"; |
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}; |
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timer0: counter@60008000 { |
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compatible = "espressif,esp32-timer"; |
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reg = <0x60008000 DT_SIZE_K(4)>; |
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clocks = <&clock ESP32_TIMG0_MODULE>; |
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group = <0>; |
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index = <0>; |
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interrupts = <TG0_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>; |
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interrupt-parent = <&intc>; |
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status = "disabled"; |
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counter { |
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compatible = "espressif,esp32-counter"; |
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status = "disabled"; |
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}; |
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}; |
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timer1: counter@60009000 { |
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compatible = "espressif,esp32-timer"; |
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reg = <0x60009000 DT_SIZE_K(4)>; |
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clocks = <&clock ESP32_TIMG1_MODULE>; |
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group = <1>; |
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index = <0>; |
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interrupts = <TG1_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>; |
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interrupt-parent = <&intc>; |
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status = "disabled"; |
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counter { |
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compatible = "espressif,esp32-counter"; |
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status = "disabled"; |
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}; |
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}; |
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rtc_timer: rtc_timer@600b0c00 { |
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compatible = "espressif,esp32-rtc_timer"; |
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reg = <0x600B0C00 DT_SIZE_K(1)>; |
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clocks = <&clock ESP32_MODULE_MAX>; |
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interrupts = <LP_RTC_TIMER_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>; |
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interrupt-parent = <&intc>; |
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status = "disabled"; |
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}; |
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trng0: trng@600b2808 { |
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compatible = "espressif,esp32-trng"; |
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reg = <0x600B2808 0x4>; |
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clocks = <&clock ESP32_RNG_MODULE>; |
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status = "disabled"; |
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}; |
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twai0: can@6000b000 { |
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compatible = "espressif,esp32-twai"; |
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reg = <0x6000B000 DT_SIZE_K(4)>; |
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interrupts = <TWAI0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>; |
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interrupt-parent = <&intc>; |
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clocks = <&clock ESP32_TWAI0_MODULE>; |
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status = "disabled"; |
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}; |
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twai1: can@6000d000 { |
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compatible = "espressif,esp32-twai"; |
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reg = <0x6000D000 DT_SIZE_K(4)>; |
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interrupts = <TWAI1_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>; |
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interrupt-parent = <&intc>; |
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clocks = <&clock ESP32_TWAI1_MODULE>; |
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status = "disabled"; |
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}; |
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spi2: spi@60081000 { |
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compatible = "espressif,esp32-spi"; |
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reg = <0x60081000 DT_SIZE_K(4)>; |
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interrupts = <GSPI2_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>; |
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interrupt-parent = <&intc>; |
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clocks = <&clock ESP32_SPI2_MODULE>; |
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dma-clk = <ESP32_GDMA_MODULE>; |
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dma-host = <0>; |
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status = "disabled"; |
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}; |
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wdt0: watchdog@60008048 { |
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compatible = "espressif,esp32-watchdog"; |
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reg = <0x60008048 0x20>; |
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interrupts = <TG0_WDT_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>; |
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interrupt-parent = <&intc>; |
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clocks = <&clock ESP32_TIMG0_MODULE>; |
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status = "disabled"; |
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}; |
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wdt1: watchdog@60009048 { |
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compatible = "espressif,esp32-watchdog"; |
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reg = <0x60009048 0x20>; |
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interrupts = <TG1_WDT_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>; |
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interrupt-parent = <&intc>; |
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clocks = <&clock ESP32_TIMG1_MODULE>; |
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status = "disabled"; |
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}; |
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flash: flash-controller@60002000 { |
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compatible = "espressif,esp32-flash-controller"; |
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reg = <0x60002000 0x1000>; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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flash0: flash@0 { |
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compatible = "soc-nv-flash"; |
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erase-block-size = <4096>; |
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write-block-size = <4>; |
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/* Flash size is specified in SOC/SIP dtsi */ |
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}; |
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}; |
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coretemp: coretemp@6000e058 { |
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compatible = "espressif,esp32-temp"; |
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friendly-name = "coretemp"; |
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reg = <0x6000E058 0x4>; |
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status = "disabled"; |
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}; |
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adc0: adc@6000e000 { |
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compatible = "espressif,esp32-adc"; |
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reg = <0x6000E000 4>; |
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clocks = <&clock ESP32_SARADC_MODULE>; |
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unit = <1>; |
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channel-count = <7>; |
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#io-channel-cells = <1>; |
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status = "disabled"; |
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}; |
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dma: dma@60080000 { |
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compatible = "espressif,esp32-gdma"; |
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reg = <0x60080000 DT_SIZE_K(4)>; |
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#dma-cells = <1>; |
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interrupts = |
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<DMA_IN_CH0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>, |
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<DMA_OUT_CH0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>, |
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<DMA_IN_CH1_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>, |
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<DMA_OUT_CH1_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>, |
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<DMA_IN_CH2_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>, |
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<DMA_OUT_CH2_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>; |
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interrupt-parent = <&intc>; |
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clocks = <&clock ESP32_GDMA_MODULE>; |
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dma-channels = <6>; |
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dma-buf-addr-alignment = <4>; |
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status = "disabled"; |
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}; |
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gpio0: gpio@60091000 { |
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compatible = "espressif,esp32-gpio"; |
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gpio-controller; |
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#gpio-cells = <2>; |
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reg = <0x60091000 DT_SIZE_K(4)>; |
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interrupts = <GPIO_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>; |
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interrupt-parent = <&intc>; |
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ngpios = <30>; /* 0..29 */ |
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}; |
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i2c0: i2c@60004000 { |
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compatible = "espressif,esp32-i2c"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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reg = <0x60004000 0x1000>; |
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interrupts = <I2C_EXT0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>; |
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interrupt-parent = <&intc>; |
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clocks = <&clock ESP32_I2C0_MODULE>; |
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status = "disabled"; |
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}; |
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i2s: i2s@6000c000 { |
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compatible = "espressif,esp32-i2s"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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reg = <0x6000c000 0x1000>; |
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interrupts = <I2S1_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>; |
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interrupt-parent = <&intc>; |
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clocks = <&clock ESP32_I2S1_MODULE>; |
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unit = <0>; |
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status = "disabled"; |
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}; |
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uart0: uart@60000000 { |
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compatible = "espressif,esp32-uart"; |
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reg = <0x60000000 DT_SIZE_K(4)>; |
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status = "disabled"; |
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interrupts = <UART0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>; |
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interrupt-parent = <&intc>; |
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clocks = <&clock ESP32_UART0_MODULE>; |
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}; |
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uart1: uart@60001000 { |
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compatible = "espressif,esp32-uart"; |
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reg = <0x60001000 DT_SIZE_K(4)>; |
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status = "disabled"; |
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interrupts = <UART1_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>; |
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interrupt-parent = <&intc>; |
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clocks = <&clock ESP32_UART1_MODULE>; |
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current-speed = <115200>; |
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}; |
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lp_uart: uart@600b1400 { |
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compatible = "espressif,esp32-lpuart"; |
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reg = <0x600b1400 DT_SIZE_K(4)>; |
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status = "disabled"; |
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current-speed = <115200>; |
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}; |
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usb_serial: uart@6000f000 { |
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compatible = "espressif,esp32-usb-serial"; |
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reg = <0x6000F000 0x1000>; |
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status = "disabled"; |
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interrupts = <USB_SERIAL_JTAG_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>; |
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interrupt-parent = <&intc>; |
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clocks = <&clock ESP32_USB_MODULE>; |
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}; |
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ledc0: ledc@60007000 { |
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compatible = "espressif,esp32-ledc"; |
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pwm-controller; |
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#pwm-cells = <3>; |
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reg = <0x60007000 0x1000>; |
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clocks = <&clock ESP32_LEDC_MODULE>; |
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status = "disabled"; |
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}; |
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mcpwm0: mcpwm@60014000 { |
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compatible = "espressif,esp32-mcpwm"; |
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reg = <0x60014000 DT_SIZE_K(4)>; |
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interrupts = <MCPWM0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>; |
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interrupt-parent = <&intc>; |
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clocks = <&clock ESP32_MCPWM0_MODULE>; |
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#pwm-cells = <3>; |
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status = "disabled"; |
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}; |
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pcnt: pcnt@60012000 { |
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compatible = "espressif,esp32-pcnt"; |
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reg = <0x60012000 DT_SIZE_K(4)>; |
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interrupts = <PCNT_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>; |
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interrupt-parent = <&intc>; |
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clocks = <&clock ESP32_PCNT_MODULE>; |
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status = "disabled"; |
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}; |
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}; |
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};
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