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.. _esp32s3_devkitc: |
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ESP32-S3-DevKitC |
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################ |
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Overview |
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The ESP32-S3-DevKitC is an entry-level development board equipped with either ESP32-S3-WROOM-1 |
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or ESP32-S3-WROOM-1U, a module named for its small size. This board integrates complete Wi-Fi |
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and Bluetooth Low Energy functions. For more information, check `ESP32-S3-DevKitC`_. |
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Hardware |
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ESP32-S3 is a low-power MCU-based system on a chip (SoC) with integrated 2.4 GHz Wi-Fi |
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and Bluetooth® Low Energy (Bluetooth LE). It consists of high-performance dual-core microprocessor |
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(Xtensa® 32-bit LX7), a low power coprocessor, a Wi-Fi baseband, a Bluetooth LE baseband, |
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RF module, and numerous peripherals. |
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ESP32-S3-DevKitC includes the following features: |
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- Dual core 32-bit Xtensa Microprocessor (Tensilica LX7), running up to 240MHz |
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- Additional vector instructions support for AI acceleration |
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- 512KB of SRAM |
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- 384KB of ROM |
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- Wi-Fi 802.11b/g/n |
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- Bluetooth LE 5.0 with long-range support and up to 2Mbps data rate |
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Digital interfaces: |
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- 45 programmable GPIOs |
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- 4x SPI |
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- 1x LCD interface (8-bit ~16-bit parallel RGB, I8080 and MOTO6800), supporting conversion between RGB565, YUV422, YUV420 and YUV411 |
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- 1x DVP 8-bit ~16-bit camera interface |
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- 3x UART |
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- 2x I2C |
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- 2x I2S |
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- 1x RMT (TX/RX) |
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- 1x pulse counter |
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- LED PWM controller, up to 8 channels |
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- 1x full-speed USB OTG |
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- 1x USB Serial/JTAG controller |
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- 2x MCPWM |
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- 1x SDIO host controller with 2 slots |
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- General DMA controller (GDMA), with 5 transmit channels and 5 receive channels |
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- 1x TWAI® controller, compatible with ISO 11898-1 (CAN Specification 2.0) |
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- Addressable RGB LED, driven by GPIO38. |
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Analog interfaces: |
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- 2x 12-bit SAR ADCs, up to 20 channels |
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- 1x temperature sensor |
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- 14x touch sensing IOs |
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Timers: |
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- 4x 54-bit general-purpose timers |
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- 1x 52-bit system timer |
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- 3x watchdog timers |
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Low Power: |
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- Power Management Unit with five power modes |
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- Ultra-Low-Power (ULP) coprocessors: ULP-RISC-V and ULP-FSM |
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Security: |
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- Secure boot |
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- Flash encryption |
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- 4-Kbit OTP, up to 1792 bits for users |
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- Cryptographic hardware acceleration: (AES-128/256, Hash, RSA, RNG, HMAC, Digital signature) |
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Asymmetric Multiprocessing (AMP) |
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******************************** |
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ESP32S3-DevKitC allows 2 different applications to be executed in ESP32-S3 SoC. Due to its dual-core |
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architecture, each core can be enabled to execute customized tasks in stand-alone mode |
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and/or exchanging data over OpenAMP framework. See :zephyr:code-sample-category:`ipc` folder as code reference. |
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For more information, check the datasheet at `ESP32-S3 Datasheet`_ or the technical reference |
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manual at `ESP32-S3 Technical Reference Manual`_. |
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Supported Features |
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================== |
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Current Zephyr's ESP32-S3-DevKitC board supports the following features: |
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+------------+------------+-------------------------------------+ |
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| Interface | Controller | Driver/Component | |
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+============+============+=====================================+ |
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| UART | on-chip | serial port | |
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+------------+------------+-------------------------------------+ |
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| GPIO | on-chip | gpio | |
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+------------+------------+-------------------------------------+ |
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| PINMUX | on-chip | pinmux | |
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+------------+------------+-------------------------------------+ |
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| USB-JTAG | on-chip | hardware interface | |
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+------------+------------+-------------------------------------+ |
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| SPI Master | on-chip | spi | |
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+------------+------------+-------------------------------------+ |
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| TWAI/CAN | on-chip | can | |
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+------------+------------+-------------------------------------+ |
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| ADC | on-chip | adc | |
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+------------+------------+-------------------------------------+ |
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| Timers | on-chip | counter | |
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+------------+------------+-------------------------------------+ |
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| Watchdog | on-chip | watchdog | |
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+------------+------------+-------------------------------------+ |
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| TRNG | on-chip | entropy | |
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+------------+------------+-------------------------------------+ |
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| LEDC | on-chip | pwm | |
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+------------+------------+-------------------------------------+ |
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| MCPWM | on-chip | pwm | |
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+------------+------------+-------------------------------------+ |
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| PCNT | on-chip | qdec | |
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+------------+------------+-------------------------------------+ |
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| GDMA | on-chip | dma | |
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+------------+------------+-------------------------------------+ |
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| USB-CDC | on-chip | serial | |
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+------------+------------+-------------------------------------+ |
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Prerequisites |
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------------- |
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Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command |
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below to retrieve those files. |
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.. code-block:: console |
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west blobs fetch hal_espressif |
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.. note:: |
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It is recommended running the command above after :file:`west update`. |
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Building & Flashing |
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******************* |
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Simple boot |
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=========== |
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The board could be loaded using the single binary image, without 2nd stage bootloader. |
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It is the default option when building the application without additional configuration. |
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.. note:: |
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Simple boot does not provide any security features nor OTA updates. |
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MCUboot bootloader |
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================== |
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User may choose to use MCUboot bootloader instead. In that case the bootloader |
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must be built (and flashed) at least once. |
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There are two options to be used when building an application: |
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1. Sysbuild |
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2. Manual build |
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.. note:: |
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User can select the MCUboot bootloader by adding the following line |
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to the board default configuration file. |
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.. code:: cfg |
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CONFIG_BOOTLOADER_MCUBOOT=y |
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Sysbuild |
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======== |
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The sysbuild makes possible to build and flash all necessary images needed to |
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bootstrap the board with the ESP32-S3 SoC. |
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To build the sample application using sysbuild use the command: |
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.. zephyr-app-commands:: |
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:tool: west |
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:zephyr-app: samples/hello_world |
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:board: esp32s3_devkitc/esp32s3/procpu |
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:goals: build |
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:west-args: --sysbuild |
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:compact: |
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By default, the ESP32 sysbuild creates bootloader (MCUboot) and application |
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images. But it can be configured to create other kind of images. |
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Build directory structure created by sysbuild is different from traditional |
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Zephyr build. Output is structured by the domain subdirectories: |
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.. code-block:: |
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build/ |
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├── hello_world |
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│ └── zephyr |
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│ ├── zephyr.elf |
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│ └── zephyr.bin |
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├── mcuboot |
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│ └── zephyr |
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│ ├── zephyr.elf |
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│ └── zephyr.bin |
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└── domains.yaml |
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.. note:: |
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With ``--sysbuild`` option the bootloader will be re-build and re-flash |
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every time the pristine build is used. |
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For more information about the system build please read the :ref:`sysbuild` documentation. |
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Manual build |
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============ |
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During the development cycle, it is intended to build & flash as quickly possible. |
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For that reason, images can be built one at a time using traditional build. |
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The instructions following are relevant for both manual build and sysbuild. |
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The only difference is the structure of the build directory. |
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.. note:: |
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Remember that bootloader (MCUboot) needs to be flash at least once. |
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Build and flash applications as usual (see :ref:`build_an_application` and |
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:ref:`application_run` for more details). |
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.. zephyr-app-commands:: |
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:zephyr-app: samples/hello_world |
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:board: esp32s3_devkitc/esp32s3/procpu |
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:goals: build |
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The usual ``flash`` target will work with the ``esp32s3_devkitc`` board |
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configuration. Here is an example for the :zephyr:code-sample:`hello_world` |
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application. |
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.. zephyr-app-commands:: |
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:zephyr-app: samples/hello_world |
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:board: esp32s3_devkitc/esp32s3/procpu |
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:goals: flash |
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Open the serial monitor using the following command: |
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.. code-block:: shell |
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west espressif monitor |
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After the board has automatically reset and booted, you should see the following |
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message in the monitor: |
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.. code-block:: console |
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***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** |
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Hello World! esp32s3_devkitc |
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Debugging |
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********* |
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ESP32-S3 support on OpenOCD is available at `OpenOCD ESP32`_. |
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ESP32-S3 has a built-in JTAG circuitry and can be debugged without any additional chip. Only an USB cable connected to the D+/D- pins is necessary. |
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Further documentation can be obtained from the SoC vendor in `JTAG debugging for ESP32-S3`_. |
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Here is an example for building the :zephyr:code-sample:`hello_world` application. |
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.. zephyr-app-commands:: |
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:zephyr-app: samples/hello_world |
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:board: esp32s3_devkitc/esp32s3/procpu |
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:goals: build flash |
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You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application. |
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.. zephyr-app-commands:: |
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:zephyr-app: samples/hello_world |
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:board: esp32s3_devkitc/esp32s3/procpu |
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:goals: debug |
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References |
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********** |
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.. _`ESP32-S3-DevKitC`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/hw-reference/esp32s3/user-guide-devkitc-1.html |
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.. _`ESP32-S3 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-s3-wroom-1_wroom-1u_datasheet_en.pdf |
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.. _`ESP32-S3 Technical Reference Manual`: https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf |
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.. _`JTAG debugging for ESP32-S3`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/api-guides/jtag-debugging/ |
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.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases
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