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101 lines
2.0 KiB
101 lines
2.0 KiB
/* |
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* Copyright (c) 2022 Nordic Semiconductor |
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* Copyright (c) 2022 Laird Connectivity |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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&pinctrl { |
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uart0_default: uart0_default { |
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group1 { |
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psels = <NRF_PSEL(UART_TX, 0, 6)>, |
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<NRF_PSEL(UART_RX, 0, 8)>, |
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<NRF_PSEL(UART_RTS, 0, 5)>, |
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<NRF_PSEL(UART_CTS, 0, 7)>; |
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}; |
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}; |
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uart0_sleep: uart0_sleep { |
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group1 { |
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psels = <NRF_PSEL(UART_TX, 0, 6)>, |
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<NRF_PSEL(UART_RX, 0, 8)>, |
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<NRF_PSEL(UART_RTS, 0, 5)>, |
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<NRF_PSEL(UART_CTS, 0, 7)>; |
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low-power-enable; |
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}; |
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}; |
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uart1_default: uart1_default { |
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group1 { |
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psels = <NRF_PSEL(UART_TX, 0, 14)>, |
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<NRF_PSEL(UART_RX, 0, 16)>, |
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<NRF_PSEL(UART_RTS, 0, 13)>, |
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<NRF_PSEL(UART_CTS, 0, 15)>; |
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}; |
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}; |
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uart1_sleep: uart1_sleep { |
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group1 { |
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psels = <NRF_PSEL(UART_TX, 0, 14)>, |
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<NRF_PSEL(UART_RX, 0, 16)>, |
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<NRF_PSEL(UART_RTS, 0, 13)>, |
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<NRF_PSEL(UART_CTS, 0, 15)>; |
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low-power-enable; |
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}; |
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}; |
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i2c0_default: i2c0_default { |
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group1 { |
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psels = <NRF_PSEL(TWIM_SDA, 0, 26)>, |
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<NRF_PSEL(TWIM_SCL, 0, 27)>; |
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}; |
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}; |
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i2c0_sleep: i2c0_sleep { |
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group1 { |
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psels = <NRF_PSEL(TWIM_SDA, 0, 26)>, |
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<NRF_PSEL(TWIM_SCL, 0, 27)>; |
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low-power-enable; |
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}; |
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}; |
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spi2_default: spi2_default { |
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group1 { |
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psels = <NRF_PSEL(SPIM_SCK, 1, 9)>, |
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<NRF_PSEL(SPIM_MOSI, 0, 11)>, |
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<NRF_PSEL(SPIM_MISO, 0, 12)>; |
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}; |
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}; |
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spi2_sleep: spi2_sleep { |
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group1 { |
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psels = <NRF_PSEL(SPIM_SCK, 1, 9)>, |
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<NRF_PSEL(SPIM_MOSI, 0, 11)>, |
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<NRF_PSEL(SPIM_MISO, 0, 12)>; |
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low-power-enable; |
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}; |
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}; |
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qspi_default: qspi_default { |
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group1 { |
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psels = <NRF_PSEL(QSPI_SCK, 0, 19)>, |
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<NRF_PSEL(QSPI_IO0, 0, 20)>, |
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<NRF_PSEL(QSPI_IO1, 0, 21)>, |
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<NRF_PSEL(QSPI_IO2, 0, 22)>, |
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<NRF_PSEL(QSPI_IO3, 0, 23)>, |
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<NRF_PSEL(QSPI_CSN, 0, 17)>; |
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}; |
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}; |
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qspi_sleep: qspi_sleep { |
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group1 { |
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psels = <NRF_PSEL(QSPI_SCK, 0, 19)>, |
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<NRF_PSEL(QSPI_IO0, 0, 20)>, |
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<NRF_PSEL(QSPI_IO1, 0, 21)>, |
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<NRF_PSEL(QSPI_IO2, 0, 22)>, |
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<NRF_PSEL(QSPI_IO3, 0, 23)>, |
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<NRF_PSEL(QSPI_CSN, 0, 17)>; |
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low-power-enable; |
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}; |
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}; |
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};
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