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83 lines
3.1 KiB
83 lines
3.1 KiB
/* |
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* Copyright (c) 2022, NXP |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#ifndef ZEPHYR_SOC_ARM_NXP_MIMX8ML8_M7_PINCTRL_SOC_H_ |
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#define ZEPHYR_SOC_ARM_NXP_MIMX8ML8_M7_PINCTRL_SOC_H_ |
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#include <zephyr/devicetree.h> |
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#include <zephyr/types.h> |
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#include "fsl_common.h" |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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#define MCUX_IMX_INPUT_SCHMITT_ENABLE_SHIFT IOMUXC_SW_PAD_CTL_PAD_HYS_SHIFT |
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#define MCUX_IMX_BIAS_PULL_UP_SHIFT IOMUXC_SW_PAD_CTL_PAD_PUE_SHIFT |
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#define MCUX_IMX_BIAS_PULL_ENABLE_SHIFT IOMUXC_SW_PAD_CTL_PAD_PE_SHIFT |
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#define MCUX_IMX_DRIVE_OPEN_DRAIN_SHIFT IOMUXC_SW_PAD_CTL_PAD_ODE_SHIFT |
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#define MCUX_IMX_SLEW_RATE_SHIFT IOMUXC_SW_PAD_CTL_PAD_FSEL_SHIFT |
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#define MCUX_IMX_DRIVE_STRENGTH_SHIFT IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT |
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#define MCUX_IMX_INPUT_ENABLE_SHIFT 31 /* Shift to a bit not used by IOMUXC_SW_PAD_CTL */ |
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#define MCUX_IMX_INPUT_ENABLE(x) ((x >> MCUX_IMX_INPUT_ENABLE_SHIFT) & 0x1) |
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#define Z_PINCTRL_MCUX_IMX_PINCFG_INIT(node_id) \ |
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((DT_PROP(node_id, input_schmitt_enable) << MCUX_IMX_INPUT_SCHMITT_ENABLE_SHIFT) | \ |
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(DT_PROP(node_id, bias_pull_up) << MCUX_IMX_BIAS_PULL_UP_SHIFT) | \ |
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((DT_PROP(node_id, bias_pull_up) | DT_PROP(node_id, bias_pull_down)) \ |
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<< MCUX_IMX_BIAS_PULL_ENABLE_SHIFT) | \ |
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(DT_PROP(node_id, drive_open_drain) << MCUX_IMX_DRIVE_OPEN_DRAIN_SHIFT) | \ |
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(DT_ENUM_IDX(node_id, drive_strength) << MCUX_IMX_DRIVE_STRENGTH_SHIFT) | \ |
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(DT_ENUM_IDX(node_id, slew_rate) << MCUX_IMX_SLEW_RATE_SHIFT) | \ |
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(DT_PROP(node_id, input_enable) << MCUX_IMX_INPUT_ENABLE_SHIFT)) |
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/* This struct must be present. It is used by the mcux gpio driver */ |
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struct pinctrl_soc_pinmux { |
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uint32_t mux_register; /*!< IOMUXC SW_PAD_MUX register */ |
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uint32_t config_register; /*!< IOMUXC SW_PAD_CTL register */ |
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uint32_t input_register; /*!< IOMUXC SELECT_INPUT DAISY register */ |
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uint8_t mux_mode: 4; /*!< Mux value for SW_PAD_MUX register */ |
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uint32_t input_daisy:4; /*!< Mux value for SELECT_INPUT_DAISY register */ |
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}; |
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struct pinctrl_soc_pin { |
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struct pinctrl_soc_pinmux pinmux; |
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uint32_t pin_ctrl_flags; /*!< value to write to IOMUXC_SW_PAD_CTL register */ |
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}; |
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typedef struct pinctrl_soc_pin pinctrl_soc_pin_t; |
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/* This definition must be present. It is used by the mcux gpio driver */ |
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#define MCUX_IMX_PINMUX(node_id) \ |
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{ \ |
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.mux_register = DT_PROP_BY_IDX(node_id, pinmux, 0), \ |
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.config_register = DT_PROP_BY_IDX(node_id, pinmux, 4), \ |
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.input_register = DT_PROP_BY_IDX(node_id, pinmux, 2), \ |
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.mux_mode = DT_PROP_BY_IDX(node_id, pinmux, 1), \ |
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.input_daisy = DT_PROP_BY_IDX(node_id, pinmux, 3), \ |
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} |
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#define Z_PINCTRL_PINMUX(group_id, pin_prop, idx) \ |
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MCUX_IMX_PINMUX(DT_PHANDLE_BY_IDX(group_id, pin_prop, idx)) |
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#define Z_PINCTRL_STATE_PIN_INIT(group_id, pin_prop, idx) \ |
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{ \ |
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.pinmux = Z_PINCTRL_PINMUX(group_id, pin_prop, idx), \ |
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.pin_ctrl_flags = Z_PINCTRL_MCUX_IMX_PINCFG_INIT(group_id), \ |
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}, |
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#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \ |
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{DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), \ |
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DT_FOREACH_PROP_ELEM, pinmux, Z_PINCTRL_STATE_PIN_INIT)}; \ |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /* ZEPHYR_SOC_ARM_NXP_MIMX8ML8_M7_PINCTRL_SOC_H_ */
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