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56 lines
1.3 KiB
56 lines
1.3 KiB
/* |
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* Copyright (c) 2019 Richard Osterloh <richard.osterloh@gmail.com> |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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/** |
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* @file |
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* @brief System/hardware module for STM32G4 processor |
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*/ |
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#include <zephyr/device.h> |
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#include <zephyr/init.h> |
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#include <stm32_ll_system.h> |
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#include <soc.h> |
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#include <cmsis_core.h> |
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#if defined(PWR_CR3_UCPD_DBDIS) |
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#include <stm32_ll_bus.h> |
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#include <stm32_ll_pwr.h> |
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#endif /* PWR_CR3_UCPD_DBDIS */ |
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extern void stm32_power_init(void); |
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/** |
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* @brief Perform basic hardware initialization at boot. |
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* |
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* This needs to be run from the very beginning. |
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*/ |
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void soc_early_init_hook(void) |
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{ |
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/* Enable ART Accelerator I/D-cache and prefetch */ |
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LL_FLASH_EnableInstCache(); |
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LL_FLASH_EnableDataCache(); |
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LL_FLASH_EnablePrefetch(); |
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/* Update CMSIS SystemCoreClock variable (HCLK) */ |
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/* At reset, system core clock is set to 16 MHz from HSI */ |
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SystemCoreClock = 16000000; |
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/* allow reflashing board */ |
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LL_DBGMCU_EnableDBGSleepMode(); |
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#if defined(PWR_CR3_UCPD_DBDIS) |
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if (IS_ENABLED(CONFIG_DT_HAS_ST_STM32_UCPD_ENABLED) || |
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!IS_ENABLED(CONFIG_USB_DEVICE_DRIVER)) { |
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/* Disable USB Type-C dead battery pull-down behavior */ |
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LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR); |
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LL_PWR_DisableUCPDDeadBattery(); |
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} |
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#endif /* PWR_CR3_UCPD_DBDIS */ |
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#if CONFIG_PM |
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stm32_power_init(); |
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#endif |
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}
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