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80 lines
2.7 KiB
80 lines
2.7 KiB
/* |
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* Copyright (c) 2025 Antmicro <www.antmicro.com> |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#ifndef ZEPHYR_VIRTIO_VIRTIO_COMMON_H_ |
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#define ZEPHYR_VIRTIO_VIRTIO_COMMON_H_ |
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#define DEVICE_STATUS_ACKNOWLEDGE 0 |
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#define DEVICE_STATUS_DRIVER 1 |
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#define DEVICE_STATUS_DRIVER_OK 2 |
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#define DEVICE_STATUS_FEATURES_OK 3 |
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#define DEVICE_STATUS_NEEDS_RESET 6 |
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#define DEVICE_STATUS_FAILED 7 |
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#define VIRTIO_F_VERSION_1 32 |
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/* Ranges of feature bits for specific device types (see spec 2.2)*/ |
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#define DEV_TYPE_FEAT_RANGE_0_BEGIN 0 |
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#define DEV_TYPE_FEAT_RANGE_0_END 23 |
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#define DEV_TYPE_FEAT_RANGE_1_BEGIN 50 |
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#define DEV_TYPE_FEAT_RANGE_1_END 127 |
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/* |
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* While defined separately in 4.1.4.5 for PCI and in 4.2.2 for MMIO |
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* the same bits are responsible for the same interrupts, so defines |
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* with them can be unified |
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*/ |
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#define VIRTIO_QUEUE_INTERRUPT 1 |
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#define VIRTIO_DEVICE_CONFIGURATION_INTERRUPT 2 |
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/* |
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* VIRTIO-MMIO register definitions. |
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* |
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* Based on Virtual I/O Device (VIRTIO) Version 1.3 specification: |
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* https://docs.oasis-open.org/virtio/virtio/v1.3/csd01/virtio-v1.3-csd01.pdf |
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*/ |
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#define VIRTIO_MMIO_MAGIC_VALUE 0x000 |
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#define VIRTIO_MMIO_VERSION 0x004 |
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#define VIRTIO_MMIO_DEVICE_ID 0x008 |
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#define VIRTIO_MMIO_VENDOR_ID 0x00c |
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#define VIRTIO_MMIO_DEVICE_FEATURES 0x010 |
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#define VIRTIO_MMIO_DEVICE_FEATURES_SEL 0x014 |
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#define VIRTIO_MMIO_DRIVER_FEATURES 0x020 |
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#define VIRTIO_MMIO_DRIVER_FEATURES_SEL 0x024 |
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#define VIRTIO_MMIO_QUEUE_SEL 0x030 |
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#define VIRTIO_MMIO_QUEUE_SIZE_MAX 0x034 |
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#define VIRTIO_MMIO_QUEUE_SIZE 0x038 |
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#define VIRTIO_MMIO_QUEUE_READY 0x044 |
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#define VIRTIO_MMIO_QUEUE_NOTIFY 0x050 |
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#define VIRTIO_MMIO_INTERRUPT_STATUS 0x060 |
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#define VIRTIO_MMIO_INTERRUPT_ACK 0x064 |
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#define VIRTIO_MMIO_STATUS 0x070 |
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#define VIRTIO_MMIO_QUEUE_DESC_LOW 0x080 |
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#define VIRTIO_MMIO_QUEUE_DESC_HIGH 0x084 |
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#define VIRTIO_MMIO_QUEUE_AVAIL_LOW 0x090 |
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#define VIRTIO_MMIO_QUEUE_AVAIL_HIGH 0x094 |
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#define VIRTIO_MMIO_QUEUE_USED_LOW 0x0a0 |
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#define VIRTIO_MMIO_QUEUE_USED_HIGH 0x0a4 |
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#define VIRTIO_MMIO_SHM_SEL 0x0ac |
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#define VIRTIO_MMIO_SHM_LEN_LOW 0x0b0 |
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#define VIRTIO_MMIO_SHM_LEN_HIGH 0x0b4 |
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#define VIRTIO_MMIO_SHM_BASE_LOW 0x0b8 |
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#define VIRTIO_MMIO_SHM_BASE_HIGH 0x0bc |
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#define VIRTIO_MMIO_QUEUE_RESET 0x0c0 |
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#define VIRTIO_MMIO_CONFIG_GENERATION 0x0fc |
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#define VIRTIO_MMIO_CONFIG 0x100 |
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/** |
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* Common virtio isr |
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* |
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* @param dev virtio device it operates on |
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* @param isr_status value of isr status register |
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* @param virtqueue_count amount of available virtqueues |
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*/ |
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void virtio_isr(const struct device *dev, uint8_t isr_status, uint16_t virtqueue_count); |
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#endif /*ZEPHYR_VIRTIO_VIRTIO_COMMON_H_*/
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