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101 lines
2.7 KiB
101 lines
2.7 KiB
/* |
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* Copyright (c) 2018 - 2019 Antmicro <www.antmicro.com> |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#define DT_DRV_COMPAT litex_timer0 |
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#include <zephyr/kernel.h> |
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#include <zephyr/arch/cpu.h> |
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#include <zephyr/init.h> |
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#include <zephyr/irq.h> |
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#include <zephyr/spinlock.h> |
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#include <zephyr/drivers/timer/system_timer.h> |
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#include <soc.h> |
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#define TIMER_LOAD_ADDR DT_INST_REG_ADDR_BY_NAME(0, load) |
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#define TIMER_RELOAD_ADDR DT_INST_REG_ADDR_BY_NAME(0, reload) |
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#define TIMER_EN_ADDR DT_INST_REG_ADDR_BY_NAME(0, en) |
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#define TIMER_UPDATE_VALUE_ADDR DT_INST_REG_ADDR_BY_NAME(0, update_value) |
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#define TIMER_VALUE_ADDR DT_INST_REG_ADDR_BY_NAME(0, value) |
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#define TIMER_EV_STATUS_ADDR DT_INST_REG_ADDR_BY_NAME(0, ev_status) |
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#define TIMER_EV_PENDING_ADDR DT_INST_REG_ADDR_BY_NAME(0, ev_pending) |
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#define TIMER_EV_ENABLE_ADDR DT_INST_REG_ADDR_BY_NAME(0, ev_enable) |
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#define TIMER_UPTIME_LATCH_ADDR DT_INST_REG_ADDR_BY_NAME(0, uptime_latch) |
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#define TIMER_UPTIME_CYCLES_ADDR DT_INST_REG_ADDR_BY_NAME(0, uptime_cycles) |
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#define TIMER_EV 0x1 |
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#define TIMER_IRQ DT_INST_IRQN(0) |
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#define TIMER_DISABLE 0x0 |
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#define TIMER_ENABLE 0x1 |
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#define TIMER_UPTIME_LATCH 0x1 |
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#if defined(CONFIG_TEST) |
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const int32_t z_sys_timer_irq_for_test = TIMER_IRQ; |
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#endif |
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static void litex_timer_irq_handler(const void *device) |
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{ |
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unsigned int key = irq_lock(); |
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litex_write8(TIMER_EV, TIMER_EV_PENDING_ADDR); |
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sys_clock_announce(1); |
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irq_unlock(key); |
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} |
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uint32_t sys_clock_cycle_get_32(void) |
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{ |
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static struct k_spinlock lock; |
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uint32_t uptime_cycles; |
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k_spinlock_key_t key = k_spin_lock(&lock); |
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litex_write8(TIMER_UPTIME_LATCH, TIMER_UPTIME_LATCH_ADDR); |
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uptime_cycles = (uint32_t)litex_read64(TIMER_UPTIME_CYCLES_ADDR); |
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k_spin_unlock(&lock, key); |
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return uptime_cycles; |
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} |
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uint64_t sys_clock_cycle_get_64(void) |
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{ |
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static struct k_spinlock lock; |
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uint64_t uptime_cycles; |
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k_spinlock_key_t key = k_spin_lock(&lock); |
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litex_write8(TIMER_UPTIME_LATCH, TIMER_UPTIME_LATCH_ADDR); |
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uptime_cycles = litex_read64(TIMER_UPTIME_CYCLES_ADDR); |
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k_spin_unlock(&lock, key); |
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return uptime_cycles; |
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} |
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/* tickless kernel is not supported */ |
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uint32_t sys_clock_elapsed(void) |
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{ |
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return 0; |
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} |
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static int sys_clock_driver_init(void) |
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{ |
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IRQ_CONNECT(TIMER_IRQ, DT_INST_IRQ(0, priority), |
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litex_timer_irq_handler, NULL, 0); |
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irq_enable(TIMER_IRQ); |
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litex_write8(TIMER_DISABLE, TIMER_EN_ADDR); |
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litex_write32(k_ticks_to_cyc_floor32(1), TIMER_RELOAD_ADDR); |
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litex_write32(k_ticks_to_cyc_floor32(1), TIMER_LOAD_ADDR); |
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litex_write8(TIMER_ENABLE, TIMER_EN_ADDR); |
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litex_write8(litex_read8(TIMER_EV_PENDING_ADDR), TIMER_EV_PENDING_ADDR); |
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litex_write8(TIMER_EV, TIMER_EV_ENABLE_ADDR); |
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return 0; |
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} |
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SYS_INIT(sys_clock_driver_init, PRE_KERNEL_2, |
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CONFIG_SYSTEM_CLOCK_INIT_PRIORITY);
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