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341 lines
10 KiB
341 lines
10 KiB
/* |
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* Copyright (c) 2023 Cypress Semiconductor Corporation (an Infineon company) or |
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* an affiliate of Cypress Semiconductor Corporation |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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* |
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*/ |
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/** |
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* @brief SDIO driver for Infineon CAT1 MCU family. |
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* |
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* This driver support only SDIO protocol of the SD interface for general |
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* I/O functions. |
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* |
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* Refer to the SD Specifications Part 1 SDIO Specifications Version 4.10 for more |
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* information on the SDIO protocol and specifications. |
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* |
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* Features |
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* - Supports 4-bit interface |
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* - Supports Ultra High Speed (UHS-I) mode |
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* - Supports Default Speed (DS), High Speed (HS), SDR12, SDR25 and SDR50 speed modes |
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* - Supports SDIO card interrupts in both 1-bit SD and 4-bit SD modes |
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* - Supports Standard capacity (SDSC), High capacity (SDHC) and |
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* Extended capacity (SDXC) memory |
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* |
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* Note (limitations): |
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* - current version of ifx_cat1_sdio supports only following set of commands: |
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* > GO_IDLE_STATE (CMD0) |
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* > SEND_RELATIVE_ADDR (CMD3) |
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* > IO_SEND_OP_COND (CMD5) |
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* > SELECT_CARD (CMD7) |
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* > VOLTAGE_SWITCH (CMD11) |
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* > GO_INACTIVE_STATE (CMD15) |
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* > IO_RW_DIRECT (CMD52) |
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* > IO_RW_EXTENDED (CMD53) |
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*/ |
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#define DT_DRV_COMPAT infineon_cat1_sdhc_sdio |
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#include <zephyr/kernel.h> |
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#include <zephyr/devicetree.h> |
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#include <zephyr/drivers/sdhc.h> |
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#include <zephyr/sd/sd_spec.h> |
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#include <zephyr/drivers/clock_control.h> |
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#include <zephyr/drivers/gpio.h> |
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#include <zephyr/logging/log.h> |
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#include <soc.h> |
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#include <zephyr/drivers/pinctrl.h> |
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#include <cyhal_hw_resources.h> |
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#include <cyhal_sdhc.h> |
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#include <cyhal_sdio.h> |
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#include <cyhal_gpio.h> |
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LOG_MODULE_REGISTER(ifx_cat1_sdio, CONFIG_SDHC_LOG_LEVEL); |
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#include <zephyr/irq.h> |
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#define IFX_CAT1_SDIO_F_MIN (SDMMC_CLOCK_400KHZ) |
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#define IFX_CAT1_SDIO_F_MAX (SD_CLOCK_50MHZ) |
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struct ifx_cat1_sdio_config { |
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const struct pinctrl_dev_config *pincfg; |
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SDHC_Type *reg_addr; |
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uint8_t irq_priority; |
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}; |
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struct ifx_cat1_sdio_data { |
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cyhal_sdio_t sdio_obj; |
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cyhal_resource_inst_t hw_resource; |
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cyhal_sdio_configurator_t cyhal_sdio_config; |
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enum sdhc_clock_speed clock_speed; |
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enum sdhc_bus_width bus_width; |
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void *sdio_cb_user_data; |
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sdhc_interrupt_cb_t sdio_cb; |
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}; |
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static uint32_t sdio_rca; |
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static const cy_stc_sd_host_init_config_t host_config = {false, CY_SD_HOST_DMA_ADMA2, false}; |
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static cy_en_sd_host_card_capacity_t sd_host_card_capacity = CY_SD_HOST_SDSC; |
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static cy_en_sd_host_card_type_t sd_host_card_type = CY_SD_HOST_NOT_EMMC; |
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static cy_stc_sd_host_sd_card_config_t sd_host_sd_card_config = { |
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.lowVoltageSignaling = false, |
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.busWidth = CY_SD_HOST_BUS_WIDTH_4_BIT, |
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.cardType = &sd_host_card_type, |
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.rca = &sdio_rca, |
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.cardCapacity = &sd_host_card_capacity, |
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}; |
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/* List of available SDHC instances */ |
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static SDHC_Type *const IFX_CAT1_SDHC_BASE_ADDRESSES[CY_IP_MXSDHC_INSTANCES] = { |
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#ifdef SDHC0 |
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SDHC0, |
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#endif /* ifdef SDHC0 */ |
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#ifdef SDHC1 |
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SDHC1, |
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#endif /* ifdef SDHC1 */ |
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}; |
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static int32_t _get_hw_block_num(SDHC_Type *reg_addr) |
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{ |
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uint32_t i; |
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for (i = 0u; i < CY_IP_MXSDHC_INSTANCES; i++) { |
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if (IFX_CAT1_SDHC_BASE_ADDRESSES[i] == reg_addr) { |
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return i; |
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} |
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} |
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return -EINVAL; |
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} |
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static int ifx_cat1_sdio_reset(const struct device *dev) |
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{ |
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struct ifx_cat1_sdio_data *dev_data = dev->data; |
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cyhal_sdhc_software_reset((cyhal_sdhc_t *)&dev_data->sdio_obj); |
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return 0; |
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} |
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static int ifx_cat1_sdio_set_io(const struct device *dev, struct sdhc_io *ios) |
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{ |
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cy_rslt_t ret; |
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struct ifx_cat1_sdio_data *dev_data = dev->data; |
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cyhal_sdio_cfg_t config = {.frequencyhal_hz = ios->clock}; |
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/* NOTE: Set bus width, set card power, set host signal voltage, |
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* set I/O timing does not support in current version of driver |
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*/ |
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/* Set host clock */ |
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if ((dev_data->clock_speed != ios->clock) && (ios->clock != 0)) { |
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if ((ios->clock > IFX_CAT1_SDIO_F_MAX) || (ios->clock < IFX_CAT1_SDIO_F_MIN)) { |
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return -EINVAL; |
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} |
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ret = cyhal_sdio_configure(&dev_data->sdio_obj, &config); |
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if (ret != CY_RSLT_SUCCESS) { |
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return -ENOTSUP; |
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} |
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dev_data->clock_speed = ios->clock; |
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} |
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return 0; |
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} |
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static int ifx_cat1_sdio_card_busy(const struct device *dev) |
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{ |
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struct ifx_cat1_sdio_data *dev_data = dev->data; |
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return cyhal_sdio_is_busy(&dev_data->sdio_obj) ? 1 : 0; |
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} |
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static int ifx_cat1_sdio_request(const struct device *dev, struct sdhc_command *cmd, |
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struct sdhc_data *data) |
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{ |
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struct ifx_cat1_sdio_data *dev_data = dev->data; |
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int ret; |
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switch (cmd->opcode) { |
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case CYHAL_SDIO_CMD_GO_IDLE_STATE: |
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case CYHAL_SDIO_CMD_SEND_RELATIVE_ADDR: |
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case CYHAL_SDIO_CMD_IO_SEND_OP_COND: |
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case CYHAL_SDIO_CMD_SELECT_CARD: |
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case CYHAL_SDIO_CMD_VOLTAGE_SWITCH: |
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case CYHAL_SDIO_CMD_GO_INACTIVE_STATE: |
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case CYHAL_SDIO_CMD_IO_RW_DIRECT: |
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ret = cyhal_sdio_send_cmd(&dev_data->sdio_obj, CYHAL_SDIO_XFER_TYPE_READ, |
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cmd->opcode, cmd->arg, cmd->response); |
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if (ret != CY_RSLT_SUCCESS) { |
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LOG_ERR("cyhal_sdio_send_cmd failed ret = %d \r\n", ret); |
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} |
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break; |
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case CYHAL_SDIO_CMD_IO_RW_EXTENDED: |
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cyhal_sdio_transfer_type_t direction; |
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direction = (cmd->arg & BIT(SDIO_CMD_ARG_RW_SHIFT)) ? CYHAL_SDIO_XFER_TYPE_WRITE |
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: CYHAL_SDIO_XFER_TYPE_READ; |
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ret = cyhal_sdio_bulk_transfer(&dev_data->sdio_obj, direction, cmd->arg, data->data, |
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data->blocks * data->block_size, cmd->response); |
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if (ret != CY_RSLT_SUCCESS) { |
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LOG_ERR("cyhal_sdio_bulk_transfer failed ret = %d \r\n", ret); |
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} |
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break; |
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default: |
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ret = -ENOTSUP; |
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} |
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return ret; |
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} |
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static int ifx_cat1_sdio_get_card_present(const struct device *dev) |
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{ |
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return 1; |
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} |
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static int ifx_cat1_sdio_get_host_props(const struct device *dev, struct sdhc_host_props *props) |
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{ |
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memset(props, 0, sizeof(*props)); |
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props->f_max = IFX_CAT1_SDIO_F_MAX; |
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props->f_min = IFX_CAT1_SDIO_F_MIN; |
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props->host_caps.bus_4_bit_support = true; |
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props->host_caps.high_spd_support = true; |
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props->host_caps.sdr50_support = true; |
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props->host_caps.sdio_async_interrupt_support = true; |
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props->host_caps.vol_330_support = true; |
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return 0; |
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} |
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static int ifx_cat1_sdio_enable_interrupt(const struct device *dev, sdhc_interrupt_cb_t callback, |
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int sources, void *user_data) |
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{ |
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struct ifx_cat1_sdio_data *data = dev->data; |
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const struct ifx_cat1_sdio_config *cfg = dev->config; |
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if (sources != SDHC_INT_SDIO) { |
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return -ENOTSUP; |
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} |
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if (callback == NULL) { |
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return -EINVAL; |
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} |
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/* Record SDIO callback parameters */ |
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data->sdio_cb = callback; |
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data->sdio_cb_user_data = user_data; |
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/* Enable CARD INTERRUPT event */ |
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cyhal_sdio_enable_event(&data->sdio_obj, CYHAL_SDIO_CARD_INTERRUPT, |
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cfg->irq_priority, true); |
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return 0; |
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} |
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static int ifx_cat1_sdio_disable_interrupt(const struct device *dev, int sources) |
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{ |
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struct ifx_cat1_sdio_data *data = dev->data; |
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const struct ifx_cat1_sdio_config *cfg = dev->config; |
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if (sources != SDHC_INT_SDIO) { |
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return -ENOTSUP; |
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} |
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data->sdio_cb = NULL; |
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data->sdio_cb_user_data = NULL; |
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/* Disable CARD INTERRUPT event */ |
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cyhal_sdio_enable_event(&data->sdio_obj, CYHAL_SDIO_CARD_INTERRUPT, |
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cfg->irq_priority, false); |
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return 0; |
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} |
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static void ifx_cat1_sdio_event_callback(void *callback_arg, cyhal_sdio_event_t event) |
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{ |
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const struct device *dev = callback_arg; |
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struct ifx_cat1_sdio_data *data = dev->data; |
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if ((event == CYHAL_SDIO_CARD_INTERRUPT) && (data->sdio_cb != NULL)) { |
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data->sdio_cb(dev, SDHC_INT_SDIO, data->sdio_cb_user_data); |
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} |
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} |
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static int ifx_cat1_sdio_init(const struct device *dev) |
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{ |
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cy_rslt_t ret; |
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struct ifx_cat1_sdio_data *data = dev->data; |
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const struct ifx_cat1_sdio_config *config = dev->config; |
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/* Configure dt provided device signals when available */ |
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ret = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT); |
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if (ret) { |
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return ret; |
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} |
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/* Dedicate SDIO HW resource */ |
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data->hw_resource.type = CYHAL_RSC_SDHC; |
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data->hw_resource.block_num = _get_hw_block_num(config->reg_addr); |
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data->hw_resource.channel_num = 0; |
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/* Initialize the SDIO peripheral */ |
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data->cyhal_sdio_config.resource = &data->hw_resource; |
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data->cyhal_sdio_config.host_config = &host_config, |
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data->cyhal_sdio_config.card_config = &sd_host_sd_card_config, |
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data->cyhal_sdio_config.gpios.cmd = NC; |
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data->cyhal_sdio_config.gpios.clk = NC; |
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data->cyhal_sdio_config.gpios.data[0] = NC; |
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data->cyhal_sdio_config.gpios.data[1] = NC; |
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data->cyhal_sdio_config.gpios.data[2] = NC; |
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data->cyhal_sdio_config.gpios.data[3] = NC; |
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data->cyhal_sdio_config.clock = NULL; |
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ret = cyhal_sdio_init_cfg(&data->sdio_obj, &data->cyhal_sdio_config); |
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if (ret != CY_RSLT_SUCCESS) { |
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LOG_ERR("cyhal_sdio_init_cfg failed ret = %d \r\n", ret); |
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return ret; |
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} |
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/* Register callback for SDIO events */ |
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cyhal_sdio_register_callback(&data->sdio_obj, ifx_cat1_sdio_event_callback, (void *)dev); |
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return 0; |
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} |
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static DEVICE_API(sdhc, ifx_cat1_sdio_api) = { |
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.reset = ifx_cat1_sdio_reset, |
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.request = ifx_cat1_sdio_request, |
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.set_io = ifx_cat1_sdio_set_io, |
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.get_card_present = ifx_cat1_sdio_get_card_present, |
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.card_busy = ifx_cat1_sdio_card_busy, |
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.get_host_props = ifx_cat1_sdio_get_host_props, |
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.enable_interrupt = ifx_cat1_sdio_enable_interrupt, |
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.disable_interrupt = ifx_cat1_sdio_disable_interrupt, |
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}; |
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#define IFX_CAT1_SDHC_INIT(n) \ |
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\ |
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PINCTRL_DT_INST_DEFINE(n); \ |
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\ |
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static const struct ifx_cat1_sdio_config ifx_cat1_sdio_##n##_config = { \ |
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.pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \ |
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.reg_addr = (SDHC_Type *)DT_INST_REG_ADDR(n), \ |
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.irq_priority = DT_INST_IRQ(n, priority)}; \ |
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\ |
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static struct ifx_cat1_sdio_data ifx_cat1_sdio_##n##_data; \ |
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\ |
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DEVICE_DT_INST_DEFINE(n, &ifx_cat1_sdio_init, NULL, &ifx_cat1_sdio_##n##_data, \ |
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&ifx_cat1_sdio_##n##_config, POST_KERNEL, CONFIG_SDHC_INIT_PRIORITY, \ |
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&ifx_cat1_sdio_api); |
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DT_INST_FOREACH_STATUS_OKAY(IFX_CAT1_SDHC_INIT)
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