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691 lines
16 KiB
691 lines
16 KiB
/* |
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* Copyright (c) 2023 Bjarki Arge Andreasen |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#define DT_DRV_COMPAT atmel_sam_rtc |
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#include <zephyr/kernel.h> |
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#include <zephyr/device.h> |
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#include <zephyr/irq.h> |
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#include <zephyr/drivers/rtc.h> |
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#include <zephyr/sys/util.h> |
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#include <string.h> |
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#include <soc.h> |
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#include "rtc_utils.h" |
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#define RTC_SAM_REG_GET_FIELD(value, field) \ |
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((RTC_##field##_Msk & value) >> RTC_##field##_Pos) |
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#define RTC_SAM_WPMR_DISABLE 0x52544300 |
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#define RTC_SAM_WPMR_ENABLE 0x52544301 |
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#define RTC_SAM_CALIBRATE_PPB_MAX (1950000) |
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#define RTC_SAM_CALIBRATE_PPB_MIN (-1950000) |
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#define RTC_SAM_CALIBRATE_PPB_QUANTA (1500) |
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#define RTC_SAM_CALIBRATE_PPB_LOW_SCALE (30500) |
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#define RTC_SAM_TIME_MASK \ |
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(RTC_ALARM_TIME_MASK_SECOND | RTC_ALARM_TIME_MASK_MINUTE | RTC_ALARM_TIME_MASK_HOUR | \ |
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RTC_ALARM_TIME_MASK_MONTH | RTC_ALARM_TIME_MASK_MONTHDAY | RTC_ALARM_TIME_MASK_YEAR | \ |
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RTC_ALARM_TIME_MASK_WEEKDAY) |
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typedef void (*rtc_sam_irq_init_fn_ptr)(void); |
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struct rtc_sam_config { |
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Rtc *regs; |
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uint16_t irq_num; |
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rtc_sam_irq_init_fn_ptr irq_init_fn_ptr; |
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}; |
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struct rtc_sam_data { |
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#ifdef CONFIG_RTC_ALARM |
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rtc_alarm_callback alarm_callback; |
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void *alarm_user_data; |
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#endif /* CONFIG_RTC_ALARM */ |
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#ifdef CONFIG_RTC_UPDATE |
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rtc_update_callback update_callback; |
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void *update_user_data; |
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#endif /* CONFIG_RTC_UPDATE */ |
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struct k_spinlock lock; |
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struct k_sem cr_sec_evt_sem; |
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struct k_sem cr_upd_ack_sem; |
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}; |
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static void rtc_sam_disable_wp(void) |
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{ |
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#ifdef REG_RTC_WPMR |
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REG_RTC_WPMR = RTC_SAM_WPMR_DISABLE; |
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#endif |
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} |
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static void rtc_sam_enable_wp(void) |
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{ |
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#ifdef REG_RTC_WPMR |
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REG_RTC_WPMR = RTC_SAM_WPMR_ENABLE; |
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#endif |
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} |
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static uint32_t rtc_sam_timr_from_tm(const struct rtc_time *timeptr) |
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{ |
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uint32_t timr; |
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timr = RTC_TIMR_SEC(bin2bcd(timeptr->tm_sec)); |
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timr |= RTC_TIMR_MIN(bin2bcd(timeptr->tm_min)); |
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timr |= RTC_TIMR_HOUR(bin2bcd(timeptr->tm_hour)); |
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return timr; |
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} |
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static uint32_t rtc_sam_calr_from_tm(const struct rtc_time *timeptr) |
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{ |
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uint32_t calr; |
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uint8_t centuries; |
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uint8_t years; |
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calr = RTC_CALR_DATE(bin2bcd(timeptr->tm_mday)); |
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calr |= RTC_CALR_MONTH(bin2bcd(timeptr->tm_mon + 1)); |
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centuries = (uint8_t)((timeptr->tm_year / 100) + 19); |
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years = (uint8_t)((timeptr->tm_year % 100)); |
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calr |= RTC_CALR_CENT(bin2bcd(centuries)); |
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calr |= RTC_CALR_YEAR(bin2bcd(years)); |
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calr |= RTC_CALR_DAY(bin2bcd(timeptr->tm_wday + 1)); |
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return calr; |
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} |
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static int rtc_sam_set_time(const struct device *dev, const struct rtc_time *timeptr) |
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{ |
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struct rtc_sam_data *data = dev->data; |
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const struct rtc_sam_config *config = dev->config; |
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Rtc *regs = config->regs; |
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if (rtc_utils_validate_rtc_time(timeptr, RTC_SAM_TIME_MASK) == false) { |
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return -EINVAL; |
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} |
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k_spinlock_key_t key = k_spin_lock(&data->lock); |
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k_sem_reset(&data->cr_sec_evt_sem); |
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k_sem_take(&data->cr_sec_evt_sem, K_MSEC(1100)); |
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k_sem_reset(&data->cr_upd_ack_sem); |
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/* Enable update acknowledge interrupt */ |
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regs->RTC_IER = RTC_IER_ACKEN; |
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rtc_sam_disable_wp(); |
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/* Request update */ |
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regs->RTC_CR = (RTC_CR_UPDTIM | RTC_CR_UPDCAL); |
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/* Await update acknowledge */ |
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if (k_sem_take(&data->cr_upd_ack_sem, K_MSEC(1100)) < 0) { |
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regs->RTC_CR = 0; |
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rtc_sam_enable_wp(); |
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/* Disable update acknowledge interrupt */ |
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regs->RTC_IDR = RTC_IDR_ACKDIS; |
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k_spin_unlock(&data->lock, key); |
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return -EAGAIN; |
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} |
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regs->RTC_TIMR = rtc_sam_timr_from_tm(timeptr); |
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regs->RTC_CALR = rtc_sam_calr_from_tm(timeptr); |
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regs->RTC_CR = 0; |
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rtc_sam_enable_wp(); |
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regs->RTC_IDR = RTC_IDR_ACKDIS; |
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k_spin_unlock(&data->lock, key); |
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return 0; |
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} |
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static int rtc_sam_get_time(const struct device *dev, struct rtc_time *timeptr) |
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{ |
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const struct rtc_sam_config *config = dev->config; |
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Rtc *regs = config->regs; |
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uint32_t timr0; |
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uint32_t calr0; |
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uint32_t timr1; |
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uint32_t calr1; |
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/* Validate time and date */ |
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if (regs->RTC_VER & (RTC_VER_NVTIM | RTC_VER_NVCAL)) { |
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return -ENODATA; |
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} |
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/* Read until synchronized (registers updated async) */ |
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while (1) { |
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timr0 = regs->RTC_TIMR; |
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calr0 = regs->RTC_CALR; |
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timr1 = regs->RTC_TIMR; |
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calr1 = regs->RTC_CALR; |
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if ((timr0 == timr1) && (calr0 == calr1)) { |
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break; |
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} |
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} |
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timeptr->tm_sec = bcd2bin(RTC_SAM_REG_GET_FIELD(timr0, TIMR_SEC)); |
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timeptr->tm_min = bcd2bin(RTC_SAM_REG_GET_FIELD(timr0, TIMR_MIN)); |
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timeptr->tm_hour = bcd2bin(RTC_SAM_REG_GET_FIELD(timr0, TIMR_HOUR)); |
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timeptr->tm_mday = bcd2bin(RTC_SAM_REG_GET_FIELD(calr0, CALR_DATE)); |
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timeptr->tm_mon = bcd2bin(RTC_SAM_REG_GET_FIELD(calr0, CALR_MONTH)) - 1; |
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timeptr->tm_year = bcd2bin(RTC_SAM_REG_GET_FIELD(calr0, CALR_YEAR)); |
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timeptr->tm_year += ((int)bcd2bin(RTC_SAM_REG_GET_FIELD(calr0, CALR_CENT))) * 100; |
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timeptr->tm_year -= 1900; |
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timeptr->tm_wday = bcd2bin(RTC_SAM_REG_GET_FIELD(calr0, CALR_DAY)) - 1; |
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timeptr->tm_yday = -1; |
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timeptr->tm_isdst = -1; |
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timeptr->tm_nsec = 0; |
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return 0; |
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} |
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static void rtc_sam_isr(const struct device *dev) |
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{ |
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struct rtc_sam_data *data = dev->data; |
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const struct rtc_sam_config *config = dev->config; |
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Rtc *regs = config->regs; |
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uint32_t sr = regs->RTC_SR; |
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if (sr & RTC_SR_ACKUPD) { |
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regs->RTC_SCCR = RTC_SCCR_ACKCLR; |
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k_sem_give(&data->cr_upd_ack_sem); |
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} |
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#ifdef CONFIG_RTC_ALARM |
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if (sr & RTC_SR_ALARM) { |
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regs->RTC_SCCR = RTC_SCCR_ALRCLR; |
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if (data->alarm_callback != NULL) { |
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data->alarm_callback(dev, 0, data->alarm_user_data); |
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} |
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} |
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#endif /* CONFIG_RTC_ALARM */ |
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#ifdef CONFIG_RTC_UPDATE |
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if (sr & RTC_SR_SEC) { |
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regs->RTC_SCCR = RTC_SCCR_SECCLR; |
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if (data->update_callback != NULL) { |
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data->update_callback(dev, data->update_user_data); |
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} |
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k_sem_give(&data->cr_sec_evt_sem); |
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} |
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#endif /* CONFIG_RTC_UPDATE */ |
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} |
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#ifdef CONFIG_RTC_ALARM |
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static uint16_t rtc_sam_alarm_get_supported_mask(void) |
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{ |
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return (RTC_ALARM_TIME_MASK_SECOND |
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| RTC_ALARM_TIME_MASK_MINUTE |
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| RTC_ALARM_TIME_MASK_HOUR |
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| RTC_ALARM_TIME_MASK_MONTHDAY |
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| RTC_ALARM_TIME_MASK_MONTH); |
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} |
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static uint32_t rtc_atmel_timalr_from_tm(const struct rtc_time *timeptr, uint32_t mask) |
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{ |
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uint32_t timalr = 0; |
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if (mask & RTC_ALARM_TIME_MASK_SECOND) { |
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timalr |= RTC_TIMALR_SECEN; |
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timalr |= RTC_TIMALR_SEC(bin2bcd(timeptr->tm_sec)); |
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} |
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if (mask & RTC_ALARM_TIME_MASK_MINUTE) { |
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timalr |= RTC_TIMALR_MINEN; |
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timalr |= RTC_TIMALR_MIN(bin2bcd(timeptr->tm_min)); |
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} |
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if (mask & RTC_ALARM_TIME_MASK_HOUR) { |
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timalr |= RTC_TIMALR_HOUREN; |
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timalr |= RTC_TIMALR_HOUR(bin2bcd(timeptr->tm_hour)); |
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} |
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return timalr; |
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} |
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static uint32_t rtc_atmel_calalr_from_tm(const struct rtc_time *timeptr, uint32_t mask) |
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{ |
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uint32_t calalr = RTC_CALALR_MONTH(1) | RTC_CALALR_DATE(1); |
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if (mask & RTC_ALARM_TIME_MASK_MONTH) { |
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calalr |= RTC_CALALR_MTHEN; |
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calalr |= RTC_CALALR_MONTH(bin2bcd(timeptr->tm_mon + 1)); |
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} |
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if (mask & RTC_ALARM_TIME_MASK_MONTHDAY) { |
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calalr |= RTC_CALALR_DATEEN; |
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calalr |= RTC_CALALR_DATE(bin2bcd(timeptr->tm_mday)); |
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} |
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return calalr; |
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} |
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static uint32_t rtc_sam_alarm_mask_from_timalr(uint32_t timalr) |
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{ |
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uint32_t mask = 0; |
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if (timalr & RTC_TIMALR_SECEN) { |
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mask |= RTC_ALARM_TIME_MASK_SECOND; |
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} |
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if (timalr & RTC_TIMALR_MINEN) { |
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mask |= RTC_ALARM_TIME_MASK_MINUTE; |
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} |
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if (timalr & RTC_TIMALR_HOUREN) { |
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mask |= RTC_ALARM_TIME_MASK_HOUR; |
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} |
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return mask; |
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} |
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static uint32_t rtc_sam_alarm_mask_from_calalr(uint32_t calalr) |
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{ |
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uint32_t mask = 0; |
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if (calalr & RTC_CALALR_MTHEN) { |
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mask |= RTC_ALARM_TIME_MASK_MONTH; |
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} |
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if (calalr & RTC_CALALR_DATEEN) { |
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mask |= RTC_ALARM_TIME_MASK_MONTHDAY; |
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} |
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return mask; |
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} |
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static void rtc_sam_tm_from_timalr_calalr(struct rtc_time *timeptr, uint32_t mask, |
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uint32_t timalr, uint32_t calalr) |
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{ |
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memset(timeptr, 0x00, sizeof(*timeptr)); |
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if (mask & RTC_ALARM_TIME_MASK_SECOND) { |
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timeptr->tm_sec = bcd2bin(RTC_SAM_REG_GET_FIELD(timalr, TIMALR_SEC)); |
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} |
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if (mask & RTC_ALARM_TIME_MASK_MINUTE) { |
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timeptr->tm_min = bcd2bin(RTC_SAM_REG_GET_FIELD(timalr, TIMALR_MIN)); |
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} |
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if (mask & RTC_ALARM_TIME_MASK_HOUR) { |
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timeptr->tm_hour = bcd2bin(RTC_SAM_REG_GET_FIELD(timalr, TIMALR_HOUR)); |
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} |
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if (mask & RTC_ALARM_TIME_MASK_MONTHDAY) { |
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timeptr->tm_mday = bcd2bin(RTC_SAM_REG_GET_FIELD(calalr, CALALR_DATE)); |
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} |
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if (mask & RTC_ALARM_TIME_MASK_MONTH) { |
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timeptr->tm_mon = bcd2bin(RTC_SAM_REG_GET_FIELD(calalr, CALALR_MONTH)) - 1; |
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} |
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} |
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static int rtc_sam_alarm_get_supported_fields(const struct device *dev, uint16_t id, |
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uint16_t *mask) |
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{ |
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ARG_UNUSED(dev); |
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ARG_UNUSED(id); |
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*mask = rtc_sam_alarm_get_supported_mask(); |
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return 0; |
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} |
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static int rtc_sam_alarm_set_time(const struct device *dev, uint16_t id, uint16_t mask, |
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const struct rtc_time *timeptr) |
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{ |
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struct rtc_sam_data *data = dev->data; |
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const struct rtc_sam_config *config = dev->config; |
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Rtc *regs = config->regs; |
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uint32_t timalr; |
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uint32_t calalr; |
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uint32_t mask_supported; |
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mask_supported = rtc_sam_alarm_get_supported_mask(); |
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if ((id != 0)) { |
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return -EINVAL; |
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} |
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if ((mask > 0) && (timeptr == NULL)) { |
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return -EINVAL; |
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} |
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if (mask & ~mask_supported) { |
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return -EINVAL; |
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} |
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if (rtc_utils_validate_rtc_time(timeptr, mask) == false) { |
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return -EINVAL; |
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} |
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timalr = rtc_atmel_timalr_from_tm(timeptr, mask); |
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calalr = rtc_atmel_calalr_from_tm(timeptr, mask); |
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k_spinlock_key_t key = k_spin_lock(&data->lock); |
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irq_disable(config->irq_num); |
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rtc_sam_disable_wp(); |
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/* Set RTC alarm time */ |
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regs->RTC_TIMALR = timalr; |
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regs->RTC_CALALR = calalr; |
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rtc_sam_enable_wp(); |
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/* Clear alarm pending status */ |
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regs->RTC_SCCR = RTC_SCCR_ALRCLR; |
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irq_enable(config->irq_num); |
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k_spin_unlock(&data->lock, key); |
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return 0; |
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} |
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static int rtc_sam_alarm_get_time(const struct device *dev, uint16_t id, uint16_t *mask, |
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struct rtc_time *timeptr) |
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{ |
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struct rtc_sam_data *data = dev->data; |
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const struct rtc_sam_config *config = dev->config; |
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Rtc *regs = config->regs; |
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uint32_t timalr; |
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uint32_t calalr; |
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if ((id != 0) || (mask == NULL) || (timeptr == NULL)) { |
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return -EINVAL; |
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} |
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k_spinlock_key_t key = k_spin_lock(&data->lock); |
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timalr = regs->RTC_TIMALR; |
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calalr = regs->RTC_CALALR; |
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k_spin_unlock(&data->lock, key); |
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*mask = rtc_sam_alarm_mask_from_timalr(timalr); |
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*mask |= rtc_sam_alarm_mask_from_calalr(calalr); |
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rtc_sam_tm_from_timalr_calalr(timeptr, *mask, timalr, calalr); |
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return 0; |
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} |
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static int rtc_sam_alarm_is_pending(const struct device *dev, uint16_t id) |
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{ |
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struct rtc_sam_data *data = dev->data; |
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const struct rtc_sam_config *config = dev->config; |
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Rtc *regs = config->regs; |
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if (id != 0) { |
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return -EINVAL; |
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} |
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k_spinlock_key_t key = k_spin_lock(&data->lock); |
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if ((regs->RTC_SR & RTC_SR_ALARM) == 0) { |
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k_spin_unlock(&data->lock, key); |
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return 0; |
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} |
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regs->RTC_SCCR = RTC_SCCR_ALRCLR; |
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k_spin_unlock(&data->lock, key); |
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return 1; |
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} |
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static int rtc_sam_alarm_set_callback(const struct device *dev, uint16_t id, |
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rtc_alarm_callback callback, void *user_data) |
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{ |
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struct rtc_sam_data *data = dev->data; |
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const struct rtc_sam_config *config = dev->config; |
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Rtc *regs = config->regs; |
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if (id != 0) { |
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return -EINVAL; |
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} |
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k_spinlock_key_t key = k_spin_lock(&data->lock); |
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irq_disable(config->irq_num); |
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data->alarm_callback = callback; |
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data->alarm_user_data = user_data; |
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if (data->alarm_callback) { |
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regs->RTC_IER = RTC_IER_ALREN; |
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} else { |
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regs->RTC_IDR = RTC_IDR_ALRDIS; |
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} |
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irq_enable(config->irq_num); |
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k_spin_unlock(&data->lock, key); |
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return 0; |
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} |
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#endif /* CONFIG_RTC_ALARM */ |
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#ifdef CONFIG_RTC_UPDATE |
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static int rtc_sam_update_set_callback(const struct device *dev, rtc_update_callback callback, |
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void *user_data) |
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{ |
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struct rtc_sam_data *data = dev->data; |
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const struct rtc_sam_config *config = dev->config; |
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Rtc *regs = config->regs; |
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k_spinlock_key_t key = k_spin_lock(&data->lock); |
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irq_disable(config->irq_num); |
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data->update_callback = callback; |
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data->update_user_data = user_data; |
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if (data->update_callback) { |
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regs->RTC_IER = RTC_IER_SECEN; |
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} else { |
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regs->RTC_IDR = RTC_IDR_SECDIS; |
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} |
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irq_enable(config->irq_num); |
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k_spin_unlock(&data->lock, key); |
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return 0; |
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} |
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#endif /* CONFIG_RTC_UPDATE */ |
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#ifdef CONFIG_RTC_CALIBRATION |
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static int rtc_sam_set_calibration(const struct device *dev, int32_t calibration) |
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{ |
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struct rtc_sam_data *data = dev->data; |
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const struct rtc_sam_config *config = dev->config; |
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Rtc *regs = config->regs; |
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bool negative_calibration; |
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bool high_calibration; |
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uint32_t slow_clock_calibration; |
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uint32_t mr; |
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if ((calibration < RTC_SAM_CALIBRATE_PPB_MIN) || |
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(calibration > RTC_SAM_CALIBRATE_PPB_MAX)) { |
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return -EINVAL; |
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} |
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/* The value written to the register is absolute */ |
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if (calibration < 0) { |
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negative_calibration = true; |
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calibration = -calibration; |
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} else { |
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negative_calibration = false; |
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} |
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/* |
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* Formula adapted from |
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* Atmel-11157-32-bit-Cortex-M4-Microcontroller-SAM4E16-SAM4E8_Datasheet.pdf |
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* section 15.6.2 |
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* |
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* Formula if RTC_MR_HIGHPPM is 0 |
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* |
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* RTC_MR_CORRECTION = (3906 / (20 * ppm)) - 1 |
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* |
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* Formula if RTC_MR_HIGHPPM is 1 |
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* |
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* RTC_MR_CORRECTION = (3906 / ppm) - 1 |
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* |
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* Since we are working with ppb, we adapt the formula by increasing the |
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* terms of the fraction by 1000, turning the ppm into ppb |
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* |
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* Adapted formula if RTC_MR_HIGHPPM is 0 |
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* |
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* RTC_MR_CORRECTION = (3906000 / (20 * ppb)) - 1 |
|
* |
|
* Adapted formula if RTC_MR_HIGHPPM is 1 |
|
* |
|
* RTC_MR_CORRECTION = (3906000 / ppb) - 1 |
|
*/ |
|
if (calibration < RTC_SAM_CALIBRATE_PPB_QUANTA) { |
|
high_calibration = false; |
|
slow_clock_calibration = 0; |
|
} else if (calibration < RTC_SAM_CALIBRATE_PPB_LOW_SCALE) { |
|
high_calibration = false; |
|
slow_clock_calibration = (uint32_t)((3906000 / (20 * calibration)) - 1); |
|
} else { |
|
high_calibration = true; |
|
slow_clock_calibration = (uint32_t)((3906000 / calibration) - 1); |
|
} |
|
|
|
k_spinlock_key_t key = k_spin_lock(&data->lock); |
|
|
|
rtc_sam_disable_wp(); |
|
|
|
mr = regs->RTC_MR; |
|
|
|
if (negative_calibration == true) { |
|
mr |= RTC_MR_NEGPPM; |
|
} else { |
|
mr &= ~RTC_MR_NEGPPM; |
|
} |
|
|
|
mr &= ~RTC_MR_CORRECTION_Msk; |
|
mr |= RTC_MR_CORRECTION(slow_clock_calibration); |
|
|
|
if (high_calibration == true) { |
|
mr |= RTC_MR_HIGHPPM; |
|
} else { |
|
mr &= ~RTC_MR_HIGHPPM; |
|
} |
|
|
|
regs->RTC_MR = mr; |
|
|
|
rtc_sam_enable_wp(); |
|
|
|
k_spin_unlock(&data->lock, key); |
|
|
|
return 0; |
|
} |
|
|
|
static int rtc_sam_get_calibration(const struct device *dev, int32_t *calibration) |
|
{ |
|
const struct rtc_sam_config *config = dev->config; |
|
Rtc *regs = config->regs; |
|
|
|
uint32_t mr; |
|
int32_t correction; |
|
|
|
if (calibration == NULL) { |
|
return -EINVAL; |
|
} |
|
|
|
mr = regs->RTC_MR; |
|
|
|
correction = (int32_t)RTC_SAM_REG_GET_FIELD(mr, MR_CORRECTION); |
|
|
|
/* Formula documented in rtc_sam_set_calibration() */ |
|
if (correction == 0) { |
|
*calibration = 0; |
|
} else if (mr & RTC_MR_HIGHPPM) { |
|
*calibration = 3906000 / (correction + 1); |
|
} else { |
|
*calibration = 3906000 / ((correction + 1) * 20); |
|
} |
|
|
|
if (mr & RTC_MR_NEGPPM) { |
|
*calibration = -*calibration; |
|
} |
|
|
|
return 0; |
|
} |
|
#endif /* CONFIG_RTC_CALIBRATION */ |
|
|
|
static DEVICE_API(rtc, rtc_sam_driver_api) = { |
|
.set_time = rtc_sam_set_time, |
|
.get_time = rtc_sam_get_time, |
|
#ifdef CONFIG_RTC_ALARM |
|
.alarm_get_supported_fields = rtc_sam_alarm_get_supported_fields, |
|
.alarm_set_time = rtc_sam_alarm_set_time, |
|
.alarm_get_time = rtc_sam_alarm_get_time, |
|
.alarm_is_pending = rtc_sam_alarm_is_pending, |
|
.alarm_set_callback = rtc_sam_alarm_set_callback, |
|
#endif /* CONFIG_RTC_ALARM */ |
|
#ifdef CONFIG_RTC_UPDATE |
|
.update_set_callback = rtc_sam_update_set_callback, |
|
#endif /* CONFIG_RTC_UPDATE */ |
|
#ifdef CONFIG_RTC_CALIBRATION |
|
.set_calibration = rtc_sam_set_calibration, |
|
.get_calibration = rtc_sam_get_calibration, |
|
#endif /* CONFIG_RTC_CALIBRATION */ |
|
}; |
|
|
|
static int rtc_sam_init(const struct device *dev) |
|
{ |
|
struct rtc_sam_data *data = dev->data; |
|
const struct rtc_sam_config *config = dev->config; |
|
Rtc *regs = config->regs; |
|
|
|
rtc_sam_disable_wp(); |
|
#ifdef RTC_MR_PERSIAN |
|
regs->RTC_MR &= ~(RTC_MR_HRMOD | RTC_MR_PERSIAN); |
|
#else |
|
regs->RTC_MR &= ~RTC_MR_HRMOD; |
|
#endif |
|
regs->RTC_CR = 0; |
|
rtc_sam_enable_wp(); |
|
regs->RTC_IDR = (RTC_IDR_ACKDIS |
|
| RTC_IDR_ALRDIS |
|
| RTC_IDR_SECDIS |
|
| RTC_IDR_TIMDIS |
|
| RTC_IDR_CALDIS |
|
| RTC_IDR_TDERRDIS); |
|
|
|
k_sem_init(&data->cr_sec_evt_sem, 0, 1); |
|
k_sem_init(&data->cr_upd_ack_sem, 0, 1); |
|
config->irq_init_fn_ptr(); |
|
irq_enable(config->irq_num); |
|
return 0; |
|
} |
|
|
|
#define RTC_SAM_DEVICE(id) \ |
|
static void rtc_sam_irq_init_##id(void) \ |
|
{ \ |
|
IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority), \ |
|
rtc_sam_isr, DEVICE_DT_INST_GET(id), 0); \ |
|
} \ |
|
\ |
|
static const struct rtc_sam_config rtc_sam_config_##id = { \ |
|
.regs = (Rtc *)DT_INST_REG_ADDR(id), \ |
|
.irq_num = DT_INST_IRQN(id), \ |
|
.irq_init_fn_ptr = rtc_sam_irq_init_##id, \ |
|
}; \ |
|
\ |
|
static struct rtc_sam_data rtc_sam_data_##id; \ |
|
\ |
|
DEVICE_DT_INST_DEFINE(id, rtc_sam_init, NULL, \ |
|
&rtc_sam_data_##id, \ |
|
&rtc_sam_config_##id, POST_KERNEL, \ |
|
CONFIG_RTC_INIT_PRIORITY, \ |
|
&rtc_sam_driver_api); |
|
|
|
DT_INST_FOREACH_STATUS_OKAY(RTC_SAM_DEVICE);
|
|
|