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339 lines
11 KiB
339 lines
11 KiB
/* |
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* Copyright 2024 NXP |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#define DT_DRV_COMPAT nxp_flexio_pwm |
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#include <errno.h> |
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#include <zephyr/drivers/pwm.h> |
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#include <fsl_flexio.h> |
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#include <fsl_clock.h> |
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#include <zephyr/drivers/pinctrl.h> |
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#include <zephyr/drivers/clock_control.h> |
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#include <zephyr/logging/log.h> |
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#include <zephyr/drivers/misc/nxp_flexio/nxp_flexio.h> |
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LOG_MODULE_REGISTER(pwm_nxp_flexio, CONFIG_PWM_LOG_LEVEL); |
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#define FLEXIO_PWM_TIMER_CMP_MAX_VALUE (0xFFFFU) |
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#define FLEXIO_PWM_TIMCMP_CMP_UPPER_SHIFT (0x8U) |
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#define FLEXIO_MAX_PWM_CHANNELS 8 |
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enum pwm_nxp_flexio_polarity { |
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FLEXIO_PWM_ACTIVE_HIGH = 0x0U, |
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FLEXIO_PWM_ACTIVE_LOW = 0x1U |
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}; |
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enum pwm_nxp_flexio_timerinit { |
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/** Timer Initial output is logic one */ |
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FLEXIO_PWM_TIMER_INIT_HIGH = 0x00U, |
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/** Timer Initial output is logic zero */ |
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FLEXIO_PWM_TIMER_INIT_LOW = 0x1U |
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}; |
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enum pwm_nxp_flexio_prescaler { |
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/* Decrement counter on Flexio clock */ |
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FLEXIO_PWM_CLK_DIV_1 = 0U, |
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/* Decrement counter on Flexio clock divided by 16 */ |
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FLEXIO_PWM_CLK_DIV_16 = 4U, |
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/* Decrement counter on Flexio clock divided by 256 */ |
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FLEXIO_PWM_CLK_DIV_256 = 5U |
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}; |
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enum pwm_nxp_flexio_timer_mode { |
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/** Timer disabled */ |
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FLEXIO_PWM_TIMER_DISABLED = 0x00U, |
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/** Timer in 8 bit Pwm High mode */ |
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FLEXIO_PWM_TIMER_PWM_HIGH = 0x02U, |
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/** Timer in 8 bit Pwm Low mode */ |
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FLEXIO_PWM_TIMER_PWM_LOW = 0x06U |
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}; |
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enum pwm_nxp_flexio_timer_pin { |
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/** Timer Pin output disabled */ |
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FLEXIO_PWM_TIMER_PIN_OUTPUT_DISABLE = 0x00U, |
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/** Timer Pin Output mode */ |
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FLEXIO_PWM_TIMER_PIN_OUTPUT_ENABLE = 0x03U |
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}; |
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struct pwm_nxp_flexio_channel_config { |
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/** Flexio used pin index */ |
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uint8_t pin_id; |
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/** Counter decrement clock prescaler */ |
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enum pwm_nxp_flexio_prescaler prescaler; |
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/** Actual Prescaler divisor */ |
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uint8_t prescaler_div; |
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}; |
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struct pwm_nxp_flexio_pulse_info { |
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uint8_t pwm_pulse_channels; |
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struct pwm_nxp_flexio_channel_config *pwm_info; |
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}; |
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struct pwm_nxp_flexio_config { |
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const struct device *flexio_dev; |
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FLEXIO_Type *flexio_base; |
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const struct pinctrl_dev_config *pincfg; |
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const struct device *clock_dev; |
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clock_control_subsys_t clock_subsys; |
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const struct pwm_nxp_flexio_pulse_info *pulse_info; |
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const struct nxp_flexio_child *child; |
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}; |
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struct pwm_nxp_flexio_data { |
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uint32_t period_cycles[FLEXIO_MAX_PWM_CHANNELS]; |
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uint32_t flexio_clk; |
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}; |
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static int pwm_nxp_flexio_set_cycles(const struct device *dev, |
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uint32_t channel, uint32_t period_cycles, |
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uint32_t pulse_cycles, pwm_flags_t flags) |
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{ |
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const struct pwm_nxp_flexio_config *config = dev->config; |
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struct pwm_nxp_flexio_data *data = dev->data; |
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flexio_timer_config_t timerConfig; |
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struct pwm_nxp_flexio_channel_config *pwm_info; |
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FLEXIO_Type *flexio_base = (FLEXIO_Type *)(config->flexio_base); |
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struct nxp_flexio_child *child = (struct nxp_flexio_child *)(config->child); |
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enum pwm_nxp_flexio_polarity polarity; |
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/* Check received parameters for sanity */ |
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if (channel >= config->pulse_info->pwm_pulse_channels) { |
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LOG_ERR("Invalid channel"); |
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return -EINVAL; |
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} |
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if (period_cycles == 0) { |
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LOG_ERR("Channel can not be set to inactive level"); |
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return -ENOTSUP; |
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} |
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if (FLEXIO_PWM_TIMER_CMP_MAX_VALUE <= (uint16_t)pulse_cycles) { |
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LOG_ERR("Duty cycle is out of range"); |
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return -EINVAL; |
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} |
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if (FLEXIO_PWM_TIMER_CMP_MAX_VALUE <= (uint16_t)(period_cycles - pulse_cycles)) { |
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LOG_ERR("low period of the cycle is out of range"); |
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return -EINVAL; |
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} |
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if (pulse_cycles > period_cycles) { |
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LOG_ERR("Duty cycle cannot be greater than 100 percent"); |
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return -EINVAL; |
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} |
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pwm_info = &config->pulse_info->pwm_info[channel]; |
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if ((flags & PWM_POLARITY_INVERTED) == 0) { |
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polarity = FLEXIO_PWM_ACTIVE_HIGH; |
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} else { |
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polarity = FLEXIO_PWM_ACTIVE_LOW; |
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} |
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if (polarity == FLEXIO_PWM_ACTIVE_HIGH) { |
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timerConfig.timerOutput = kFLEXIO_TimerOutputOneNotAffectedByReset; |
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timerConfig.timerMode = kFLEXIO_TimerModeDual8BitPWM; |
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} else { |
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timerConfig.timerOutput = kFLEXIO_TimerOutputZeroNotAffectedByReset; |
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timerConfig.timerMode = kFLEXIO_TimerModeDual8BitPWMLow; |
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} |
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data->period_cycles[channel] = period_cycles; |
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timerConfig.timerCompare = ((uint8_t)(pulse_cycles - 1U)) | |
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((uint8_t)(data->period_cycles[channel] - pulse_cycles - 1U) |
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<< FLEXIO_PWM_TIMCMP_CMP_UPPER_SHIFT); |
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timerConfig.timerDecrement = pwm_info->prescaler; |
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timerConfig.timerStop = kFLEXIO_TimerStopBitDisabled; |
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timerConfig.timerEnable = kFLEXIO_TimerEnabledAlways; |
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timerConfig.timerDisable = kFLEXIO_TimerDisableNever; |
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timerConfig.timerStart = kFLEXIO_TimerStartBitDisabled; |
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timerConfig.timerReset = kFLEXIO_TimerResetNever; |
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timerConfig.triggerSource = kFLEXIO_TimerTriggerSourceInternal; |
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/* Enable the pin out for the selected timer */ |
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timerConfig.pinConfig = FLEXIO_PWM_TIMER_PIN_OUTPUT_ENABLE; |
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timerConfig.pinPolarity = polarity; |
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/* Select the pin that the selected timer will output the signal on */ |
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timerConfig.pinSelect = pwm_info->pin_id; |
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FLEXIO_SetTimerConfig(flexio_base, child->res.timer_index[channel], &timerConfig); |
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#if (defined(FSL_FEATURE_FLEXIO_HAS_PIN_REGISTER) && FSL_FEATURE_FLEXIO_HAS_PIN_REGISTER) |
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/* Disable pin override if active to support channels working in cases not 0% 100% */ |
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if (FLEXIO_GetPinOverride(flexio_base, pwm_info->pin_id)) { |
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FLEXIO_ConfigPinOverride(flexio_base, pwm_info->pin_id, false); |
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} |
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#endif |
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return 0; |
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} |
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static int pwm_nxp_flexio_get_cycles_per_sec(const struct device *dev, |
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uint32_t channel, |
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uint64_t *cycles) |
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{ |
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const struct pwm_nxp_flexio_config *config = dev->config; |
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struct pwm_nxp_flexio_data *data = dev->data; |
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struct pwm_nxp_flexio_channel_config *pwm_info; |
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/* If get_cycles is called directly after init */ |
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if (data->period_cycles[channel] == 0) { |
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LOG_ERR("First set the period of this channel to a non zero value"); |
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return -ENOTSUP; |
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} |
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pwm_info = &config->pulse_info->pwm_info[channel]; |
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*cycles = (uint64_t)(((data->flexio_clk) * 2) / |
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((data->period_cycles[channel]) * (pwm_info->prescaler_div))); |
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return 0; |
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} |
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static int mcux_flexio_pwm_init(const struct device *dev) |
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{ |
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const struct pwm_nxp_flexio_config *config = dev->config; |
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struct pwm_nxp_flexio_data *data = dev->data; |
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flexio_timer_config_t timerConfig; |
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uint8_t ch_id = 0; |
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int err; |
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struct pwm_nxp_flexio_channel_config *pwm_info; |
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FLEXIO_Type *flexio_base = (FLEXIO_Type *)(config->flexio_base); |
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struct nxp_flexio_child *child = (struct nxp_flexio_child *)(config->child); |
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if (!device_is_ready(config->clock_dev)) { |
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return -ENODEV; |
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} |
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if (clock_control_get_rate(config->clock_dev, config->clock_subsys, |
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&data->flexio_clk)) { |
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return -EINVAL; |
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} |
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err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT); |
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if (err) { |
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return err; |
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} |
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err = nxp_flexio_child_attach(config->flexio_dev, child); |
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if (err < 0) { |
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return err; |
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} |
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for (ch_id = 0; ch_id < config->pulse_info->pwm_pulse_channels; ch_id++) { |
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pwm_info = &config->pulse_info->pwm_info[ch_id]; |
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/* Reset timer settings */ |
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(void)memset(&timerConfig, 0, sizeof(timerConfig)); |
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FLEXIO_SetTimerConfig(flexio_base, child->res.timer_index[ch_id], &timerConfig); |
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#if (defined(FSL_FEATURE_FLEXIO_HAS_PIN_REGISTER) && FSL_FEATURE_FLEXIO_HAS_PIN_REGISTER) |
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/* Reset the value driven on the corresponding pin */ |
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FLEXIO_SetPinLevel(flexio_base, pwm_info->pin_id, false); |
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FLEXIO_ConfigPinOverride(flexio_base, pwm_info->pin_id, false); |
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#endif |
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/* Timer output is logic one and is not affected by timer reset */ |
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timerConfig.timerOutput = kFLEXIO_TimerOutputOneNotAffectedByReset; |
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/* Set the timer mode to dual 8-bit counter PWM high */ |
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timerConfig.timerMode = kFLEXIO_TimerModeDual8BitPWM; |
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/* Timer scaling factor w.r.t Flexio Clock */ |
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timerConfig.timerDecrement = pwm_info->prescaler; |
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/* Program the PWM pulse */ |
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timerConfig.timerCompare = 0; |
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/* Configure Timer CFG and CTL bits to support PWM mode */ |
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timerConfig.timerStop = kFLEXIO_TimerStopBitDisabled; |
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timerConfig.timerEnable = kFLEXIO_TimerEnabledAlways; |
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timerConfig.timerDisable = kFLEXIO_TimerDisableNever; |
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timerConfig.timerStart = kFLEXIO_TimerStartBitDisabled; |
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timerConfig.timerReset = kFLEXIO_TimerResetNever; |
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timerConfig.triggerSource = kFLEXIO_TimerTriggerSourceInternal; |
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/* Enable the pin out and set a default polarity for the selected timer */ |
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timerConfig.pinConfig = FLEXIO_PWM_TIMER_PIN_OUTPUT_ENABLE; |
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timerConfig.pinPolarity = kFLEXIO_PinActiveHigh; |
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/* Select the pin that the selected timer will output the signal on */ |
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timerConfig.pinSelect = pwm_info->pin_id; |
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FLEXIO_SetTimerConfig(flexio_base, child->res.timer_index[ch_id], &timerConfig); |
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} |
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return 0; |
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} |
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static DEVICE_API(pwm, pwm_nxp_flexio_driver_api) = { |
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.set_cycles = pwm_nxp_flexio_set_cycles, |
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.get_cycles_per_sec = pwm_nxp_flexio_get_cycles_per_sec, |
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}; |
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#define _FLEXIO_PWM_PULSE_GEN_CONFIG(n) \ |
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{ \ |
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.pin_id = DT_PROP(n, pin_id), \ |
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.prescaler = _CONCAT(FLEXIO_PWM_CLK_DIV_, DT_PROP(n, prescaler)), \ |
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.prescaler_div = DT_PROP(n, prescaler), \ |
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}, |
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#define FLEXIO_PWM_PULSE_GEN_CONFIG(n) \ |
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static struct pwm_nxp_flexio_channel_config flexio_pwm_##n##_init[] = { \ |
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DT_INST_FOREACH_CHILD_STATUS_OKAY(n, _FLEXIO_PWM_PULSE_GEN_CONFIG) \ |
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}; \ |
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static const struct pwm_nxp_flexio_pulse_info flexio_pwm_##n##_info = { \ |
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.pwm_pulse_channels = ARRAY_SIZE(flexio_pwm_##n##_init), \ |
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.pwm_info = flexio_pwm_##n##_init, \ |
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}; |
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#define FLEXIO_PWM_TIMER_INDEX_INIT(n) \ |
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static uint8_t flexio_pwm_##n##_timer_index[ARRAY_SIZE(flexio_pwm_##n##_init)]; |
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#define FLEXIO_PWM_CHILD_CONFIG(n) \ |
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static const struct nxp_flexio_child mcux_flexio_pwm_child_##n = { \ |
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.isr = NULL, \ |
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.user_data = NULL, \ |
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.res = { \ |
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.shifter_index = NULL, \ |
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.shifter_count = 0, \ |
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.timer_index = (uint8_t *)flexio_pwm_##n##_timer_index, \ |
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.timer_count = ARRAY_SIZE(flexio_pwm_##n##_init) \ |
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} \ |
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}; |
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#define FLEXIO_PWM_PULSE_GEN_GET_CONFIG(n) \ |
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.pulse_info = &flexio_pwm_##n##_info, |
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#define PWM_NXP_FLEXIO_PWM_INIT(n) \ |
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PINCTRL_DT_INST_DEFINE(n); \ |
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FLEXIO_PWM_PULSE_GEN_CONFIG(n) \ |
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FLEXIO_PWM_TIMER_INDEX_INIT(n) \ |
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FLEXIO_PWM_CHILD_CONFIG(n) \ |
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static const struct pwm_nxp_flexio_config pwm_nxp_flexio_config_##n = { \ |
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.flexio_dev = DEVICE_DT_GET(DT_INST_PARENT(n)), \ |
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.flexio_base = (FLEXIO_Type *)DT_REG_ADDR(DT_INST_PARENT(n)), \ |
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.pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \ |
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.clock_dev = DEVICE_DT_GET(DT_CLOCKS_CTLR(DT_INST_PARENT(n))), \ |
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.clock_subsys = (clock_control_subsys_t)DT_CLOCKS_CELL(DT_INST_PARENT(n), name),\ |
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.child = &mcux_flexio_pwm_child_##n, \ |
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FLEXIO_PWM_PULSE_GEN_GET_CONFIG(n) \ |
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}; \ |
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\ |
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static struct pwm_nxp_flexio_data pwm_nxp_flexio_data_##n; \ |
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DEVICE_DT_INST_DEFINE(n, \ |
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&mcux_flexio_pwm_init, \ |
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NULL, \ |
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&pwm_nxp_flexio_data_##n, \ |
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&pwm_nxp_flexio_config_##n, \ |
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POST_KERNEL, CONFIG_PWM_INIT_PRIORITY, \ |
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&pwm_nxp_flexio_driver_api); |
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DT_INST_FOREACH_STATUS_OKAY(PWM_NXP_FLEXIO_PWM_INIT)
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