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464 lines
11 KiB
464 lines
11 KiB
/* |
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* Copyright (c) 2019 Intel Corporation |
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* Copyright (c) 2022 Microchip Technololgy Inc. |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#define DT_DRV_COMPAT microchip_xec_pwm |
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#include <errno.h> |
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#include <stdlib.h> |
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#include <stdint.h> |
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#include <zephyr/device.h> |
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#include <zephyr/drivers/pwm.h> |
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#ifdef CONFIG_SOC_SERIES_MEC172X |
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#include <zephyr/drivers/clock_control/mchp_xec_clock_control.h> |
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#include <zephyr/drivers/interrupt_controller/intc_mchp_xec_ecia.h> |
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#endif |
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#include <zephyr/drivers/pinctrl.h> |
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#include <zephyr/logging/log.h> |
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#include <zephyr/pm/device.h> |
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#include <soc.h> |
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LOG_MODULE_REGISTER(pwm_mchp_xec, CONFIG_PWM_LOG_LEVEL); |
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/* Minimal on/off are 1 & 1 both are incremented, so 4. |
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* 0 cannot be set (used for full low/high output) so a |
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* combination of on_off of 2 is not possible. |
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*/ |
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#define XEC_PWM_LOWEST_ON_OFF 4U |
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/* Maximal on/off are UINT16_T, both are incremented. |
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* Multiplied by the highest divider: 16 |
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*/ |
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#define XEC_PWM_HIGHEST_ON_OFF (2U * (UINT16_MAX + 1U) * 16U) |
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#define XEC_PWM_MIN_HIGH_CLK_FREQ \ |
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(MCHP_PWM_INPUT_FREQ_HI / XEC_PWM_HIGHEST_ON_OFF) |
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#define XEC_PWM_MAX_LOW_CLK_FREQ \ |
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(MCHP_PWM_INPUT_FREQ_LO / XEC_PWM_LOWEST_ON_OFF) |
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/* Precision factor for frequency calculation |
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* To mitigate frequency comparision up to the first digit after 0. |
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*/ |
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#define XEC_PWM_FREQ_PF 10U |
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/* Precision factor for DC calculation |
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* To avoid losing some digits after 0. |
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*/ |
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#define XEC_PWM_DC_PF 100000U |
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/* Lowest reachable frequency */ |
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#define XEC_PWM_FREQ_LIMIT 1 /* 0.1hz * XEC_PWM_FREQ_PF */ |
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struct pwm_xec_config { |
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struct pwm_regs * const regs; |
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uint8_t pcr_idx; |
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uint8_t pcr_pos; |
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const struct pinctrl_dev_config *pcfg; |
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}; |
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struct xec_params { |
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uint32_t on; |
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uint32_t off; |
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uint8_t div; |
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}; |
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struct pwm_xec_data { |
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uint32_t config; |
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}; |
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#define NUM_DIV_ELEMS 16 |
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static const uint32_t max_freq_high_on_div[NUM_DIV_ELEMS] = { |
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48000000, |
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24000000, |
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16000000, |
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12000000, |
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9600000, |
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8000000, |
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6857142, |
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6000000, |
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5333333, |
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4800000, |
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4363636, |
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4000000, |
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3692307, |
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3428571, |
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3200000, |
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3000000, |
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}; |
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static const uint32_t max_freq_low_on_div[NUM_DIV_ELEMS] = { |
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100000, |
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50000, |
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33333, |
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25000, |
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20000, |
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16666, |
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14285, |
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12500, |
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11111, |
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10000, |
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9090, |
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8333, |
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7692, |
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7142, |
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6666, |
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6250, |
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}; |
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static uint32_t xec_compute_frequency(uint32_t clk, uint32_t on, uint32_t off) |
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{ |
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return ((clk * XEC_PWM_FREQ_PF)/((on + 1) + (off + 1))); |
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} |
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static uint16_t xec_select_div(uint32_t freq, const uint32_t max_freq[16]) |
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{ |
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uint8_t i; |
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if (freq >= max_freq[3]) { |
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return 0; |
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} |
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freq *= XEC_PWM_LOWEST_ON_OFF; |
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for (i = 0; i < 15; i++) { |
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if (freq >= max_freq[i]) { |
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break; |
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} |
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} |
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return i; |
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} |
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static void xec_compute_on_off(uint32_t freq, uint32_t dc, uint32_t clk, |
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uint32_t *on, uint32_t *off) |
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{ |
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uint64_t on_off; |
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on_off = (clk * 10) / freq; |
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*on = ((on_off * dc) / XEC_PWM_DC_PF) - 1; |
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*off = on_off - *on - 2; |
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} |
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static uint32_t xec_compute_dc(uint32_t on, uint32_t off) |
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{ |
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int dc = (on + 1) + (off + 1); |
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/* Make calculation in uint64_t since XEC_PWM_DC_PF is large */ |
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dc = (((uint64_t)(on + 1) * XEC_PWM_DC_PF) / dc); |
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return (uint32_t)dc; |
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} |
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static uint16_t xec_compare_div_on_off(uint32_t target_freq, uint32_t dc, |
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const uint32_t max_freq[16], |
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uint8_t div_a, uint8_t div_b, |
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uint32_t *on_a, uint32_t *off_a) |
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{ |
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uint32_t freq_a, freq_b, on_b, off_b; |
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xec_compute_on_off(target_freq, dc, max_freq[div_a], |
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on_a, off_a); |
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freq_a = xec_compute_frequency(max_freq[div_a], *on_a, *off_a); |
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xec_compute_on_off(target_freq, dc, max_freq[div_b], |
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&on_b, &off_b); |
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freq_b = xec_compute_frequency(max_freq[div_b], on_b, off_b); |
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if ((target_freq - freq_a) < (target_freq - freq_b)) { |
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if ((*on_a <= UINT16_MAX) && (*off_a <= UINT16_MAX)) { |
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return div_a; |
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} |
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} |
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if ((on_b <= UINT16_MAX) && (off_b <= UINT16_MAX)) { |
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*on_a = on_b; |
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*off_a = off_b; |
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return div_b; |
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} |
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return div_a; |
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} |
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static uint8_t xec_select_best_div_on_off(uint32_t target_freq, uint32_t dc, |
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const uint32_t max_freq[16], |
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uint32_t *on, uint32_t *off) |
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{ |
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int div_comp; |
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uint8_t div; |
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div = xec_select_div(target_freq, max_freq); |
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for (div_comp = (int)div - 1; div_comp >= 0; div_comp--) { |
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div = xec_compare_div_on_off(target_freq, dc, max_freq, |
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div, div_comp, on, off); |
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} |
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return div; |
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} |
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static struct xec_params *xec_compare_params(uint32_t target_freq, |
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struct xec_params *hc_params, |
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struct xec_params *lc_params) |
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{ |
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struct xec_params *params; |
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uint32_t freq_h = 0; |
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uint32_t freq_l = 0; |
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if (hc_params->div < NUM_DIV_ELEMS) { |
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freq_h = xec_compute_frequency( |
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max_freq_high_on_div[hc_params->div], |
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hc_params->on, |
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hc_params->off); |
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} |
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if (lc_params->div < NUM_DIV_ELEMS) { |
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freq_l = xec_compute_frequency( |
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max_freq_low_on_div[lc_params->div], |
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lc_params->on, |
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lc_params->off); |
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} |
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if (abs((int)target_freq - (int)freq_h) < |
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abs((int)target_freq - (int)freq_l)) { |
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params = hc_params; |
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} else { |
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params = lc_params; |
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} |
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LOG_DBG("\tFrequency (x%u): %u", XEC_PWM_FREQ_PF, freq_h); |
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LOG_DBG("\tOn %s clock, ON %u OFF %u DIV %u", |
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params == hc_params ? "High" : "Low", |
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params->on, params->off, params->div); |
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return params; |
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} |
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static void xec_compute_and_set_parameters(const struct device *dev, |
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uint32_t target_freq, |
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uint32_t on, uint32_t off) |
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{ |
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const struct pwm_xec_config * const cfg = dev->config; |
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struct pwm_regs * const regs = cfg->regs; |
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bool compute_high, compute_low; |
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struct xec_params hc_params; |
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struct xec_params lc_params; |
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struct xec_params *params; |
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uint32_t dc, cfgval; |
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dc = xec_compute_dc(on, off); |
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compute_high = (target_freq >= XEC_PWM_MIN_HIGH_CLK_FREQ); |
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compute_low = (target_freq <= XEC_PWM_MAX_LOW_CLK_FREQ); |
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LOG_DBG("Target freq (x%u): %u and DC %u per-cent", |
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XEC_PWM_FREQ_PF, target_freq, (dc / 1000)); |
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if (compute_high) { |
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if (!compute_low |
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&& (on <= UINT16_MAX) |
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&& (off <= UINT16_MAX)) { |
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hc_params.on = on; |
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hc_params.off = off; |
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hc_params.div = 0; |
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lc_params.div = UINT8_MAX; |
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goto done; |
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} |
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hc_params.div = xec_select_best_div_on_off( |
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target_freq, dc, |
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max_freq_high_on_div, |
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&hc_params.on, |
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&hc_params.off); |
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LOG_DBG("Best div high: %u (on/off: %u/%u)", |
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hc_params.div, hc_params.on, hc_params.off); |
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} else { |
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hc_params.div = UINT8_MAX; |
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} |
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if (compute_low) { |
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lc_params.div = xec_select_best_div_on_off( |
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target_freq, dc, |
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max_freq_low_on_div, |
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&lc_params.on, |
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&lc_params.off); |
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LOG_DBG("Best div low: %u (on/off: %u/%u)", |
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lc_params.div, lc_params.on, lc_params.off); |
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} else { |
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lc_params.div = UINT8_MAX; |
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} |
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done: |
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regs->CONFIG &= ~MCHP_PWM_CFG_ENABLE; |
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cfgval = regs->CONFIG; |
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params = xec_compare_params(target_freq, &hc_params, &lc_params); |
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if (params == &hc_params) { |
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cfgval &= ~MCHP_PWM_CFG_CLK_SEL_100K; |
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} else { |
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cfgval |= MCHP_PWM_CFG_CLK_SEL_100K; |
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} |
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regs->COUNT_ON = params->on; |
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regs->COUNT_OFF = params->off; |
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cfgval &= ~MCHP_PWM_CFG_CLK_PRE_DIV(0xF); |
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cfgval |= MCHP_PWM_CFG_CLK_PRE_DIV(params->div); |
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cfgval |= MCHP_PWM_CFG_ENABLE; |
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regs->CONFIG = cfgval; |
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} |
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static int pwm_xec_set_cycles(const struct device *dev, uint32_t channel, |
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uint32_t period_cycles, uint32_t pulse_cycles, |
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pwm_flags_t flags) |
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{ |
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const struct pwm_xec_config * const cfg = dev->config; |
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struct pwm_regs * const regs = cfg->regs; |
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uint32_t target_freq; |
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uint32_t on, off; |
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if (channel > 0) { |
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return -EIO; |
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} |
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if (flags & PWM_POLARITY_INVERTED) { |
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regs->CONFIG |= MCHP_PWM_CFG_ON_POL_LO; |
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} |
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on = pulse_cycles; |
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off = period_cycles - pulse_cycles; |
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target_freq = xec_compute_frequency(MCHP_PWM_INPUT_FREQ_HI, on, off); |
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if (target_freq < XEC_PWM_FREQ_LIMIT) { |
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LOG_DBG("Target frequency below limit"); |
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return -EINVAL; |
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} |
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if ((pulse_cycles == 0U) && (period_cycles == 0U)) { |
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regs->CONFIG &= ~MCHP_PWM_CFG_ENABLE; |
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} else if ((pulse_cycles == 0U) && (period_cycles > 0U)) { |
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regs->COUNT_ON = 0; |
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regs->COUNT_OFF = 1; |
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} else if ((pulse_cycles > 0U) && (period_cycles == 0U)) { |
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regs->COUNT_ON = 1; |
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regs->COUNT_OFF = 0; |
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} else { |
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xec_compute_and_set_parameters(dev, target_freq, on, off); |
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} |
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return 0; |
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} |
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static int pwm_xec_get_cycles_per_sec(const struct device *dev, |
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uint32_t channel, uint64_t *cycles) |
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{ |
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ARG_UNUSED(dev); |
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if (channel > 0) { |
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return -EIO; |
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} |
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if (cycles) { |
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/* User does not have to know about lowest clock, |
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* the driver will select the most relevant one. |
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*/ |
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*cycles = MCHP_PWM_INPUT_FREQ_HI; |
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} |
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return 0; |
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} |
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#ifdef CONFIG_PM_DEVICE |
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static int pwm_xec_pm_action(const struct device *dev, enum pm_device_action action) |
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{ |
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const struct pwm_xec_config *const devcfg = dev->config; |
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struct pwm_regs * const regs = devcfg->regs; |
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struct pwm_xec_data * const data = dev->data; |
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int ret = 0; |
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switch (action) { |
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case PM_DEVICE_ACTION_RESUME: |
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ret = pinctrl_apply_state(devcfg->pcfg, PINCTRL_STATE_DEFAULT); |
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if (ret != 0) { |
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LOG_ERR("XEC PWM pinctrl setup failed (%d)", ret); |
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} |
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/* Turn on PWM only if it is ON before sleep */ |
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if ((data->config & MCHP_PWM_CFG_ENABLE) == MCHP_PWM_CFG_ENABLE) { |
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regs->CONFIG |= MCHP_PWM_CFG_ENABLE; |
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data->config &= (~MCHP_PWM_CFG_ENABLE); |
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} |
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break; |
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case PM_DEVICE_ACTION_SUSPEND: |
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if ((regs->CONFIG & MCHP_PWM_CFG_ENABLE) == MCHP_PWM_CFG_ENABLE) { |
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/* Do copy first, then clear mode. */ |
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data->config = regs->CONFIG; |
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regs->CONFIG &= ~(MCHP_PWM_CFG_ENABLE); |
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} |
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ret = pinctrl_apply_state(devcfg->pcfg, PINCTRL_STATE_SLEEP); |
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/* pinctrl-1 does not exist. */ |
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if (ret == -ENOENT) { |
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ret = 0; |
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} |
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break; |
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default: |
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ret = -ENOTSUP; |
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} |
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return ret; |
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} |
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#endif /* CONFIG_PM_DEVICE */ |
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static DEVICE_API(pwm, pwm_xec_driver_api) = { |
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.set_cycles = pwm_xec_set_cycles, |
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.get_cycles_per_sec = pwm_xec_get_cycles_per_sec, |
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}; |
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static int pwm_xec_init(const struct device *dev) |
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{ |
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const struct pwm_xec_config * const cfg = dev->config; |
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int ret = pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT); |
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if (ret != 0) { |
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LOG_ERR("XEC PWM pinctrl init failed (%d)", ret); |
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return ret; |
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} |
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return 0; |
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} |
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#define XEC_PWM_CONFIG(inst) \ |
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static struct pwm_xec_config pwm_xec_config_##inst = { \ |
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.regs = (struct pwm_regs * const)DT_INST_REG_ADDR(inst), \ |
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.pcr_idx = (uint8_t)DT_INST_PROP_BY_IDX(inst, pcrs, 0), \ |
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.pcr_pos = (uint8_t)DT_INST_PROP_BY_IDX(inst, pcrs, 1), \ |
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \ |
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}; |
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#define XEC_PWM_DEVICE_INIT(index) \ |
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\ |
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static struct pwm_xec_data pwm_xec_data_##index; \ |
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\ |
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PINCTRL_DT_INST_DEFINE(index); \ |
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\ |
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XEC_PWM_CONFIG(index); \ |
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\ |
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PM_DEVICE_DT_INST_DEFINE(index, pwm_xec_pm_action); \ |
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\ |
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DEVICE_DT_INST_DEFINE(index, &pwm_xec_init, \ |
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PM_DEVICE_DT_INST_GET(index), \ |
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&pwm_xec_data_##index, \ |
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&pwm_xec_config_##index, POST_KERNEL, \ |
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CONFIG_PWM_INIT_PRIORITY, \ |
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&pwm_xec_driver_api); |
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DT_INST_FOREACH_STATUS_OKAY(XEC_PWM_DEVICE_INIT)
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