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80 lines
2.2 KiB
80 lines
2.2 KiB
/* |
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* Copyright 2025 STMicroelectronics |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#include <errno.h> |
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#include <zephyr/device.h> |
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#include <zephyr/kernel.h> |
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#include <zephyr/init.h> |
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#include <soc.h> |
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#include <zephyr/drivers/clock_control/stm32_clock_control.h> |
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#define DT_DRV_COMPAT st_stm32n6_ramcfg |
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/* Read-only driver configuration */ |
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struct axisram_stm32_cfg { |
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/* RAMCFG instance. */ |
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RAMCFG_TypeDef *base; |
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/* SRAM Clock configuration. */ |
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struct stm32_pclken pclken_axisram; |
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/* RAMCFG Clock configuration. */ |
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struct stm32_pclken pclken_ramcfg; |
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}; |
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static int axisram_stm32_init(const struct device *dev) |
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{ |
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const struct axisram_stm32_cfg *cfg = dev->config; |
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RAMCFG_HandleTypeDef ramcfg = {0}; |
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/* enable clock for subsystem */ |
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const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); |
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if (!device_is_ready(clk)) { |
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return -ENODEV; |
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} |
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if (clock_control_on(clk, (clock_control_subsys_t) &cfg->pclken_ramcfg) != 0) { |
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return -EIO; |
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} |
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if (clock_control_on(clk, (clock_control_subsys_t) &cfg->pclken_axisram) != 0) { |
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return -EIO; |
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} |
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ramcfg.Instance = cfg->base; |
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HAL_RAMCFG_EnableAXISRAM(&ramcfg); |
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return 0; |
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} |
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/** |
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* On other series which have no RAMCFG, whether RAMs are enabled |
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* or not can be controlled by changing their "status" in Device Tree. |
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* To match this behavior on N6, we check manually during instantation |
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* of RAMCFG nodes whether they have an enabled child (= RAM node) and |
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* perform our own instantiation only if so thanks to COND_CODE. |
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*/ |
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#define STM32N6_AXISRAM_INIT(idx) \ |
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\ |
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COND_CODE_0(DT_INST_CHILD_NUM_STATUS_OKAY(idx), (), ( \ |
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\ |
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static const struct axisram_stm32_cfg axisram_stm32_cfg_##idx = { \ |
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.base = (RAMCFG_TypeDef *)DT_INST_REG_ADDR(idx), \ |
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.pclken_axisram = { \ |
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.enr = DT_INST_CLOCKS_CELL_BY_NAME(idx, axisram, bits), \ |
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.bus = DT_INST_CLOCKS_CELL_BY_NAME(idx, axisram, bus), \ |
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}, \ |
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.pclken_ramcfg = { \ |
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.enr = DT_INST_CLOCKS_CELL_BY_NAME(idx, ramcfg, bits), \ |
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.bus = DT_INST_CLOCKS_CELL_BY_NAME(idx, ramcfg, bus), \ |
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}, \ |
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}; \ |
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\ |
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DEVICE_DT_INST_DEFINE(idx, &axisram_stm32_init, NULL, \ |
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NULL, &axisram_stm32_cfg_##idx, \ |
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PRE_KERNEL_2, 0, NULL);)) |
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DT_INST_FOREACH_STATUS_OKAY(STM32N6_AXISRAM_INIT)
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