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120 lines
3.2 KiB
120 lines
3.2 KiB
/* |
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* Copyright (c) 2022 ITE Corporation. All Rights Reserved |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#define DT_DRV_COMPAT ite_it8xxx2_wuc |
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#include <zephyr/device.h> |
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#include <zephyr/drivers/interrupt_controller/wuc_ite_it8xxx2.h> |
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#include <zephyr/dt-bindings/interrupt-controller/it8xxx2-wuc.h> |
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#include <zephyr/kernel.h> |
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#include <soc.h> |
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#include <soc_common.h> |
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#include <stdlib.h> |
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#include <zephyr/logging/log.h> |
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LOG_MODULE_REGISTER(wuc_ite_it8xxx2, CONFIG_INTC_LOG_LEVEL); |
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/* Driver config */ |
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struct it8xxx2_wuc_cfg { |
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/* WUC wakeup edge mode register */ |
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uint8_t *reg_wuemr; |
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/* WUC wakeup edge sense register */ |
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uint8_t *reg_wuesr; |
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/* WUC wakeup enable register */ |
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uint8_t *reg_wuenr; |
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/* WUC wakeup both edge mode register */ |
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uint8_t *reg_wubemr; |
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}; |
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void it8xxx2_wuc_enable(const struct device *dev, uint8_t mask) |
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{ |
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const struct it8xxx2_wuc_cfg *config = dev->config; |
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volatile uint8_t *reg_wuenr = config->reg_wuenr; |
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/* |
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* WUC group only 1, 3, and 4 have enable/disable register, |
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* others are always enabled. |
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*/ |
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if (reg_wuenr == IT8XXX2_WUC_UNUSED_REG) { |
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return; |
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} |
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/* Enable wakeup interrupt of the pin */ |
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*reg_wuenr |= mask; |
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} |
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void it8xxx2_wuc_disable(const struct device *dev, uint8_t mask) |
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{ |
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const struct it8xxx2_wuc_cfg *config = dev->config; |
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volatile uint8_t *reg_wuenr = config->reg_wuenr; |
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/* |
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* WUC group only 1, 3, and 4 have enable/disable register, |
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* others are always enabled. |
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*/ |
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if (reg_wuenr == IT8XXX2_WUC_UNUSED_REG) { |
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return; |
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} |
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/* Disable wakeup interrupt of the pin */ |
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*reg_wuenr &= ~mask; |
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} |
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void it8xxx2_wuc_clear_status(const struct device *dev, uint8_t mask) |
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{ |
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const struct it8xxx2_wuc_cfg *config = dev->config; |
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volatile uint8_t *reg_wuesr = config->reg_wuesr; |
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if (reg_wuesr == IT8XXX2_WUC_UNUSED_REG) { |
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return; |
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} |
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/* W/C wakeup interrupt status of the pin */ |
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*reg_wuesr = mask; |
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} |
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void it8xxx2_wuc_set_polarity(const struct device *dev, uint8_t mask, uint32_t flags) |
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{ |
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const struct it8xxx2_wuc_cfg *config = dev->config; |
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volatile uint8_t *reg_wuemr = config->reg_wuemr; |
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volatile uint8_t *reg_wubemr = config->reg_wubemr; |
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if (reg_wuemr == IT8XXX2_WUC_UNUSED_REG) { |
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return; |
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} |
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/* Set wakeup interrupt edge trigger mode of the pin */ |
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if ((flags & WUC_TYPE_EDGE_BOTH) == WUC_TYPE_EDGE_RISING) { |
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*reg_wubemr &= ~mask; |
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*reg_wuemr &= ~mask; |
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} else if ((flags & WUC_TYPE_EDGE_BOTH) == WUC_TYPE_EDGE_FALLING) { |
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*reg_wubemr &= ~mask; |
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*reg_wuemr |= mask; |
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} else { |
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/* Both edge trigger mode */ |
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*reg_wubemr |= mask; |
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} |
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} |
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#define IT8XXX2_WUC_INIT(inst) \ |
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\ |
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static const struct it8xxx2_wuc_cfg it8xxx2_wuc_cfg_##inst = { \ |
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.reg_wuemr = (uint8_t *) DT_INST_REG_ADDR_BY_IDX(inst, 0), \ |
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.reg_wuesr = (uint8_t *) DT_INST_REG_ADDR_BY_IDX(inst, 1), \ |
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.reg_wuenr = (uint8_t *) DT_INST_REG_ADDR_BY_IDX(inst, 2), \ |
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.reg_wubemr = (uint8_t *) DT_INST_REG_ADDR_BY_IDX(inst, 3), \ |
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}; \ |
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\ |
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DEVICE_DT_INST_DEFINE(inst, \ |
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NULL, \ |
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NULL, \ |
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NULL, \ |
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&it8xxx2_wuc_cfg_##inst, \ |
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PRE_KERNEL_1, \ |
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CONFIG_KERNEL_INIT_PRIORITY_OBJECTS, \ |
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NULL); |
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DT_INST_FOREACH_STATUS_OKAY(IT8XXX2_WUC_INIT)
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