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57 lines
1.7 KiB
57 lines
1.7 KiB
/* ioapic_priv.h - private IOAPIC APIs */ |
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/* |
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* Copyright (c) 2012-2015 Wind River Systems, Inc. |
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* Copyright (c) 2015 Intel Corporation |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_IOAPIC_PRIV_H_ |
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#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_IOAPIC_PRIV_H_ |
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/* IO APIC direct register offsets */ |
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#define IOAPIC_IND 0x00 /* Index Register */ |
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#define IOAPIC_DATA 0x10 /* IO window (data) - pc.h */ |
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#define IOAPIC_IRQPA 0x20 /* IRQ Pin Assertion Register */ |
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#define IOAPIC_EOI 0x40 /* EOI Register */ |
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/* IO APIC indirect register offset */ |
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#define IOAPIC_ID 0x00 /* IOAPIC ID */ |
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#define IOAPIC_VERS 0x01 /* IOAPIC Version */ |
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#define IOAPIC_ARB 0x02 /* IOAPIC Arbitration ID */ |
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#define IOAPIC_BOOT 0x03 /* IOAPIC Boot Configuration */ |
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#define IOAPIC_REDTBL 0x10 /* Redirection Table (24 * 64bit) */ |
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/* Interrupt delivery type */ |
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#define IOAPIC_DT_APIC 0x0 /* APIC serial bus */ |
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#define IOAPIC_DT_FS 0x1 /* Front side bus message*/ |
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/* Version register bits */ |
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#define IOAPIC_MRE_MASK 0x00ff0000 /* Max Red. entry mask */ |
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#define IOAPIC_MRE_POS 16 |
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#define IOAPIC_PRQ 0x00008000 /* this has IRQ reg */ |
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#define IOAPIC_VERSION 0x000000ff /* version number */ |
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/* Redirection table entry bits: upper 32 bit */ |
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#define IOAPIC_DESTINATION 0xff000000 |
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/* Redirection table entry bits: lower 32 bit */ |
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#define IOAPIC_VEC_MASK 0x000000ff |
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/* VTD related macros */ |
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#define IOAPIC_VTD_REMAP_FORMAT BIT(16) |
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/* We care only about the first 14 bits. |
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* The 15th bits is in the first 32bits of RTE but since |
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* we don't go up to that value, let's ignore it. |
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*/ |
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#define IOAPIC_VTD_INDEX(index) (index << 17) |
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#endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_IOAPIC_PRIV_H_ */
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