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621 lines
16 KiB
621 lines
16 KiB
/* |
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* Copyright (c) 2016 Freescale Semiconductor, Inc. |
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* Copyright 2019-2023, NXP |
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* Copyright (c) 2022 Vestas Wind Systems A/S |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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|
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#define DT_DRV_COMPAT nxp_lpi2c |
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|
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#include <errno.h> |
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#include <zephyr/drivers/i2c.h> |
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#include <zephyr/drivers/clock_control.h> |
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#include <zephyr/kernel.h> |
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#include <zephyr/irq.h> |
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#include <fsl_lpi2c.h> |
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#if CONFIG_NXP_LP_FLEXCOMM |
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#include <zephyr/drivers/mfd/nxp_lp_flexcomm.h> |
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#endif |
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|
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#include <zephyr/drivers/pinctrl.h> |
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|
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#ifdef CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY |
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#include "i2c_bitbang.h" |
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#include <zephyr/drivers/gpio.h> |
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#endif /* CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY */ |
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|
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#include <zephyr/logging/log.h> |
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LOG_MODULE_REGISTER(mcux_lpi2c); |
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|
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#include "i2c-priv.h" |
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/* Wait for the duration of 12 bits to detect a NAK after a bus |
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* address scan. (10 appears sufficient, 20% safety factor.) |
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*/ |
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#define SCAN_DELAY_US(baudrate) (12 * USEC_PER_SEC / baudrate) |
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|
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/* Required by DEVICE_MMIO_NAMED_* macros */ |
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#define DEV_CFG(_dev) \ |
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((const struct mcux_lpi2c_config *)(_dev)->config) |
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#define DEV_DATA(_dev) ((struct mcux_lpi2c_data *)(_dev)->data) |
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|
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struct mcux_lpi2c_config { |
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DEVICE_MMIO_NAMED_ROM(reg_base); |
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const struct device *clock_dev; |
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clock_control_subsys_t clock_subsys; |
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void (*irq_config_func)(const struct device *dev); |
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uint32_t bitrate; |
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uint32_t bus_idle_timeout_ns; |
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const struct pinctrl_dev_config *pincfg; |
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#ifdef CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY |
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struct gpio_dt_spec scl; |
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struct gpio_dt_spec sda; |
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#endif /* CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY */ |
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}; |
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|
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struct mcux_lpi2c_data { |
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DEVICE_MMIO_NAMED_RAM(reg_base); |
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lpi2c_master_handle_t handle; |
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struct k_sem lock; |
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struct k_sem device_sync_sem; |
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status_t callback_status; |
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#ifdef CONFIG_I2C_TARGET |
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lpi2c_slave_handle_t target_handle; |
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struct i2c_target_config *target_cfg; |
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bool target_attached; |
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bool first_tx; |
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bool read_active; |
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bool send_ack; |
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#endif |
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}; |
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|
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static int mcux_lpi2c_configure(const struct device *dev, |
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uint32_t dev_config_raw) |
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{ |
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const struct mcux_lpi2c_config *config = dev->config; |
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struct mcux_lpi2c_data *data = dev->data; |
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LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); |
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uint32_t clock_freq; |
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uint32_t baudrate; |
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int ret; |
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|
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if (!(I2C_MODE_CONTROLLER & dev_config_raw)) { |
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return -EINVAL; |
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} |
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|
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if (I2C_ADDR_10_BITS & dev_config_raw) { |
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return -EINVAL; |
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} |
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|
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switch (I2C_SPEED_GET(dev_config_raw)) { |
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case I2C_SPEED_STANDARD: |
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baudrate = KHZ(100); |
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break; |
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case I2C_SPEED_FAST: |
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baudrate = KHZ(400); |
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break; |
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case I2C_SPEED_FAST_PLUS: |
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baudrate = MHZ(1); |
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break; |
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default: |
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return -EINVAL; |
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} |
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|
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if (clock_control_get_rate(config->clock_dev, config->clock_subsys, |
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&clock_freq)) { |
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return -EINVAL; |
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} |
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|
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ret = k_sem_take(&data->lock, K_FOREVER); |
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if (ret) { |
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return ret; |
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} |
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|
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LPI2C_MasterSetBaudRate(base, clock_freq, baudrate); |
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k_sem_give(&data->lock); |
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|
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return 0; |
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} |
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|
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static void mcux_lpi2c_master_transfer_callback(LPI2C_Type *base, |
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lpi2c_master_handle_t *handle, |
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status_t status, void *userData) |
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{ |
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struct mcux_lpi2c_data *data = userData; |
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|
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ARG_UNUSED(handle); |
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ARG_UNUSED(base); |
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|
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data->callback_status = status; |
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k_sem_give(&data->device_sync_sem); |
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} |
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|
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static uint32_t mcux_lpi2c_convert_flags(int msg_flags) |
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{ |
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uint32_t flags = 0U; |
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|
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if (!(msg_flags & I2C_MSG_STOP)) { |
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flags |= kLPI2C_TransferNoStopFlag; |
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} |
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|
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if (msg_flags & I2C_MSG_RESTART) { |
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flags |= kLPI2C_TransferRepeatedStartFlag; |
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} |
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|
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return flags; |
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} |
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|
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static int mcux_lpi2c_transfer(const struct device *dev, struct i2c_msg *msgs, |
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uint8_t num_msgs, uint16_t addr) |
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{ |
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const struct mcux_lpi2c_config *config = dev->config; |
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struct mcux_lpi2c_data *data = dev->data; |
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LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); |
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lpi2c_master_transfer_t transfer; |
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status_t status; |
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int ret = 0; |
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|
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ret = k_sem_take(&data->lock, K_FOREVER); |
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if (ret) { |
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return ret; |
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} |
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|
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/* Iterate over all the messages */ |
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for (int i = 0; i < num_msgs; i++) { |
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if (I2C_MSG_ADDR_10_BITS & msgs->flags) { |
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ret = -ENOTSUP; |
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break; |
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} |
|
|
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/* Initialize the transfer descriptor */ |
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transfer.flags = mcux_lpi2c_convert_flags(msgs->flags); |
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|
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/* Prevent the controller to send a start condition between |
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* messages, except if explicitly requested. |
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*/ |
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if (i != 0 && !(msgs->flags & I2C_MSG_RESTART)) { |
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transfer.flags |= kLPI2C_TransferNoStartFlag; |
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} |
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|
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transfer.slaveAddress = addr; |
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transfer.direction = (msgs->flags & I2C_MSG_READ) |
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? kLPI2C_Read : kLPI2C_Write; |
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transfer.subaddress = 0; |
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transfer.subaddressSize = 0; |
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transfer.data = msgs->buf; |
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transfer.dataSize = msgs->len; |
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|
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/* Start the transfer */ |
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status = LPI2C_MasterTransferNonBlocking(base, |
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&data->handle, &transfer); |
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|
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/* Return an error if the transfer didn't start successfully |
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* e.g., if the bus was busy |
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*/ |
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if (status != kStatus_Success) { |
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LPI2C_MasterTransferAbort(base, &data->handle); |
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ret = -EIO; |
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break; |
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} |
|
|
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/* Wait for the transfer to complete */ |
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k_sem_take(&data->device_sync_sem, K_FOREVER); |
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|
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/* Return an error if the transfer didn't complete |
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* successfully. e.g., nak, timeout, lost arbitration |
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*/ |
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if (data->callback_status != kStatus_Success) { |
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LPI2C_MasterTransferAbort(base, &data->handle); |
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ret = -EIO; |
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break; |
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} |
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if (msgs->len == 0) { |
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k_busy_wait(SCAN_DELAY_US(config->bitrate)); |
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if (0 != (base->MSR & LPI2C_MSR_NDF_MASK)) { |
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LPI2C_MasterTransferAbort(base, &data->handle); |
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ret = -EIO; |
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break; |
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} |
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} |
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/* Move to the next message */ |
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msgs++; |
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} |
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|
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k_sem_give(&data->lock); |
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|
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return ret; |
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} |
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|
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#if CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY |
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static void mcux_lpi2c_bitbang_set_scl(void *io_context, int state) |
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{ |
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const struct mcux_lpi2c_config *config = io_context; |
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|
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gpio_pin_set_dt(&config->scl, state); |
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} |
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|
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static void mcux_lpi2c_bitbang_set_sda(void *io_context, int state) |
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{ |
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const struct mcux_lpi2c_config *config = io_context; |
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|
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gpio_pin_set_dt(&config->sda, state); |
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} |
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static int mcux_lpi2c_bitbang_get_sda(void *io_context) |
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{ |
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const struct mcux_lpi2c_config *config = io_context; |
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|
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return gpio_pin_get_dt(&config->sda) == 0 ? 0 : 1; |
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} |
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static int mcux_lpi2c_recover_bus(const struct device *dev) |
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{ |
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const struct mcux_lpi2c_config *config = dev->config; |
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struct mcux_lpi2c_data *data = dev->data; |
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struct i2c_bitbang bitbang_ctx; |
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struct i2c_bitbang_io bitbang_io = { |
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.set_scl = mcux_lpi2c_bitbang_set_scl, |
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.set_sda = mcux_lpi2c_bitbang_set_sda, |
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.get_sda = mcux_lpi2c_bitbang_get_sda, |
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}; |
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uint32_t bitrate_cfg; |
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int error = 0; |
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if (!gpio_is_ready_dt(&config->scl)) { |
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LOG_ERR("SCL GPIO device not ready"); |
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return -EIO; |
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} |
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if (!gpio_is_ready_dt(&config->sda)) { |
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LOG_ERR("SDA GPIO device not ready"); |
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return -EIO; |
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} |
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k_sem_take(&data->lock, K_FOREVER); |
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error = gpio_pin_configure_dt(&config->scl, GPIO_OUTPUT_HIGH); |
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if (error != 0) { |
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LOG_ERR("failed to configure SCL GPIO (err %d)", error); |
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goto restore; |
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} |
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error = gpio_pin_configure_dt(&config->sda, GPIO_OUTPUT_HIGH); |
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if (error != 0) { |
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LOG_ERR("failed to configure SDA GPIO (err %d)", error); |
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goto restore; |
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} |
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i2c_bitbang_init(&bitbang_ctx, &bitbang_io, (void *)config); |
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bitrate_cfg = i2c_map_dt_bitrate(config->bitrate) | I2C_MODE_CONTROLLER; |
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error = i2c_bitbang_configure(&bitbang_ctx, bitrate_cfg); |
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if (error != 0) { |
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LOG_ERR("failed to configure I2C bitbang (err %d)", error); |
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goto restore; |
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} |
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error = i2c_bitbang_recover_bus(&bitbang_ctx); |
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if (error != 0) { |
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LOG_ERR("failed to recover bus (err %d)", error); |
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goto restore; |
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} |
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restore: |
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(void)pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT); |
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k_sem_give(&data->lock); |
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return error; |
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} |
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#endif /* CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY */ |
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#ifdef CONFIG_I2C_TARGET |
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static void mcux_lpi2c_slave_irq_handler(const struct device *dev) |
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{ |
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struct mcux_lpi2c_data *data = dev->data; |
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LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); |
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const struct i2c_target_callbacks *target_cb = data->target_cfg->callbacks; |
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int ret; |
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uint32_t flags; |
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uint8_t i2c_data; |
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|
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/* Note- the HAL provides a callback-based I2C slave API, but |
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* the API expects the user to provide a transmit buffer of |
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* a fixed length at the first byte received, and will not signal |
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* the user callback until this buffer is exhausted. This does not |
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* work well with the Zephyr API, which requires callbacks for |
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* every byte. For these reason, we handle the LPI2C IRQ |
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* directly. |
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*/ |
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flags = LPI2C_SlaveGetStatusFlags(base); |
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|
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if (flags & kLPI2C_SlaveAddressValidFlag) { |
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/* Read Slave address to clear flag */ |
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LPI2C_SlaveGetReceivedAddress(base); |
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data->first_tx = true; |
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/* Reset to sending ACK, in case we NAK'ed before */ |
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data->send_ack = true; |
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} |
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|
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if (flags & kLPI2C_SlaveRxReadyFlag) { |
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/* RX data is available, read it and issue callback */ |
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i2c_data = (uint8_t)base->SRDR; |
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if (data->first_tx) { |
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data->first_tx = false; |
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if (target_cb->write_requested) { |
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ret = target_cb->write_requested(data->target_cfg); |
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if (ret < 0) { |
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/* NAK further bytes */ |
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data->send_ack = false; |
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} |
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} |
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} |
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if (target_cb->write_received) { |
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ret = target_cb->write_received(data->target_cfg, |
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i2c_data); |
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if (ret < 0) { |
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/* NAK further bytes */ |
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data->send_ack = false; |
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} |
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} |
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} |
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|
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if (flags & kLPI2C_SlaveTxReadyFlag) { |
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/* Space is available in TX fifo, issue callback and write out */ |
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if (data->first_tx) { |
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data->read_active = true; |
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data->first_tx = false; |
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if (target_cb->read_requested) { |
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ret = target_cb->read_requested(data->target_cfg, |
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&i2c_data); |
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if (ret < 0) { |
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/* Disable TX */ |
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data->read_active = false; |
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} else { |
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/* Send I2C data */ |
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base->STDR = i2c_data; |
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} |
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} |
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} else if (data->read_active) { |
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if (target_cb->read_processed) { |
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ret = target_cb->read_processed(data->target_cfg, |
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&i2c_data); |
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if (ret < 0) { |
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/* Disable TX */ |
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data->read_active = false; |
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} else { |
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/* Send I2C data */ |
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base->STDR = i2c_data; |
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} |
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} |
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} |
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} |
|
|
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if (flags & kLPI2C_SlaveStopDetectFlag) { |
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LPI2C_SlaveClearStatusFlags(base, flags); |
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if (target_cb->stop) { |
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target_cb->stop(data->target_cfg); |
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} |
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} |
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|
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if (flags & kLPI2C_SlaveTransmitAckFlag) { |
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LPI2C_SlaveTransmitAck(base, data->send_ack); |
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} |
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} |
|
|
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static int mcux_lpi2c_target_register(const struct device *dev, |
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struct i2c_target_config *target_config) |
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{ |
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const struct mcux_lpi2c_config *config = dev->config; |
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struct mcux_lpi2c_data *data = dev->data; |
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LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); |
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lpi2c_slave_config_t slave_config; |
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uint32_t clock_freq; |
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|
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LPI2C_MasterDeinit(base); |
|
|
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/* Get the clock frequency */ |
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if (clock_control_get_rate(config->clock_dev, config->clock_subsys, |
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&clock_freq)) { |
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return -EINVAL; |
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} |
|
|
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if (!target_config) { |
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return -EINVAL; |
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} |
|
|
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if (data->target_attached) { |
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return -EBUSY; |
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} |
|
|
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data->target_attached = true; |
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data->target_cfg = target_config; |
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data->first_tx = false; |
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|
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LPI2C_SlaveGetDefaultConfig(&slave_config); |
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slave_config.address0 = target_config->address; |
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/* Note- this setting enables clock stretching to allow the |
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* slave to respond to each byte with an ACK/NAK. |
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* this behavior may cause issues with some I2C controllers. |
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*/ |
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slave_config.sclStall.enableAck = true; |
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LPI2C_SlaveInit(base, &slave_config, clock_freq); |
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/* Clear all flags. */ |
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LPI2C_SlaveClearStatusFlags(base, (uint32_t)kLPI2C_SlaveClearFlags); |
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/* Enable interrupt */ |
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LPI2C_SlaveEnableInterrupts(base, |
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(kLPI2C_SlaveTxReadyFlag | |
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kLPI2C_SlaveRxReadyFlag | |
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kLPI2C_SlaveStopDetectFlag | |
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kLPI2C_SlaveAddressValidFlag | |
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kLPI2C_SlaveTransmitAckFlag)); |
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return 0; |
|
} |
|
|
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static int mcux_lpi2c_target_unregister(const struct device *dev, |
|
struct i2c_target_config *target_config) |
|
{ |
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struct mcux_lpi2c_data *data = dev->data; |
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LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); |
|
|
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if (!data->target_attached) { |
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return -EINVAL; |
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} |
|
|
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data->target_cfg = NULL; |
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data->target_attached = false; |
|
|
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LPI2C_SlaveDeinit(base); |
|
|
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return 0; |
|
} |
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#endif /* CONFIG_I2C_TARGET */ |
|
|
|
static void mcux_lpi2c_isr(const struct device *dev) |
|
{ |
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struct mcux_lpi2c_data *data = dev->data; |
|
LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); |
|
|
|
#ifdef CONFIG_I2C_TARGET |
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if (data->target_attached) { |
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mcux_lpi2c_slave_irq_handler(dev); |
|
} |
|
#endif /* CONFIG_I2C_TARGET */ |
|
#if CONFIG_HAS_MCUX_FLEXCOMM |
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LPI2C_MasterTransferHandleIRQ(LPI2C_GetInstance(base), &data->handle); |
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#else |
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LPI2C_MasterTransferHandleIRQ(base, &data->handle); |
|
#endif |
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} |
|
|
|
static int mcux_lpi2c_init(const struct device *dev) |
|
{ |
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const struct mcux_lpi2c_config *config = dev->config; |
|
struct mcux_lpi2c_data *data = dev->data; |
|
LPI2C_Type *base; |
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uint32_t clock_freq, bitrate_cfg; |
|
lpi2c_master_config_t master_config; |
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int error; |
|
|
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DEVICE_MMIO_NAMED_MAP(dev, reg_base, K_MEM_CACHE_NONE | K_MEM_DIRECT_MAP); |
|
|
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base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); |
|
|
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k_sem_init(&data->lock, 1, 1); |
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k_sem_init(&data->device_sync_sem, 0, K_SEM_MAX_LIMIT); |
|
|
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if (!device_is_ready(config->clock_dev)) { |
|
LOG_ERR("clock control device not ready"); |
|
return -ENODEV; |
|
} |
|
|
|
error = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT); |
|
if (error) { |
|
return error; |
|
} |
|
|
|
if (clock_control_get_rate(config->clock_dev, config->clock_subsys, |
|
&clock_freq)) { |
|
return -EINVAL; |
|
} |
|
|
|
LPI2C_MasterGetDefaultConfig(&master_config); |
|
master_config.busIdleTimeout_ns = config->bus_idle_timeout_ns; |
|
LPI2C_MasterInit(base, &master_config, clock_freq); |
|
LPI2C_MasterTransferCreateHandle(base, &data->handle, |
|
mcux_lpi2c_master_transfer_callback, |
|
data); |
|
|
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bitrate_cfg = i2c_map_dt_bitrate(config->bitrate); |
|
|
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error = mcux_lpi2c_configure(dev, I2C_MODE_CONTROLLER | bitrate_cfg); |
|
if (error) { |
|
return error; |
|
} |
|
|
|
config->irq_config_func(dev); |
|
|
|
return 0; |
|
} |
|
|
|
static DEVICE_API(i2c, mcux_lpi2c_driver_api) = { |
|
.configure = mcux_lpi2c_configure, |
|
.transfer = mcux_lpi2c_transfer, |
|
#if CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY |
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.recover_bus = mcux_lpi2c_recover_bus, |
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#endif /* CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY */ |
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#if CONFIG_I2C_TARGET |
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.target_register = mcux_lpi2c_target_register, |
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.target_unregister = mcux_lpi2c_target_unregister, |
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#endif /* CONFIG_I2C_TARGET */ |
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}; |
|
|
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#if CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY |
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#define I2C_MCUX_LPI2C_SCL_INIT(n) .scl = GPIO_DT_SPEC_INST_GET_OR(n, scl_gpios, {0}), |
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#define I2C_MCUX_LPI2C_SDA_INIT(n) .sda = GPIO_DT_SPEC_INST_GET_OR(n, sda_gpios, {0}), |
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#else |
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#define I2C_MCUX_LPI2C_SCL_INIT(n) |
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#define I2C_MCUX_LPI2C_SDA_INIT(n) |
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#endif /* CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY */ |
|
|
|
#define I2C_MCUX_LPI2C_MODULE_IRQ_CONNECT(n) \ |
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do { \ |
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IRQ_CONNECT(DT_INST_IRQN(n), \ |
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DT_INST_IRQ(n, priority), \ |
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mcux_lpi2c_isr, \ |
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DEVICE_DT_INST_GET(n), 0); \ |
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irq_enable(DT_INST_IRQN(n)); \ |
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} while (false) |
|
|
|
#define I2C_MCUX_LPI2C_MODULE_IRQ(n) \ |
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IF_ENABLED(DT_INST_IRQ_HAS_IDX(n, 0), \ |
|
(I2C_MCUX_LPI2C_MODULE_IRQ_CONNECT(n))) |
|
|
|
/* When using LP Flexcomm driver, register the interrupt handler |
|
* so we receive notification from the LP Flexcomm interrupt handler. |
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*/ |
|
#define I2C_MCUX_LPI2C_LPFLEXCOMM_IRQ_FUNC(n) \ |
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nxp_lp_flexcomm_setirqhandler(DEVICE_DT_GET(DT_INST_PARENT(n)), \ |
|
DEVICE_DT_INST_GET(n), \ |
|
LP_FLEXCOMM_PERIPH_LPI2C, \ |
|
mcux_lpi2c_isr) |
|
|
|
#define I2C_MCUX_LPI2C_IRQ_SETUP_FUNC(n) \ |
|
COND_CODE_1(DT_NODE_HAS_COMPAT(DT_INST_PARENT(n), \ |
|
nxp_lp_flexcomm), \ |
|
(I2C_MCUX_LPI2C_LPFLEXCOMM_IRQ_FUNC(n)), \ |
|
(I2C_MCUX_LPI2C_MODULE_IRQ(n))) \ |
|
|
|
#define I2C_MCUX_LPI2C_INIT(n) \ |
|
PINCTRL_DT_INST_DEFINE(n); \ |
|
\ |
|
static void mcux_lpi2c_config_func_##n(const struct device *dev)\ |
|
{ \ |
|
I2C_MCUX_LPI2C_IRQ_SETUP_FUNC(n); \ |
|
} \ |
|
\ |
|
static const struct mcux_lpi2c_config mcux_lpi2c_config_##n = { \ |
|
DEVICE_MMIO_NAMED_ROM_INIT(reg_base, DT_DRV_INST(n)), \ |
|
.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \ |
|
.clock_subsys = \ |
|
(clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),\ |
|
.irq_config_func = mcux_lpi2c_config_func_##n, \ |
|
.bitrate = DT_INST_PROP(n, clock_frequency), \ |
|
.pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \ |
|
I2C_MCUX_LPI2C_SCL_INIT(n) \ |
|
I2C_MCUX_LPI2C_SDA_INIT(n) \ |
|
.bus_idle_timeout_ns = \ |
|
UTIL_AND(DT_INST_NODE_HAS_PROP(n, bus_idle_timeout),\ |
|
DT_INST_PROP(n, bus_idle_timeout)), \ |
|
}; \ |
|
\ |
|
static struct mcux_lpi2c_data mcux_lpi2c_data_##n; \ |
|
\ |
|
I2C_DEVICE_DT_INST_DEFINE(n, mcux_lpi2c_init, NULL, \ |
|
&mcux_lpi2c_data_##n, \ |
|
&mcux_lpi2c_config_##n, POST_KERNEL, \ |
|
CONFIG_I2C_INIT_PRIORITY, \ |
|
&mcux_lpi2c_driver_api); |
|
|
|
DT_INST_FOREACH_STATUS_OKAY(I2C_MCUX_LPI2C_INIT)
|
|
|