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51 lines
1.5 KiB
51 lines
1.5 KiB
# Copyright (c) 2025 ITE Corporation. All Rights Reserved. |
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# SPDX-License-Identifier: Apache-2.0 |
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config I2C_ITE_IT51XXX |
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bool "ITE IT51XXX I2C driver" |
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default y |
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depends on DT_HAS_ITE_IT51XXX_I2C_ENABLED |
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select PINCTRL |
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select I2C_BITBANG |
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help |
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Enable I2C support on IT51XXX series. |
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Supports nine hosts and three targets and each one able to located |
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at I2C interface0~8. |
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Three I2C targets on design A, B and C. Support 16 bytes dedicated |
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FIFO mode for read/write. |
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Supported Speeds: 50kHz, 100kHz, 400kHz and 1MHz. |
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This driver supports repeated start. |
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if I2C_ITE_IT51XXX |
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config I2C_IT51XXX_FIFO_MODE |
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bool "IT51XXX I2C FIFO mode" |
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default y |
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help |
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This is an option to enable FIFO mode which can reduce the time |
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between each byte to improve the I2C bus clock stretching during |
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I2C transaction. |
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The I2C controller supports two 32-bytes FIFOs, |
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FIFO1 supports I2C 0, and FIFO2 supports other ports. |
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I2C FIFO mode of IT51XXX can support I2C APIs including: |
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i2c_write(), i2c_read(), i2c_burst_read. |
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endif # I2C_ITE_IT51XXX |
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if I2C_TARGET |
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config I2C_TARGET_IT51XXX_MAX_BUF_SIZE |
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int "It is allowed to configure the dedicated FIFO size up to 256 bytes." |
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default 256 |
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config I2C_IT51XXX_MAX_SHARE_FIFO_SIZE |
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int "It is allowed to configure the shared FIFO size up to 256 bytes." |
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range 16 256 |
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default 256 |
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config SOC_IT51XXX_CPU_IDLE_GATING |
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default y |
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help |
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This option is used when the I2C target shared FIFO property is enabled. |
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endif # I2C_TARGET
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