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312 lines
7.9 KiB
312 lines
7.9 KiB
/* |
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* Copyright (c) 2021 Titouan Christophe |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#define DT_DRV_COMPAT st_stmpe1600 |
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/** |
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* @file Driver for STMPE1600 I2C-based GPIO driver. |
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*/ |
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#include <errno.h> |
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#include <zephyr/kernel.h> |
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#include <zephyr/device.h> |
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#include <zephyr/init.h> |
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#include <zephyr/sys/byteorder.h> |
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#include <zephyr/sys/util.h> |
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#include <zephyr/drivers/gpio.h> |
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#include <zephyr/drivers/i2c.h> |
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#include <zephyr/drivers/gpio/gpio_utils.h> |
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#define LOG_LEVEL CONFIG_GPIO_LOG_LEVEL |
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#include <zephyr/logging/log.h> |
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LOG_MODULE_REGISTER(stmpe1600); |
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/* Register definitions */ |
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#define REG_CHIP_ID_LSB 0x00 /* const 0x00 */ |
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#define REG_CHIP_ID_MSB 0x01 /* const 0x16 */ |
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#define REG_VERSION_ID 0x02 /* Revision number (const 0x01) */ |
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#define REG_SYS_CTRL 0x03 /* Reset and interrupt control */ |
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#define REG_IEGPIOR_LSB 0x08 /* GPIO interrupt enable register */ |
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#define REG_IEGPIOR_MSB 0x09 |
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#define REG_ISGPIOR_LSB 0x0A /* GPIO interrupt status register */ |
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#define REG_ISGPIOR_MSB 0x0B |
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#define REG_GPMR_LSB 0x10 /* GPIO monitor pin state register */ |
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#define REG_GPMR_MSB 0x11 |
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#define REG_GPSR_LSB 0x12 /* GPIO set pin state register */ |
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#define REG_GPSR_MSB 0x13 |
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#define REG_GPDR_LSB 0x14 /* GPIO set pin direction register */ |
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#define REG_GPDR_MSB 0x15 |
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#define REG_GPPIR_LSB 0x16 /* GPIO polarity inversion register */ |
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#define REG_GPPIR_MSB 0x17 |
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/** Configuration data */ |
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struct stmpe1600_config { |
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/* gpio_driver_config needs to be first */ |
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struct gpio_driver_config common; |
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/** Master I2C DT specification */ |
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struct i2c_dt_spec i2c; |
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}; |
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/** Runtime driver data */ |
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struct stmpe1600_drvdata { |
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/* gpio_driver_data needs to be first */ |
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struct gpio_driver_data common; |
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/** Driver lock */ |
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struct k_sem lock; |
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/* Registers cache */ |
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uint16_t GPSR; |
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uint16_t GPDR; |
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}; |
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static int write_reg16(const struct stmpe1600_config * const config, uint8_t reg, uint16_t value) |
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{ |
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uint8_t buf[3]; |
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int ret; |
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LOG_DBG("STMPE1600[0x%02X]: write REG[0x%02X..0x%02X] = %04x", |
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config->i2c.addr, reg, reg + 1, value); |
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buf[0] = reg; |
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sys_put_le16(value, &buf[1]); |
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ret = i2c_write_dt(&config->i2c, buf, sizeof(buf)); |
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if (ret != 0) { |
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LOG_ERR("STMPE1600[0x%02X]: write error REG[0x%02X..0x%02X]: %d", |
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config->i2c.addr, reg, reg + 1, ret); |
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} |
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return ret; |
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} |
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static int read_reg16(const struct stmpe1600_config * const config, uint8_t reg, uint16_t *value) |
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{ |
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uint16_t transfer_data; |
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int ret; |
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LOG_DBG("STMPE1600[0x%02X]: read REG[0x%02X..0x%02X]", |
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config->i2c.addr, reg, reg + 1); |
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ret = i2c_burst_read_dt(&config->i2c, reg, (uint8_t *)&transfer_data, |
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sizeof(transfer_data)); |
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if (ret != 0) { |
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LOG_ERR("STMPE1600[0x%02X]: read error REG[0x%02X..0x%02X]: %d", |
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config->i2c.addr, reg, reg + 1, ret); |
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} else { |
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*value = sys_le16_to_cpu(transfer_data); |
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LOG_DBG("STMPE1600[0x%02X]: read REG[0x%02X..0x%02X] => %04x", |
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config->i2c.addr, reg, reg + 1, *value); |
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} |
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return ret; |
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} |
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static int set_pin_dir(const struct device *dev, gpio_pin_t pin, gpio_flags_t flags) |
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{ |
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struct stmpe1600_drvdata *const drvdata = (struct stmpe1600_drvdata *const) dev->data; |
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bool set_state = false; |
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uint16_t GPDR = drvdata->GPDR; |
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uint16_t GPSR = drvdata->GPSR; |
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int ret; |
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if ((flags & GPIO_OUTPUT) != 0U) { |
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GPDR |= BIT(pin); |
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if ((flags & GPIO_OUTPUT_INIT_HIGH) != 0U) { |
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GPSR |= BIT(pin); |
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set_state = true; |
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} else if ((flags & GPIO_OUTPUT_INIT_LOW) != 0U) { |
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GPSR &= ~BIT(pin); |
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set_state = true; |
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} |
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} else { |
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GPDR &= ~BIT(pin); |
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} |
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if (set_state) { |
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ret = write_reg16(dev->config, REG_GPSR_LSB, GPSR); |
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if (ret != 0) { |
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return ret; |
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} |
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drvdata->GPSR = GPSR; |
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} |
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ret = write_reg16(dev->config, REG_GPDR_LSB, GPDR); |
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if (ret == 0) { |
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drvdata->GPDR = GPDR; |
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} |
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return ret; |
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} |
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static int stmpe1600_configure(const struct device *dev, |
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gpio_pin_t pin, gpio_flags_t flags) |
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{ |
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const struct stmpe1600_config *const config = dev->config; |
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struct stmpe1600_drvdata *const drvdata = (struct stmpe1600_drvdata *const) dev->data; |
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int ret; |
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/* No support for disconnected pin */ |
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if ((flags & (GPIO_INPUT | GPIO_OUTPUT)) == GPIO_DISCONNECTED) { |
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return -ENOTSUP; |
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} |
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/* STMPE1600 does not support any of these modes */ |
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if ((flags & (GPIO_SINGLE_ENDED | GPIO_PULL_UP | GPIO_PULL_DOWN)) != 0) { |
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return -ENOTSUP; |
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} |
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if (k_is_in_isr()) { |
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return -EWOULDBLOCK; |
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} |
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k_sem_take(&drvdata->lock, K_FOREVER); |
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ret = set_pin_dir(dev, pin, flags); |
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if (ret != 0) { |
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LOG_ERR("STMPE1600[0x%X]: error setting pin direction (%d)", |
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config->i2c.addr, ret); |
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} |
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k_sem_give(&drvdata->lock); |
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return ret; |
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} |
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static int stmpe1600_port_get_raw(const struct device *dev, uint32_t *value) |
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{ |
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struct stmpe1600_drvdata *const drvdata = (struct stmpe1600_drvdata *const) dev->data; |
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uint16_t reg_value; |
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int ret; |
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if (k_is_in_isr()) { |
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return -EWOULDBLOCK; |
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} |
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k_sem_take(&drvdata->lock, K_FOREVER); |
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ret = read_reg16(dev->config, REG_GPMR_LSB, ®_value); |
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k_sem_give(&drvdata->lock); |
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if (ret == 0) { |
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*value = reg_value; |
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} |
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return ret; |
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} |
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static int stmpe1600_port_set_masked_raw(const struct device *dev, |
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uint32_t mask, uint32_t value) |
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{ |
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struct stmpe1600_drvdata *const drvdata = dev->data; |
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uint16_t GPSR; |
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int ret; |
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if (k_is_in_isr()) { |
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return -EWOULDBLOCK; |
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} |
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k_sem_take(&drvdata->lock, K_FOREVER); |
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GPSR = (drvdata->GPSR & ~mask) | (mask & value); |
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ret = write_reg16(dev->config, REG_GPSR_LSB, GPSR); |
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if (ret == 0) { |
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drvdata->GPSR = GPSR; |
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} |
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k_sem_give(&drvdata->lock); |
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return ret; |
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} |
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static int stmpe1600_port_set_bits_raw(const struct device *dev, uint32_t mask) |
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{ |
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return stmpe1600_port_set_masked_raw(dev, mask, mask); |
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} |
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static int stmpe1600_port_clear_bits_raw(const struct device *dev, uint32_t mask) |
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{ |
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return stmpe1600_port_set_masked_raw(dev, mask, 0); |
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} |
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static int stmpe1600_port_toggle_bits(const struct device *dev, uint32_t mask) |
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{ |
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struct stmpe1600_drvdata *const drvdata = dev->data; |
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uint16_t GPSR; |
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int ret; |
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if (k_is_in_isr()) { |
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return -EWOULDBLOCK; |
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} |
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k_sem_take(&drvdata->lock, K_FOREVER); |
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GPSR = drvdata->GPSR ^ mask; |
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ret = write_reg16(dev->config, REG_GPSR_LSB, GPSR); |
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if (ret == 0) { |
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drvdata->GPSR = GPSR; |
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} |
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k_sem_give(&drvdata->lock); |
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return ret; |
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} |
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static int stmpe1600_init(const struct device *dev) |
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{ |
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const struct stmpe1600_config *const config = dev->config; |
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struct stmpe1600_drvdata *const drvdata = (struct stmpe1600_drvdata *const) dev->data; |
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uint16_t chip_id; |
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int ret; |
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LOG_DBG("STMPE1600[0x%02X] init", config->i2c.addr); |
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k_sem_init(&drvdata->lock, 1, 1); |
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ret = read_reg16(dev->config, REG_CHIP_ID_LSB, &chip_id); |
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if (ret != 0) { |
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LOG_ERR("STMPE1600[0x%02X]: Unable to read Chip ID", config->i2c.addr); |
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return ret; |
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} |
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if (chip_id != 0x1600) { |
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LOG_ERR("STMPE1600[0x%02X]: Invalid Chip ID", config->i2c.addr); |
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return -EINVAL; |
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} |
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ret = read_reg16(dev->config, REG_GPSR_LSB, &drvdata->GPSR); |
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if (ret != 0) { |
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LOG_ERR("STMPE1600[0x%02X]: Unable to read GPSR", config->i2c.addr); |
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return ret; |
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} |
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ret = read_reg16(dev->config, REG_GPDR_LSB, &drvdata->GPDR); |
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if (ret != 0) { |
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LOG_ERR("STMPE1600[0x%02X]: Unable to read GPDR", config->i2c.addr); |
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} |
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return ret; |
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} |
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static DEVICE_API(gpio, stmpe1600_drv_api) = { |
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.pin_configure = stmpe1600_configure, |
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.port_get_raw = stmpe1600_port_get_raw, |
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.port_set_masked_raw = stmpe1600_port_set_masked_raw, |
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.port_set_bits_raw = stmpe1600_port_set_bits_raw, |
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.port_clear_bits_raw = stmpe1600_port_clear_bits_raw, |
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.port_toggle_bits = stmpe1600_port_toggle_bits, |
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}; |
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#define STMPE1600_INIT(inst) \ |
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static struct stmpe1600_config stmpe1600_##inst##_config = { \ |
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.common = { .port_pin_mask = 0xffff }, \ |
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.i2c = I2C_DT_SPEC_INST_GET(inst), \ |
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}; \ |
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\ |
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static struct stmpe1600_drvdata stmpe1600_##inst##_drvdata; \ |
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\ |
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DEVICE_DT_INST_DEFINE(inst, stmpe1600_init, NULL, \ |
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&stmpe1600_##inst##_drvdata, \ |
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&stmpe1600_##inst##_config, \ |
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POST_KERNEL, \ |
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CONFIG_GPIO_STMPE1600_INIT_PRIORITY, \ |
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&stmpe1600_drv_api); |
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DT_INST_FOREACH_STATUS_OKAY(STMPE1600_INIT)
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