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563 lines
13 KiB
563 lines
13 KiB
/* |
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* |
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* Copyright (c) 2021 metraTec GmbH |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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/** |
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* @file Driver for MPC23xxx I2C/SPI-based GPIO driver. |
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*/ |
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#include <errno.h> |
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#include <zephyr/kernel.h> |
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#include <zephyr/device.h> |
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#include <zephyr/sys/byteorder.h> |
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#include <zephyr/sys/util.h> |
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#include <zephyr/drivers/gpio.h> |
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#include <zephyr/drivers/gpio/gpio_utils.h> |
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#include "gpio_mcp23xxx.h" |
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#define LOG_LEVEL CONFIG_GPIO_LOG_LEVEL |
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#include <zephyr/logging/log.h> |
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LOG_MODULE_REGISTER(gpio_mcp23xxx); |
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#define MCP23XXX_RESET_TIME_US 2 |
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/** |
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* @brief Reads given register from mcp23xxx. |
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* |
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* The registers of the mcp23x0x consist of one 8 bit port. |
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* The registers of the mcp23x1x consist of two 8 bit ports. |
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* |
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* @param dev The mcp23xxx device. |
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* @param reg The register to be read. |
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* @param buf The buffer to read data to. |
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* @return 0 if successful. |
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* Otherwise <0 will be returned. |
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*/ |
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static int read_port_regs(const struct device *dev, uint8_t reg, uint16_t *buf) |
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{ |
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const struct mcp23xxx_config *config = dev->config; |
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if (config->ngpios == 16U) { |
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reg *= 2; |
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} |
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return config->read_fn(dev, reg, buf); |
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} |
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/** |
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* @brief Writes registers of the mcp23xxx. |
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* |
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* On the mcp23x08 one 8 bit port will be written. |
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* On the mcp23x17 two 8 bit ports will be written. |
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* |
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* @param dev The mcp23xxx device. |
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* @param reg Register to be written. |
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* @param buf The new register value. |
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* |
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* @return 0 if successful. Otherwise <0 will be returned. |
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*/ |
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static int write_port_regs(const struct device *dev, uint8_t reg, uint16_t value) |
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{ |
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const struct mcp23xxx_config *config = dev->config; |
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if (config->ngpios == 16U) { |
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reg *= 2; |
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} |
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return config->write_fn(dev, reg, value); |
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} |
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/** |
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* @brief Writes to the IOCON register of the mcp23xxx. |
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* |
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* IOCON is the only register that is not 16 bits wide on 16-pin devices; instead, it is mirrored in |
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* two adjacent memory locations. Because the underlying `write_fn` always does a 16-bit write for |
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* 16-pin devices, make sure we write the same value to both IOCON locations. |
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* |
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* @param dev The mcp23xxx device. |
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* @param value the IOCON value to write |
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* |
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* @return 0 if successful. Otherwise <0 will be returned. |
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*/ |
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static int write_iocon(const struct device *dev, uint8_t value) |
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{ |
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struct mcp23xxx_drv_data *drv_data = dev->data; |
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uint16_t extended_value = value | (value << 8); |
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int ret = write_port_regs(dev, REG_IOCON, extended_value); |
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if (ret == 0) { |
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drv_data->reg_cache.iocon = extended_value; |
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} |
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return ret; |
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} |
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/** |
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* @brief Setup the pin direction. |
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* |
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* @param dev The mcp23xxx device. |
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* @param pin The pin number. |
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* @param flags Flags of pin or port. |
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* @return 0 if successful. Otherwise <0 will be returned. |
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*/ |
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static int setup_pin_dir(const struct device *dev, uint32_t pin, int flags) |
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{ |
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struct mcp23xxx_drv_data *drv_data = dev->data; |
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uint16_t dir = drv_data->reg_cache.iodir; |
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uint16_t output = drv_data->reg_cache.gpio; |
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int ret; |
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if ((flags & GPIO_OUTPUT) != 0U) { |
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if ((flags & GPIO_OUTPUT_INIT_HIGH) != 0U) { |
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output |= BIT(pin); |
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} else if ((flags & GPIO_OUTPUT_INIT_LOW) != 0U) { |
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output &= ~BIT(pin); |
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} |
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dir &= ~BIT(pin); |
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} else { |
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dir |= BIT(pin); |
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} |
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ret = write_port_regs(dev, REG_GPIO, output); |
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if (ret != 0) { |
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return ret; |
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} |
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drv_data->reg_cache.gpio = output; |
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ret = write_port_regs(dev, REG_IODIR, dir); |
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if (ret == 0) { |
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drv_data->reg_cache.iodir = dir; |
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} |
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return ret; |
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} |
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/** |
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* @brief Setup pin pull up/pull down. |
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* |
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* @param dev The mcp23xxx device. |
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* @param pin The pin number. |
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* @param flags Flags of pin or port. |
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* @return 0 if successful. Otherwise <0 will be returned. |
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*/ |
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static int setup_pin_pull(const struct device *dev, uint32_t pin, int flags) |
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{ |
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struct mcp23xxx_drv_data *drv_data = dev->data; |
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uint16_t port; |
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int ret; |
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port = drv_data->reg_cache.gppu; |
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if ((flags & GPIO_PULL_DOWN) != 0U) { |
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return -ENOTSUP; |
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} |
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WRITE_BIT(port, pin, (flags & GPIO_PULL_UP) != 0); |
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ret = write_port_regs(dev, REG_GPPU, port); |
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if (ret == 0) { |
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drv_data->reg_cache.gppu = port; |
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} |
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return ret; |
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} |
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static int mcp23xxx_pin_cfg(const struct device *dev, gpio_pin_t pin, gpio_flags_t flags) |
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{ |
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struct mcp23xxx_drv_data *drv_data = dev->data; |
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const struct mcp23xxx_config *config = dev->config; |
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int ret; |
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if (k_is_in_isr()) { |
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return -EWOULDBLOCK; |
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} |
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k_sem_take(&drv_data->lock, K_FOREVER); |
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if ((bool)(flags & GPIO_SINGLE_ENDED) != config->is_open_drain || |
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(bool)(flags & GPIO_LINE_OPEN_DRAIN) != config->is_open_drain) { |
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ret = -ENOTSUP; |
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goto done; |
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} |
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ret = setup_pin_dir(dev, pin, flags); |
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if (ret < 0) { |
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LOG_ERR("Error setting pin direction (%d)", ret); |
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goto done; |
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} |
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ret = setup_pin_pull(dev, pin, flags); |
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if (ret < 0) { |
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LOG_ERR("Error setting pin pull up/pull down (%d)", ret); |
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goto done; |
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} |
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done: |
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k_sem_give(&drv_data->lock); |
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return ret; |
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} |
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static int mcp23xxx_port_get_raw(const struct device *dev, uint32_t *value) |
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{ |
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struct mcp23xxx_drv_data *drv_data = dev->data; |
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uint16_t buf; |
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int ret; |
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if (k_is_in_isr()) { |
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return -EWOULDBLOCK; |
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} |
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k_sem_take(&drv_data->lock, K_FOREVER); |
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ret = read_port_regs(dev, REG_GPIO, &buf); |
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if (ret == 0) { |
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*value = buf; |
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} |
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k_sem_give(&drv_data->lock); |
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return ret; |
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} |
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static int mcp23xxx_port_set_masked_raw(const struct device *dev, uint32_t mask, uint32_t value) |
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{ |
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struct mcp23xxx_drv_data *drv_data = dev->data; |
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uint16_t buf; |
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int ret; |
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if (k_is_in_isr()) { |
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return -EWOULDBLOCK; |
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} |
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k_sem_take(&drv_data->lock, K_FOREVER); |
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buf = drv_data->reg_cache.gpio; |
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buf = (buf & ~mask) | (mask & value); |
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ret = write_port_regs(dev, REG_GPIO, buf); |
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if (ret == 0) { |
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drv_data->reg_cache.gpio = buf; |
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} |
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k_sem_give(&drv_data->lock); |
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return ret; |
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} |
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static int mcp23xxx_port_set_bits_raw(const struct device *dev, uint32_t mask) |
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{ |
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return mcp23xxx_port_set_masked_raw(dev, mask, mask); |
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} |
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static int mcp23xxx_port_clear_bits_raw(const struct device *dev, uint32_t mask) |
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{ |
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return mcp23xxx_port_set_masked_raw(dev, mask, 0); |
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} |
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static int mcp23xxx_port_toggle_bits(const struct device *dev, uint32_t mask) |
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{ |
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struct mcp23xxx_drv_data *drv_data = dev->data; |
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uint16_t buf; |
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int ret; |
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if (k_is_in_isr()) { |
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return -EWOULDBLOCK; |
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} |
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k_sem_take(&drv_data->lock, K_FOREVER); |
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buf = drv_data->reg_cache.gpio; |
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buf ^= mask; |
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ret = write_port_regs(dev, REG_GPIO, buf); |
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if (ret == 0) { |
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drv_data->reg_cache.gpio = buf; |
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} |
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k_sem_give(&drv_data->lock); |
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return ret; |
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} |
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static int mcp23xxx_pin_interrupt_configure(const struct device *dev, gpio_pin_t pin, |
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enum gpio_int_mode mode, enum gpio_int_trig trig) |
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{ |
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struct mcp23xxx_drv_data *drv_data = dev->data; |
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const struct mcp23xxx_config *config = dev->config; |
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if (!config->gpio_int.port) { |
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return -ENOTSUP; |
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} |
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if (k_is_in_isr()) { |
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return -EWOULDBLOCK; |
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} |
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k_sem_take(&drv_data->lock, K_FOREVER); |
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uint16_t gpinten = drv_data->reg_cache.gpinten; |
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uint16_t defval = drv_data->reg_cache.defval; |
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uint16_t intcon = drv_data->reg_cache.intcon; |
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int ret; |
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switch (mode) { |
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case GPIO_INT_MODE_DISABLED: |
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gpinten &= ~BIT(pin); |
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break; |
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case GPIO_INT_MODE_LEVEL: |
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gpinten |= BIT(pin); |
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intcon |= BIT(pin); |
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switch (trig) { |
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case GPIO_INT_TRIG_LOW: |
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defval |= BIT(pin); |
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break; |
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case GPIO_INT_TRIG_HIGH: |
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defval &= ~BIT(pin); |
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break; |
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case GPIO_INT_TRIG_BOTH: |
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/* can't happen */ |
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ret = -ENOTSUP; |
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goto done; |
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default: |
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ret = -EINVAL; |
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goto done; |
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} |
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break; |
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case GPIO_INT_MODE_EDGE: |
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gpinten |= BIT(pin); |
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intcon &= ~BIT(pin); |
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switch (trig) { |
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case GPIO_INT_TRIG_LOW: |
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drv_data->rising_edge_ints &= ~BIT(pin); |
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drv_data->falling_edge_ints |= BIT(pin); |
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break; |
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case GPIO_INT_TRIG_HIGH: |
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drv_data->rising_edge_ints |= BIT(pin); |
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drv_data->falling_edge_ints &= ~BIT(pin); |
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break; |
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case GPIO_INT_TRIG_BOTH: |
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drv_data->rising_edge_ints |= BIT(pin); |
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drv_data->falling_edge_ints |= BIT(pin); |
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break; |
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default: |
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ret = -EINVAL; |
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goto done; |
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} |
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break; |
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} |
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ret = write_port_regs(dev, REG_GPINTEN, gpinten); |
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if (ret != 0) { |
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goto done; |
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} |
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drv_data->reg_cache.gpinten = gpinten; |
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ret = write_port_regs(dev, REG_DEFVAL, defval); |
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if (ret != 0) { |
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goto done; |
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} |
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drv_data->reg_cache.defval = defval; |
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ret = write_port_regs(dev, REG_INTCON, intcon); |
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if (ret != 0) { |
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goto done; |
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} |
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drv_data->reg_cache.intcon = intcon; |
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done: |
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k_sem_give(&drv_data->lock); |
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return ret; |
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} |
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static int mcp23xxx_manage_callback(const struct device *dev, struct gpio_callback *callback, |
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bool set) |
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{ |
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struct mcp23xxx_drv_data *drv_data = dev->data; |
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const struct mcp23xxx_config *config = dev->config; |
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if (!config->gpio_int.port) { |
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return -ENOTSUP; |
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} |
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if (k_is_in_isr()) { |
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return -EWOULDBLOCK; |
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} |
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k_sem_take(&drv_data->lock, K_FOREVER); |
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int ret = gpio_manage_callback(&drv_data->callbacks, callback, set); |
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k_sem_give(&drv_data->lock); |
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return ret; |
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} |
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static void mcp23xxx_work_handler(struct k_work *work) |
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{ |
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struct mcp23xxx_drv_data *drv_data = CONTAINER_OF(work, struct mcp23xxx_drv_data, work); |
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const struct device *dev = drv_data->dev; |
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int ret; |
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k_sem_take(&drv_data->lock, K_FOREVER); |
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uint16_t intf; |
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ret = read_port_regs(dev, REG_INTF, &intf); |
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if (ret != 0) { |
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LOG_ERR("Failed to read INTF"); |
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goto fail; |
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} |
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if (!intf) { |
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/* Probable causes: |
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* - REG_GPIO was read from somewhere else before the interrupt handler had a chance |
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* to run |
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* - Even though the datasheet says differently, reading INTCAP while a level |
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* interrupt is active briefly (~2ns) causes the interrupt line to go high and |
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* low again. This causes a second ISR to be scheduled, which then won't |
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* find any active interrupts if the callback has disabled the level interrupt. |
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*/ |
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LOG_ERR("Spurious interrupt"); |
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goto fail; |
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} |
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uint16_t intcap; |
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/* Read INTCAP to acknowledge the interrupt */ |
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ret = read_port_regs(dev, REG_INTCAP, &intcap); |
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if (ret != 0) { |
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LOG_ERR("Failed to read INTCAP"); |
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goto fail; |
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} |
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/* mcp23xxx does not support single-edge interrupts in hardware, filter them out manually */ |
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uint16_t level_ints = drv_data->reg_cache.gpinten & drv_data->reg_cache.intcon; |
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intf &= level_ints | (intcap & drv_data->rising_edge_ints) | |
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(~intcap & drv_data->falling_edge_ints); |
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k_sem_give(&drv_data->lock); |
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gpio_fire_callbacks(&drv_data->callbacks, dev, intf); |
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return; |
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fail: |
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k_sem_give(&drv_data->lock); |
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} |
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static void mcp23xxx_int_gpio_handler(const struct device *port, struct gpio_callback *cb, |
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gpio_port_pins_t pins) |
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{ |
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struct mcp23xxx_drv_data *drv_data = |
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CONTAINER_OF(cb, struct mcp23xxx_drv_data, int_gpio_cb); |
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k_work_submit(&drv_data->work); |
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} |
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DEVICE_API(gpio, gpio_mcp23xxx_api_table) = { |
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.pin_configure = mcp23xxx_pin_cfg, |
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.port_get_raw = mcp23xxx_port_get_raw, |
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.port_set_masked_raw = mcp23xxx_port_set_masked_raw, |
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.port_set_bits_raw = mcp23xxx_port_set_bits_raw, |
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.port_clear_bits_raw = mcp23xxx_port_clear_bits_raw, |
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.port_toggle_bits = mcp23xxx_port_toggle_bits, |
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.pin_interrupt_configure = mcp23xxx_pin_interrupt_configure, |
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.manage_callback = mcp23xxx_manage_callback, |
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}; |
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/** |
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* @brief Initialization function of MCP23XXX |
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* |
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* @param dev Device struct. |
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* @return 0 if successful. Otherwise <0 is returned. |
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*/ |
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int gpio_mcp23xxx_init(const struct device *dev) |
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{ |
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const struct mcp23xxx_config *config = dev->config; |
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struct mcp23xxx_drv_data *drv_data = dev->data; |
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int err; |
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if (config->ngpios != 8U && config->ngpios != 16U) { |
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LOG_ERR("Invalid value ngpios=%u. Expected 8 or 16!", config->ngpios); |
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return -EINVAL; |
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} |
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err = config->bus_fn(dev); |
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if (err < 0) { |
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return err; |
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} |
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k_sem_init(&drv_data->lock, 0, 1); |
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/* If the RESET line is available, pulse it. */ |
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if (config->gpio_reset.port) { |
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err = gpio_pin_configure_dt(&config->gpio_reset, GPIO_OUTPUT_ACTIVE); |
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if (err != 0) { |
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LOG_ERR("Failed to configure RESET line: %d", err); |
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return -EIO; |
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} |
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k_usleep(MCP23XXX_RESET_TIME_US); |
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err = gpio_pin_set_dt(&config->gpio_reset, 0); |
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if (err != 0) { |
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LOG_ERR("Failed to deactivate RESET line: %d", err); |
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return -EIO; |
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} |
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} |
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/* If the INT line is available, configure the callback for it. */ |
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if (config->gpio_int.port) { |
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if (config->ngpios == 16) { |
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/* send both ports' interrupts through one IRQ pin */ |
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err = write_iocon(dev, REG_IOCON_MIRROR); |
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if (err != 0) { |
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LOG_ERR("Failed to enable mirrored IRQ pins: %d", err); |
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return -EIO; |
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} |
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} |
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if (!gpio_is_ready_dt(&config->gpio_int)) { |
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LOG_ERR("INT port is not ready"); |
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return -ENODEV; |
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} |
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drv_data->dev = dev; |
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k_work_init(&drv_data->work, mcp23xxx_work_handler); |
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err = gpio_pin_configure_dt(&config->gpio_int, GPIO_INPUT); |
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if (err != 0) { |
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LOG_ERR("Failed to configure INT line: %d", err); |
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return -EIO; |
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} |
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gpio_init_callback(&drv_data->int_gpio_cb, mcp23xxx_int_gpio_handler, |
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BIT(config->gpio_int.pin)); |
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err = gpio_add_callback(config->gpio_int.port, &drv_data->int_gpio_cb); |
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if (err != 0) { |
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LOG_ERR("Failed to add INT callback: %d", err); |
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return -EIO; |
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} |
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err = gpio_pin_interrupt_configure_dt(&config->gpio_int, GPIO_INT_EDGE_TO_ACTIVE); |
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if (err != 0) { |
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LOG_ERR("Failed to configure INT interrupt: %d", err); |
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return -EIO; |
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} |
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} |
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k_sem_give(&drv_data->lock); |
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return 0; |
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}
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