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256 lines
7.8 KiB
256 lines
7.8 KiB
/* |
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* Copyright (c) 2022 ITE Corporation. |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#define DT_DRV_COMPAT ite_it8xxx2_gpiokscan |
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#include <errno.h> |
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#include <zephyr/device.h> |
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#include <zephyr/drivers/gpio.h> |
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#include <zephyr/drivers/gpio/gpio_utils.h> |
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#include <zephyr/dt-bindings/gpio/ite-it8xxx2-gpio.h> |
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#include <zephyr/irq.h> |
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#include <zephyr/sys/util.h> |
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#include <zephyr/types.h> |
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struct gpio_kscan_cfg { |
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/* The gpio_driver_config needs to be first */ |
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struct gpio_driver_config common; |
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/* KSI[7:0]/KSO[15:8]/KSO[7:0] port gpio output enable register (bit mapping to pin) */ |
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volatile uint8_t *reg_ksi_kso_goen; |
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/* KSI[7:0]/KSO[15:8]/KSO[7:0] port gpio control register (bit mapping to pin) */ |
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volatile uint8_t *reg_ksi_kso_gctrl; |
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/* KSI[7:0]/KSO[15:8]/KSO[7:0] port gpio data register (bit mapping to pin) */ |
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volatile uint8_t *reg_ksi_kso_gdat; |
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/* KSI[7:0]/KSO[15:8]/KSO[7:0] port gpio data mirror register (bit mapping to pin) */ |
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volatile uint8_t *reg_ksi_kso_gdmr; |
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/* KSI[7:0]/KSO[15:8]/KSO[7:0] port gpio open drain register (bit mapping to pin) */ |
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volatile uint8_t *reg_ksi_kso_gpod; |
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}; |
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struct gpio_kscan_data { |
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/* The gpio_driver_data needs to be first */ |
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struct gpio_driver_data common; |
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}; |
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static int gpio_kscan_it8xxx2_configure(const struct device *dev, |
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gpio_pin_t pin, |
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gpio_flags_t flags) |
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{ |
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const struct gpio_kscan_cfg *const config = dev->config; |
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volatile uint8_t *reg_ksi_kso_gctrl = config->reg_ksi_kso_gctrl; |
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volatile uint8_t *reg_ksi_kso_goen = config->reg_ksi_kso_goen; |
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volatile uint8_t *reg_ksi_kso_gdat = config->reg_ksi_kso_gdat; |
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volatile uint8_t *reg_ksi_kso_gpod = config->reg_ksi_kso_gpod; |
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uint8_t mask = BIT(pin); |
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/* KSI[7:0]/KSO[15:8]/KSO[7:0] pins don't support open source, 1.8V and 5.0V mode */ |
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if ((((flags & GPIO_SINGLE_ENDED) != 0) && ((flags & GPIO_LINE_OPEN_DRAIN) == 0)) || |
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((flags & IT8XXX2_GPIO_VOLTAGE_MASK) == IT8XXX2_GPIO_VOLTAGE_1P8) || |
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((flags & IT8XXX2_GPIO_VOLTAGE_MASK) == IT8XXX2_GPIO_VOLTAGE_5P0)) { |
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return -ENOTSUP; |
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} |
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/* Set GPIO mode */ |
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*reg_ksi_kso_gctrl |= mask; |
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if (flags & GPIO_OUTPUT) { |
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/* |
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* Select open drain first, so that we don't glitch the signal |
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* when changing the line to an output. |
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*/ |
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if (flags & GPIO_OPEN_DRAIN) { |
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/* Set open-drain and enable internal pullup */ |
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*reg_ksi_kso_gpod |= mask; |
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} else { |
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/* Set push-pull and disable internal pullup */ |
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*reg_ksi_kso_gpod &= ~mask; |
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} |
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unsigned int key = irq_lock(); |
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/* Set level before change to output */ |
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if (flags & GPIO_OUTPUT_INIT_HIGH) { |
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*reg_ksi_kso_gdat |= mask; |
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} else if (flags & GPIO_OUTPUT_INIT_LOW) { |
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*reg_ksi_kso_gdat &= ~mask; |
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} |
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irq_unlock(key); |
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/* Set output mode */ |
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*reg_ksi_kso_goen |= mask; |
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} else { |
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/* Set input mode */ |
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*reg_ksi_kso_goen &= ~mask; |
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if (flags & GPIO_PULL_UP) { |
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/* Enable internal pullup */ |
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*reg_ksi_kso_gpod |= mask; |
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} else { |
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/* No internal pullup and pulldown */ |
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*reg_ksi_kso_gpod &= ~mask; |
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} |
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} |
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return 0; |
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} |
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#ifdef CONFIG_GPIO_GET_CONFIG |
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static int gpio_kscan_it8xxx2_get_config(const struct device *dev, |
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gpio_pin_t pin, |
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gpio_flags_t *out_flags) |
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{ |
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const struct gpio_kscan_cfg *const config = dev->config; |
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volatile uint8_t *reg_ksi_kso_goen = config->reg_ksi_kso_goen; |
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volatile uint8_t *reg_ksi_kso_gdat = config->reg_ksi_kso_gdat; |
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volatile uint8_t *reg_ksi_kso_gpod = config->reg_ksi_kso_gpod; |
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uint8_t mask = BIT(pin); |
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gpio_flags_t flags = 0; |
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/* KSI[7:0]/KSO[15:8]/KSO[7:0] pins only support 3.3V */ |
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flags |= IT8XXX2_GPIO_VOLTAGE_3P3; |
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/* Input or output */ |
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if (*reg_ksi_kso_goen & mask) { |
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flags |= GPIO_OUTPUT; |
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/* Open-drain or push-pull */ |
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if (*reg_ksi_kso_gpod & mask) { |
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flags |= GPIO_OPEN_DRAIN; |
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} |
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/* High or low */ |
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if (*reg_ksi_kso_gdat & mask) { |
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flags |= GPIO_OUTPUT_HIGH; |
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} else { |
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flags |= GPIO_OUTPUT_LOW; |
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} |
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} else { |
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flags |= GPIO_INPUT; |
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/* pullup or no pull */ |
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if (*reg_ksi_kso_gpod & mask) { |
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flags |= GPIO_PULL_UP; |
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} |
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} |
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*out_flags = flags; |
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return 0; |
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} |
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#endif |
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static int gpio_kscan_it8xxx2_port_get_raw(const struct device *dev, |
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gpio_port_value_t *value) |
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{ |
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const struct gpio_kscan_cfg *const config = dev->config; |
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volatile uint8_t *reg_ksi_kso_gdmr = config->reg_ksi_kso_gdmr; |
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/* Get physical level from all pins of the port */ |
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*value = *reg_ksi_kso_gdmr; |
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return 0; |
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} |
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static int gpio_kscan_it8xxx2_port_set_masked_raw(const struct device *dev, |
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gpio_port_pins_t mask, |
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gpio_port_value_t value) |
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{ |
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const struct gpio_kscan_cfg *const config = dev->config; |
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volatile uint8_t *reg_ksi_kso_gdat = config->reg_ksi_kso_gdat; |
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unsigned int key = irq_lock(); |
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uint8_t out = *reg_ksi_kso_gdat; |
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/* Set high/low level to mask pins of the port */ |
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*reg_ksi_kso_gdat = ((out & ~mask) | (value & mask)); |
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irq_unlock(key); |
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return 0; |
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} |
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static int gpio_kscan_it8xxx2_port_set_bits_raw(const struct device *dev, |
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gpio_port_pins_t pins) |
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{ |
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const struct gpio_kscan_cfg *const config = dev->config; |
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volatile uint8_t *reg_ksi_kso_gdat = config->reg_ksi_kso_gdat; |
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unsigned int key = irq_lock(); |
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/* Set high level to pins of the port */ |
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*reg_ksi_kso_gdat |= pins; |
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irq_unlock(key); |
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return 0; |
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} |
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static int gpio_kscan_it8xxx2_port_clear_bits_raw(const struct device *dev, |
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gpio_port_pins_t pins) |
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{ |
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const struct gpio_kscan_cfg *const config = dev->config; |
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volatile uint8_t *reg_ksi_kso_gdat = config->reg_ksi_kso_gdat; |
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unsigned int key = irq_lock(); |
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/* Set low level to pins of the port */ |
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*reg_ksi_kso_gdat &= ~pins; |
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irq_unlock(key); |
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return 0; |
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} |
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static int gpio_kscan_it8xxx2_port_toggle_bits(const struct device *dev, |
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gpio_port_pins_t pins) |
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{ |
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const struct gpio_kscan_cfg *const config = dev->config; |
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volatile uint8_t *reg_ksi_kso_gdat = config->reg_ksi_kso_gdat; |
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unsigned int key = irq_lock(); |
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/* Toggle output level to pins of the port */ |
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*reg_ksi_kso_gdat ^= pins; |
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irq_unlock(key); |
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return 0; |
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} |
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static DEVICE_API(gpio, gpio_kscan_it8xxx2_driver_api) = { |
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.pin_configure = gpio_kscan_it8xxx2_configure, |
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#ifdef CONFIG_GPIO_GET_CONFIG |
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.pin_get_config = gpio_kscan_it8xxx2_get_config, |
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#endif |
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.port_get_raw = gpio_kscan_it8xxx2_port_get_raw, |
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.port_set_masked_raw = gpio_kscan_it8xxx2_port_set_masked_raw, |
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.port_set_bits_raw = gpio_kscan_it8xxx2_port_set_bits_raw, |
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.port_clear_bits_raw = gpio_kscan_it8xxx2_port_clear_bits_raw, |
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.port_toggle_bits = gpio_kscan_it8xxx2_port_toggle_bits, |
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}; |
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#define GPIO_KSCAN_IT8XXX2_INIT(inst) \ |
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static const struct gpio_kscan_cfg gpio_kscan_it8xxx2_cfg_##inst = { \ |
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.common = { \ |
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.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS( \ |
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DT_INST_PROP(inst, ngpios)) \ |
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}, \ |
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.reg_ksi_kso_goen = (uint8_t *)DT_INST_REG_ADDR_BY_NAME(inst, goen), \ |
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.reg_ksi_kso_gctrl = (uint8_t *)DT_INST_REG_ADDR_BY_NAME(inst, gctrl), \ |
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.reg_ksi_kso_gdat = (uint8_t *)DT_INST_REG_ADDR_BY_NAME(inst, gdat), \ |
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.reg_ksi_kso_gdmr = (uint8_t *)DT_INST_REG_ADDR_BY_NAME(inst, gdmr), \ |
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.reg_ksi_kso_gpod = (uint8_t *)DT_INST_REG_ADDR_BY_NAME(inst, gpod), \ |
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}; \ |
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\ |
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static struct gpio_kscan_data gpio_kscan_it8xxx2_data_##inst; \ |
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\ |
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DEVICE_DT_INST_DEFINE(inst, \ |
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NULL, \ |
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NULL, \ |
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&gpio_kscan_it8xxx2_data_##inst, \ |
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&gpio_kscan_it8xxx2_cfg_##inst, \ |
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PRE_KERNEL_1, \ |
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CONFIG_GPIO_INIT_PRIORITY, \ |
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&gpio_kscan_it8xxx2_driver_api); |
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DT_INST_FOREACH_STATUS_OKAY(GPIO_KSCAN_IT8XXX2_INIT)
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