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83 lines
2.3 KiB
83 lines
2.3 KiB
# STM32 LTDC display driver configuration options |
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# Copyright (c) 2022 Byte-Lab d.o.o. <dev@byte-lab.com> |
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# SPDX-License-Identifier: Apache-2.0 |
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menuconfig STM32_LTDC |
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bool "STM32 LCD-TFT display controller driver" |
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default y |
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depends on DT_HAS_ST_STM32_LTDC_ENABLED |
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select USE_STM32_HAL_LTDC |
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select USE_STM32_HAL_RIF if SOC_SERIES_STM32N6X |
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select CACHE_MANAGEMENT if CPU_HAS_DCACHE |
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select PINCTRL |
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help |
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Enable driver for STM32 LCT-TFT display controller periheral. |
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if STM32_LTDC |
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choice STM32_LTDC_PIXEL_FORMAT |
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prompt "Color pixel format" |
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default STM32_LTDC_RGB565 |
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depends on STM32_LTDC |
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help |
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Specify the color pixel format for the STM32 LCD-TFT display controller. |
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config STM32_LTDC_ARGB8888 |
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bool "ARGB8888" |
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help |
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One pixel consists of 8-bit alpha, 8-bit red, 8-bit green and 8-bit blue value |
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(4 bytes per pixel) |
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config STM32_LTDC_RGB888 |
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bool "RGB888" |
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help |
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One pixel consists of 8-bit red, 8-bit green and 8-bit blue value |
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(3 bytes per pixel) |
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config STM32_LTDC_RGB565 |
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bool "RGB565" |
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help |
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One pixel consists of 5-bit red, 6-bit green and 5-bit blue value |
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(2 bytes per pixel) |
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endchoice |
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config STM32_LTDC_FB_NUM |
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int "Frame buffer number" |
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default 1 |
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range 0 2 |
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help |
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STM32 LTDC frame buffer number config: |
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- 0 frame buffer maintained by application, must write with full screen pixels. |
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- 1 single frame buffer in stm32 ltdc driver. |
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- 2 double frame buffer in stm32 ltdc driver. |
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config STM32_LTDC_FB_USE_SHARED_MULTI_HEAP |
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bool "Use shared multi heap for the display buffer" |
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config STM32_LTDC_FB_SMH_ATTRIBUTE |
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int "Shared multi heap attribute for the display buffer" |
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depends on STM32_LTDC_FB_USE_SHARED_MULTI_HEAP |
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default 0 |
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range 0 2 |
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help |
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Shared multi heap attribute for the display buffer: |
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0: SMH_REG_ATTR_CACHEABLE |
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1: SMH_REG_ATTR_NON_CACHEABLE |
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2: SMH_REG_ATTR_EXTERNAL |
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config STM32_LTDC_FB_SMH_ALIGN |
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int "Shared multi heap buffer alignment for the display buffer" |
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depends on STM32_LTDC_FB_USE_SHARED_MULTI_HEAP |
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default 32 |
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config STM32_LTDC_DISABLE_FMC_BANK1 |
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bool "Disable FMC bank1 for STM32F7/H7 series" |
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depends on SOC_SERIES_STM32H7X || SOC_SERIES_STM32F7X |
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default y |
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help |
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Disable FMC bank1 if not used to prevent speculative read accesses. |
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Refer to AN4861 "4.6 Special recommendations for Cortex-M7 (STM32F7/H7)". |
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endif # STM32_LTDC
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