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73 lines
1.7 KiB
73 lines
1.7 KiB
/* |
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* Copyright (c) 2018 Foundries.io |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#define DT_DRV_COMPAT openisa_rv32m1_pcc |
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#include <errno.h> |
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#include <soc.h> |
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#include <zephyr/drivers/clock_control.h> |
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#include <fsl_clock.h> |
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#define LOG_LEVEL CONFIG_CLOCK_CONTROL_LOG_LEVEL |
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#include <zephyr/logging/log.h> |
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LOG_MODULE_REGISTER(clock_control); |
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struct rv32m1_pcc_config { |
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uint32_t base_address; |
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}; |
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#define DEV_BASE(dev) \ |
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(((struct rv32m1_pcc_config *)(dev->config))->base_address) |
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static inline clock_ip_name_t clock_ip(const struct device *dev, |
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clock_control_subsys_t sub_system) |
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{ |
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uint32_t offset = POINTER_TO_UINT(sub_system); |
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return MAKE_PCC_REGADDR(DEV_BASE(dev), offset); |
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} |
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static int rv32m1_pcc_on(const struct device *dev, |
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clock_control_subsys_t sub_system) |
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{ |
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CLOCK_EnableClock(clock_ip(dev, sub_system)); |
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return 0; |
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} |
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static int rv32m1_pcc_off(const struct device *dev, |
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clock_control_subsys_t sub_system) |
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{ |
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CLOCK_DisableClock(clock_ip(dev, sub_system)); |
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return 0; |
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} |
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static int rv32m1_pcc_get_rate(const struct device *dev, |
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clock_control_subsys_t sub_system, |
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uint32_t *rate) |
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{ |
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*rate = CLOCK_GetIpFreq(clock_ip(dev, sub_system)); |
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return 0; |
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} |
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static DEVICE_API(clock_control, rv32m1_pcc_api) = { |
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.on = rv32m1_pcc_on, |
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.off = rv32m1_pcc_off, |
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.get_rate = rv32m1_pcc_get_rate, |
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}; |
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#define RV32M1_PCC_INIT(inst) \ |
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static const struct rv32m1_pcc_config rv32m1_pcc##inst##_config = { \ |
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.base_address = DT_INST_REG_ADDR(inst) \ |
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}; \ |
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\ |
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DEVICE_DT_INST_DEFINE(inst, \ |
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NULL, \ |
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NULL, \ |
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NULL, &rv32m1_pcc##inst##_config, \ |
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PRE_KERNEL_1, \ |
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CONFIG_CLOCK_CONTROL_INIT_PRIORITY, \ |
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&rv32m1_pcc_api); |
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DT_INST_FOREACH_STATUS_OKAY(RV32M1_PCC_INIT)
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