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65 lines
2.0 KiB
65 lines
2.0 KiB
/* |
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* Copyright (c) 2024 Renesas Electronics Corporation |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#define DT_DRV_COMPAT renesas_rx_cgc_root_clock |
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#include <string.h> |
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#include <zephyr/drivers/clock_control.h> |
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#include <zephyr/kernel.h> |
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#include <soc.h> |
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#include <zephyr/drivers/clock_control/renesas_rx_cgc.h> |
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static int clock_control_renesas_rx_root_on(const struct device *dev, clock_control_subsys_t sys) |
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{ |
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return -ENOTSUP; |
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} |
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static int clock_control_renesas_rx_root_off(const struct device *dev, clock_control_subsys_t sys) |
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{ |
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return -ENOTSUP; |
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} |
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static int clock_control_renesas_rx_root_get_rate(const struct device *dev, |
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clock_control_subsys_t sys, uint32_t *rate) |
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{ |
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const struct clock_control_rx_root_cfg *config = dev->config; |
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ARG_UNUSED(sys); |
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if (!device_is_ready(dev)) { |
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return -ENODEV; |
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} |
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*rate = config->rate; |
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return 0; |
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} |
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static int clock_control_rx_init(const struct device *dev) |
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{ |
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ARG_UNUSED(dev); |
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#if CONFIG_HAS_RENESAS_RX_RDP |
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/* Call to HAL layer to initialize system clock and peripheral clock */ |
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mcu_clock_setup(); |
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#endif |
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return 0; |
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} |
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static DEVICE_API(clock_control, clock_control_renesas_rx_root_api) = { |
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.on = clock_control_renesas_rx_root_on, |
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.off = clock_control_renesas_rx_root_off, |
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.get_rate = clock_control_renesas_rx_root_get_rate, |
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}; |
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#define ROOT_CLK_INIT(idx) \ |
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static const struct clock_control_rx_root_cfg clock_control_rx_root_cfg##idx = { \ |
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.rate = DT_INST_PROP(idx, clock_frequency), \ |
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}; \ |
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DEVICE_DT_INST_DEFINE(idx, &clock_control_rx_init, NULL, NULL, \ |
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&clock_control_rx_root_cfg##idx, PRE_KERNEL_1, \ |
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CONFIG_CLOCK_CONTROL_INIT_PRIORITY, \ |
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&clock_control_renesas_rx_root_api); |
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DT_INST_FOREACH_STATUS_OKAY(ROOT_CLK_INIT);
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