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80 lines
1.8 KiB
80 lines
1.8 KiB
/* |
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* Copyright 2023 NXP |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#define DT_DRV_COMPAT nxp_s32_clock |
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#include <zephyr/drivers/clock_control.h> |
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#include <Clock_Ip.h> |
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#define NXP_S32_CLOCK_CONFIG_IDX CONFIG_CLOCK_CONTROL_NXP_S32_CLOCK_CONFIG_IDX |
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BUILD_ASSERT(CLOCK_IP_GET_FREQUENCY_API == STD_ON, |
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"Clock Get Frequency API must be enabled"); |
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static int nxp_s32_clock_on(const struct device *dev, |
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clock_control_subsys_t sub_system) |
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{ |
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Clock_Ip_NameType clock_name = (Clock_Ip_NameType)sub_system; |
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if ((clock_name <= CLOCK_IS_OFF) || (clock_name >= RESERVED_CLK)) { |
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return -EINVAL; |
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} |
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Clock_Ip_EnableModuleClock(clock_name); |
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return 0; |
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} |
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static int nxp_s32_clock_off(const struct device *dev, |
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clock_control_subsys_t sub_system) |
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{ |
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Clock_Ip_NameType clock_name = (Clock_Ip_NameType)sub_system; |
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if ((clock_name <= CLOCK_IS_OFF) || (clock_name >= RESERVED_CLK)) { |
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return -EINVAL; |
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} |
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Clock_Ip_DisableModuleClock(clock_name); |
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return 0; |
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} |
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static int nxp_s32_clock_get_rate(const struct device *dev, |
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clock_control_subsys_t sub_system, |
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uint32_t *rate) |
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{ |
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Clock_Ip_NameType clock_name = (Clock_Ip_NameType)sub_system; |
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if ((clock_name <= CLOCK_IS_OFF) || (clock_name >= RESERVED_CLK)) { |
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return -EINVAL; |
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} |
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*rate = Clock_Ip_GetClockFrequency(clock_name); |
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return 0; |
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} |
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static int nxp_s32_clock_init(const struct device *dev) |
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{ |
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Clock_Ip_StatusType status; |
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status = Clock_Ip_Init(&Clock_Ip_aClockConfig[NXP_S32_CLOCK_CONFIG_IDX]); |
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return (status == CLOCK_IP_SUCCESS ? 0 : -EIO); |
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} |
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static DEVICE_API(clock_control, nxp_s32_clock_driver_api) = { |
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.on = nxp_s32_clock_on, |
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.off = nxp_s32_clock_off, |
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.get_rate = nxp_s32_clock_get_rate, |
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}; |
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DEVICE_DT_INST_DEFINE(0, |
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nxp_s32_clock_init, |
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NULL, NULL, NULL, |
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PRE_KERNEL_1, CONFIG_CLOCK_CONTROL_INIT_PRIORITY, |
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&nxp_s32_clock_driver_api);
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