Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
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/*
* Copyright 2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <nxp/nxp_mimx91.dtsi>
#include "imx91_evk-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "NXP i.MX91 A55";
compatible = "fsl,mimx91";
chosen {
zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1;
/* sram node actually locates at DDR DRAM */
zephyr,sram = &dram;
};
dram: memory@80000000 {
reg = <0x80000000 DT_SIZE_M(1)>;
};
aliases {
led0 = &led_r;
led1 = &led_g;
sw0 = &btn_1;
};
leds {
compatible = "gpio-leds";
led_r: led_r {
label = "LED_R";
gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
};
led_g: led_g {
label = "LED_G";
gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
};
led_b: led_b {
label = "LED_B";
gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
};
};
keys {
compatible = "gpio-keys";
btn_1: btn_1{
label = "BTN1";
gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
btn_2: btn_2{
label = "BTN2";
gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_1>;
};
};
};
&lpuart1 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart1_default>;
pinctrl-names = "default";
};
&gpio2{
status = "okay";
};
&lpi2c1 {
clock-frequency = <I2C_BITRATE_FAST>;
pinctrl-0 = <&i2c1_default>;
pinctrl-names = "default";
status = "okay";
};
&lpi2c2 {
clock-frequency = <I2C_BITRATE_FAST>;
pinctrl-0 = <&i2c2_default>;
pinctrl-names = "default";
status = "okay";
};
&tpm2 {
status = "okay";
};