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Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
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zephyr/boards/amd/versal2_rpu/versal2_rpu-qemu.dts

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/dts-v1/;
/ {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
pmc_ppu0_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x248>;
phandle = <0x108>;
};
pmc_ppu1_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x249>;
phandle = <0x109>;
};
psm_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x238>;
phandle = <0x10a>;
};
ddrmc_ub0_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x00>;
phandle = <0x10b>;
};
ddrmc_ub1_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x00>;
phandle = <0x10c>;
};
pmc_dma0_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x24a>;
phandle = <0x8b>;
};
pmc_dma1_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x24b>;
phandle = <0x8c>;
};
pmc_qspi_dma_ma_smid {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
requester-id = <0x244>;
phandle = <0x7d>;
};
pmc_qspi_dma_w_ma_smid {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
requester-id = <0x244>;
phandle = <0x7b>;
};
apu0_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x260>;
phandle = <0xd3>;
};
apu0_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x260>;
phandle = <0xd4>;
};
apu1_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x261>;
phandle = <0xd5>;
};
apu1_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x261>;
phandle = <0xd6>;
};
rpu0_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x200>;
phandle = <0xe4>;
};
rpu1_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x204>;
phandle = <0xe7>;
};
gem0_ma_smid {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
requester-id = <0x234>;
phandle = <0x18>;
};
gem0_w_ma_smid {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
requester-id = <0x234>;
phandle = <0x19>;
};
gem1_ma_smid {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
requester-id = <0x235>;
phandle = <0x1d>;
};
gem1_w_ma_smid {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
requester-id = <0x235>;
phandle = <0x1e>;
};
ospi_dma_ma_smid {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
requester-id = <0x245>;
phandle = <0x81>;
};
ospi_dma_w_ma_smid {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
requester-id = <0x245>;
phandle = <0x7c>;
};
sd0_ma_smid {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
requester-id = <0x242>;
phandle = <0x77>;
};
sd0_w_ma_smid {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
requester-id = <0x242>;
phandle = <0x78>;
};
sd1_ma_smid {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
requester-id = <0x243>;
phandle = <0x79>;
};
sd1_w_ma_smid {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
requester-id = <0x243>;
phandle = <0x7a>;
};
usb0_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x230>;
phandle = <0x20>;
};
amba_root@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
#interrupt-cells = <0x01>;
interrupt-map-mask = <0x00 0x00 0xffff>;
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0x00 0x00 0xaa 0x07 0x00 0xaa 0x04 0x00 0x00 0xab 0x07 0x00 0xab 0x04 0x00 0x00 0xac 0x07
0x00 0xac 0x04 0x00 0x00 0xad 0x07 0x00 0xad 0x04 0x00 0x00 0xae 0x07 0x00 0xae 0x04 0x00
0x00 0xaf 0x07 0x00 0xaf 0x04 0x00 0x00 0xb0 0x07 0x00 0xb0 0x04 0x00 0x00 0xb1 0x07 0x00
0xb1 0x04 0x00 0x00 0xb2 0x07 0x00 0xb2 0x04 0x00 0x00 0xb3 0x07 0x00 0xb3 0x04 0x00 0x00
0xb4 0x07 0x00 0xb4 0x04 0x00 0x00 0xb5 0x07 0x00 0xb5 0x04 0x00 0x00 0xb6 0x07 0x00 0xb6
0x04 0x00 0x00 0xb7 0x07 0x00 0xb7 0x04 0x00 0x00 0xb8 0x07 0x00 0xb8 0x04 0x00 0x00 0xb9
0x07 0x00 0xb9 0x04 0x00 0x00 0xba 0x07 0x00 0xba 0x04 0x00 0x00 0xbb 0x07 0x00 0xbb 0x04
0x00 0x00 0xbc 0x07 0x00 0xbc 0x04 0x00 0x00 0xbd 0x07 0x00 0xbd 0x04 0x00 0x00 0xbe 0x07
0x00 0xbe 0x04 0x00 0x00 0xbf 0x07 0x00 0xbf 0x04 0x00 0x00 0xc0 0x07 0x00 0xc0 0x04 0x00
0x00 0xc1 0x07 0x00 0xc1 0x04 0x00 0x00 0xc2 0x07 0x00 0xc2 0x04 0x00 0x00 0xc3 0x07 0x00
0xc3 0x04 0x00 0x00 0xc4 0x07 0x00 0xc4 0x04 0x00 0x00 0xc5 0x07 0x00 0xc5 0x04 0x00 0x00
0xc6 0x07 0x00 0xc6 0x04 0x00 0x00 0xc7 0x07 0x00 0xc7 0x04 0x00 0x00 0xc8 0x07 0x00 0xc8
0x04 0x00 0x00 0xc9 0x07 0x00 0xc9 0x04 0x00 0x00 0xca 0x07 0x00 0xca 0x04 0x00 0x00 0xcb
0x07 0x00 0xcb 0x04 0x00 0x00 0xcc 0x07 0x00 0xcc 0x04 0x00 0x00 0xcd 0x07 0x00 0xcd 0x04
0x00 0x00 0xce 0x07 0x00 0xce 0x04 0x00 0x00 0xcf 0x07 0x00 0xcf 0x04 0x00 0x00 0xd0 0x07
0x00 0xd0 0x04 0x00 0x00 0xd1 0x07 0x00 0xd1 0x04 0x00 0x00 0xd2 0x07 0x00 0xd2 0x04 0x00
0x00 0xd3 0x07 0x00 0xd3 0x04 0x00 0x00 0xd4 0x07 0x00 0xd4 0x04 0x00 0x00 0xd5 0x07 0x00
0xd5 0x04 0x00 0x00 0xd6 0x07 0x00 0xd6 0x04 0x00 0x00 0xd7 0x07 0x00 0xd7 0x04 0x00 0x00
0xd8 0x07 0x00 0xd8 0x04 0x00 0x00 0xd9 0x07 0x00 0xd8 0x04 0x00 0x00 0xda 0x07 0x00 0xda
0x04 0x00 0x00 0xdb 0x07 0x00 0xdb 0x04 0x00 0x00 0xdc 0x07 0x00 0xdc 0x04 0x00 0x00 0xdd
0x07 0x00 0xdd 0x04 0x00 0x00 0xde 0x07 0x00 0xde 0x04 0x00 0x00 0xdf 0x07 0x00 0xdf 0x04
0x00 0x00 0xe0 0x07 0x00 0xe0 0x04 0x00 0x00 0xe1 0x07 0x00 0xe1 0x04 0x00 0x00 0xe2 0x07
0x00 0xe2 0x04 0x00 0x00 0xe3 0x07 0x00 0xe3 0x04 0x00 0x00 0xe4 0x07 0x00 0xe4 0x04 0x00
0x00 0xe5 0x07 0x00 0xe5 0x04 0x00 0x00 0xe6 0x07 0x00 0xe6 0x04 0x00 0x00 0xe7 0x07 0x00
0xe7 0x04 0x00 0x00 0xe8 0x07 0x00 0xe8 0x04 0x00 0x00 0xe9 0x07 0x00 0xe9 0x04 0x00 0x00
0xea 0x07 0x00 0xea 0x04 0x00 0x00 0xeb 0x07 0x00 0xeb 0x04 0x00 0x00 0xec 0x07 0x00 0xec
0x04 0x00 0x00 0xed 0x07 0x00 0xed 0x04 0x00 0x00 0xee 0x07 0x00 0xee 0x04 0x00 0x00 0xef
0x07 0x00 0xef 0x04 0x00 0x00 0xf0 0x07 0x00 0xf0 0x04 0x00 0x00 0xf1 0x07 0x00 0xf1 0x04
0x00 0x00 0xf2 0x07 0x00 0xf2 0x04 0x00 0x00 0xf3 0x07 0x00 0xf3 0x04 0x00 0x00 0xf4 0x07
0x00 0xf4 0x04 0x00 0x00 0xf5 0x07 0x00 0xf5 0x04 0x00 0x00 0xf6 0x07 0x00 0xf6 0x04 0x00
0x00 0xf7 0x07 0x00 0xf7 0x04 0x00 0x00 0xf8 0x07 0x00 0xf8 0x04 0x00 0x00 0xf9 0x07 0x00
0xf9 0x04 0x00 0x00 0xfa 0x07 0x00 0xfa 0x04 0x00 0x00 0xfb 0x07 0x00 0xfb 0x04 0x00 0x00
0xfc 0x07 0x00 0xfc 0x04 0x00 0x00 0xfd 0x07 0x00 0xfd 0x04 0x00 0x00 0xfe 0x07 0x00 0xfe
0x04 0x00 0x00 0xff 0x07 0x00 0xff 0x04 0x00 0x00 0xa0 0x07 0x00 0xa0 0x04 0x00 0x00 0xbca
0x08 0x12 0x00 0x00 0xbd4 0x08 0x1c 0x00 0x00 0xbd5 0x08 0x1d 0x00 0x00 0xfbc 0x09 0x1c>;
phandle = <0x10d>;
amba@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x0d>;
downstream_amba_lpd {
compatible = "qemu:memory-region";
alias = <0x0a>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0xffffffff>;
};
downstream_amba_fpd {
compatible = "qemu:memory-region";
alias = <0x0b>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0xffffffff>;
};
downstream_amba_pmc_internal {
compatible = "qemu:memory-region";
alias = <0x0c>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0xffffffff>;
};
xmpu_ocm@0 {
compatible = "xlnx,versal-xmpu";
interrupts = <0x10>;
reg-extended = <0x0d 0x00 0xeb400000 0x00 0x10000 0x00 0x0d 0x00
0xbbf00000 0x00 0x80000 0x02>;
protected-mr = <0x0e>;
mr-0 = <0x0d>;
protected-base = <0xbbf00000>;
phandle = <0x10e>;
};
xmpu_ocm2@0 {
compatible = "xlnx,versal-xmpu";
interrupts = <0x10>;
reg-extended = <0x0d 0x00 0xeb9e0000 0x00 0x10000 0x00 0x0d 0x00
0xbbe00000 0x00 0x80000 0x00>;
protected-mr = <0x0e>;
mr-0 = <0x0d>;
protected-base = <0xbbe00000>;
phandle = <0x10f>;
};
loader_write_cpu0_0x1@0xF1110880 {
compatible = "loader";
addr = <0xf1110880>;
data = <0x01>;
data-len = <0x04>;
cpu-num = <0x00>;
attrs-debug = <0x01>;
attrs-secure = <0x00>;
attrs-requester-id = <0x00>;
phandle = <0x110>;
};
loader_write_cpu0_0x5@0xFD1A0050 {
compatible = "loader";
addr = <0xfd1a0050>;
data = <0x05>;
data-len = <0x04>;
cpu-num = <0x00>;
attrs-debug = <0x01>;
attrs-secure = <0x00>;
attrs-requester-id = <0x00>;
phandle = <0x111>;
};
loader_write_cpu0_0xFF@0xF111010C {
compatible = "loader";
addr = <0xf111010c>;
data = <0xff>;
data-len = <0x04>;
cpu-num = <0x00>;
attrs-debug = <0x01>;
attrs-secure = <0x00>;
attrs-requester-id = <0x00>;
phandle = <0x112>;
};
s_axi_tcm_a@0 {
compatible = "qemu:memory-region";
alias = <0x0f>;
reg = <0x00 0xeba00000 0x00 0x800000 0x00>;
phandle = <0x34>;
};
s_axi_tcm_b@0 {
compatible = "qemu:memory-region";
alias = <0x10>;
reg = <0x00 0xeba80000 0x00 0x800000 0x00>;
phandle = <0x38>;
};
s_axi_tcm_c@0 {
compatible = "qemu:memory-region";
alias = <0x11>;
reg = <0x00 0xebb00000 0x00 0x800000 0x00>;
phandle = <0x3c>;
};
s_axi_tcm_d@0 {
compatible = "qemu:memory-region";
alias = <0x12>;
reg = <0x00 0xebb80000 0x00 0x800000 0x00>;
phandle = <0x40>;
};
s_axi_tcm_e@0 {
compatible = "qemu:memory-region";
alias = <0x13>;
reg = <0x00 0xebc00000 0x00 0x800000 0x00>;
phandle = <0x44>;
};
loader_write_cpu0_0x80C@0xF12B0100 {
compatible = "loader";
addr = <0xf12b0100>;
data = <0x80c>;
data-len = <0x04>;
cpu-num = <0x00>;
attrs-debug = <0x01>;
attrs-secure = <0x00>;
attrs-requester-id = <0x00>;
phandle = <0x113>;
};
loader_write_cpu0_0x77@0xF1260320 {
compatible = "loader";
addr = <0xf1260320>;
data = <0x77>;
data-len = <0x04>;
cpu-num = <0x00>;
attrs-debug = <0x01>;
attrs-secure = <0x00>;
attrs-requester-id = <0x00>;
phandle = <0x114>;
};
xmpu_ocm1@0 {
compatible = "xlnx,versal-xmpu";
interrupts = <0x10>;
reg-extended = <0x0d 0x00 0xeb980000 0x00 0x10000 0x00 0x0d 0x00
0xbbf80000 0x00 0x80000 0x00>;
protected-mr = <0x0e>;
mr-0 = <0x0d>;
protected-base = <0xbbf80000>;
phandle = <0x115>;
};
xmpu_ocm3@0 {
compatible = "xlnx,versal-xmpu";
interrupts = <0x10>;
reg-extended = <0x0d 0x00 0xeaa10000 0x00 0x10000 0x00 0x0d 0x00
0xbbe80000 0x00 0x80000 0x00>;
protected-mr = <0x0e>;
mr-0 = <0x0d>;
protected-base = <0xbbe80000>;
phandle = <0x116>;
};
};
amba_lpd@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x0a>;
downstream_amba_psm {
compatible = "qemu:memory-region";
alias = <0x14>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0xffffffff>;
};
downstream_amba_xram {
compatible = "qemu:memory-region";
alias = <0x15>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0xffffffff>;
};
xppu_lpd@0xeb990000 {
compatible = "xlnx,versal-xppu";
reg-extended = <0x0a 0x00 0xeb990000 0x00 0x10000 0x00 0x16 0x00
0xeb000000 0x00 0x1000000 0x02 0x16 0x00 0xea000000 0x00 0x1000000 0x02>;
mr = <0x0a>;
interrupts = <0x13>;
phandle = <0x117>;
};
ethernet@0xf1a60000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
#priority-cells = <0x00>;
compatible = "cdns,gem";
interrupts = <0x27 0x27>;
dma = <0x17>;
memattr = <0x18>;
memattr-write = <0x19>;
reg = <0x00 0xf1a60000 0x00 0x10000 0x00>;
num-priority-queues = <0x02>;
reset-gpios = <0x1a 0x01>;
power-gpios = <0x1b 0x2c>;
mdio = <0x1c>;
phandle = <0x118>;
};
ethernet@0xf1a70000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
#priority-cells = <0x00>;
compatible = "cdns,gem";
interrupts = <0x29 0x29>;
dma = <0x17>;
memattr = <0x1d>;
memattr-write = <0x1e>;
reg = <0x00 0xf1a70000 0x00 0x10000 0x00>;
num-priority-queues = <0x02>;
reset-gpios = <0x1a 0x02>;
power-gpios = <0x1b 0x2d>;
mdio = <0x1c>;
phandle = <0x119>;
};
serial@0xf1920000 {
compatible = "pl011";
interrupts = <0x19>;
reg = <0x00 0xf1920000 0x00 0x10000 0x00>;
reset-gpios = <0x1a 0x05>;
chardev = "serial2";
phandle = <0x11a>;
};
serial@0xf1930000 {
compatible = "pl011";
interrupts = <0x1a>;
reg = <0x00 0xf1930000 0x00 0x10000 0x00>;
reset-gpios = <0x1a 0x06>;
chardev = "con";
phandle = <0x11b>;
};
canfdbus@0 {
compatible = "can-bus";
phandle = <0x1f>;
};
can@0xf19e0000 {
compatible = "xlnx,versal-canfd";
rx-fifo0 = <0x40>;
rx-fifo1 = <0x40>;
enable-rx-fifo1 = <0x01>;
canfdbus = <0x1f>;
interrupts = <0x1b>;
reg = <0x00 0xf19e0000 0x00 0x10000 0x00>;
reset-gpios = <0x1a 0x09>;
phandle = <0x11c>;
};
can@0xf19f0000 {
compatible = "xlnx,versal-canfd";
rx-fifo0 = <0x40>;
rx-fifo1 = <0x40>;
enable-rx-fifo1 = <0x01>;
canfdbus = <0x1f>;
interrupts = <0x1c>;
reg = <0x00 0xf19f0000 0x00 0x10000 0x00>;
reset-gpios = <0x1a 0x0a>;
phandle = <0x11d>;
};
crl@0xeb5e0000 {
compatible = "xlnx,psxc_crl";
reg = <0x00 0xeb5e0000 0x00 0x300000 0x00>;
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0x1a>;
};
slcr@0xf1a20000 {
compatible = "xlnx,versal-lpd-iou-slcr";
reg = <0x00 0xf1a20000 0x00 0x20000 0x00>;
phandle = <0x11e>;
};
ipi@0xeb300000 {
compatible = "xlnx,versal-ipi";
reg = <0x00 0xeb300000 0x00 0x100000 0x00>;
interrupts = <0xfbc 0xbd4 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0xbd5
0x46 0x40 0x41 0x42 0x43 0x44 0x45>;
reset-gpios = <0x1a 0x19>;
num-master-ids = <0x20>;
phandle = <0x11f>;
};
spi@0xf19c0000 {
compatible = "cdns,spi-r1p6";
interrupts = <0x17>;
num-ss-bits = <0x04>;
reg = <0x00 0xf19c0000 0x00 0x10000 0x00>;
#address-cells = <0x01>;
#size-cells = <0x00>;
#bus-cells = <0x01>;
reset-gpios = <0x1a 0x07>;
phandle = <0x120>;
spi0_flash0@0 {
#address-cells = <0x01>;
#size-cells = <0x01>;
#priority-cells = <0x00>;
#bus-cells = <0x01>;
compatible = "m25p80\0st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x00 0x00>;
blockdev-node-name = "spi0_flash0";
phandle = <0x121>;
spi0_flash0@0x00000000 {
label = "spi0_flash0";
reg = <0x00 0x100000>;
};
};
};
spi@0xf19d0000 {
compatible = "cdns,spi-r1p6";
interrupts = <0x18>;
num-ss-bits = <0x04>;
reg = <0x00 0xf19d0000 0x00 0x10000 0x00>;
#address-cells = <0x01>;
#size-cells = <0x00>;
#bus-cells = <0x01>;
reset-gpios = <0x1a 0x08>;
phandle = <0x122>;
spi1_flash0@0 {
#address-cells = <0x01>;
#size-cells = <0x01>;
#priority-cells = <0x00>;
#bus-cells = <0x01>;
compatible = "m25p80\0st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x00 0x00>;
blockdev-node-name = "spi1_flash0";
phandle = <0x123>;
spi1_flash0@0x00000000 {
label = "spi1_flash0";
reg = <0x00 0x100000>;
};
};
};
usb2@USB2_0_XHCI {
compatible = "usb_dwc3";
reg = <0x00 0xf1b0c100 0x00 0x600 0x00 0x00 0xf1b00000 0x00
0x100000 0x00>;
interrupts = <0x1d 0x1e 0x1f 0x20>;
dma = <0x17>;
memattr = <0x20>;
reset-gpios = <0x1a 0x03>;
intrs = <0x04>;
slots = <0x02>;
phandle = <0x124>;
};
timer@0xf1e60000 {
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x2b 0x2b 0x2b>;
reg = <0x00 0xf1e60000 0x00 0x10000 0x00>;
width = <0x20>;
reset-gpios = <0x1a 0x12>;
phandle = <0x125>;
};
timer@0xf1e70000 {
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x2c 0x2c 0x2c>;
reg = <0x00 0xf1e70000 0x00 0x10000 0x00>;
width = <0x20>;
reset-gpios = <0x1a 0x13>;
phandle = <0x126>;
};
timer@0xf1e80000 {
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x2d 0x2d 0x2d>;
reg = <0x00 0xf1e80000 0x00 0x10000 0x00>;
width = <0x20>;
reset-gpios = <0x1a 0x14>;
phandle = <0x127>;
};
timer@0xf1e90000 {
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x2e 0x2e 0x2e>;
reg = <0x00 0xf1e90000 0x00 0x10000 0x00>;
width = <0x20>;
reset-gpios = <0x1a 0x15>;
phandle = <0x128>;
};
adma0mattr {
compatible = "qemu:memory-transaction-attr";
requester-id = <0x210>;
phandle = <0x21>;
};
dma-controller@0xebd00000 {
compatible = "xlnx,zdma";
reg = <0x00 0xebd00000 0x00 0x10000 0x00>;
bus-width = <0x80>;
has-parity = <0x01>;
interrupts = <0x48>;
#stream-id-cells = <0x01>;
dma = <0x17>;
memattr = <0x21>;
reset-gpios = <0x1a 0x00>;
#gpio-cells = <0x01>;
gpio-names = "memattr-secure";
gpios = <0x22 0x00>;
phandle = <0x129>;
};
adma1mattr {
compatible = "qemu:memory-transaction-attr";
requester-id = <0x212>;
phandle = <0x23>;
};
dma-controller@0xebd10000 {
compatible = "xlnx,zdma";
reg = <0x00 0xebd10000 0x00 0x10000 0x00>;
bus-width = <0x80>;
has-parity = <0x01>;
interrupts = <0x49>;
#stream-id-cells = <0x01>;
dma = <0x17>;
memattr = <0x23>;
reset-gpios = <0x1a 0x00>;
#gpio-cells = <0x01>;
gpio-names = "memattr-secure";
gpios = <0x22 0x01>;
phandle = <0x12a>;
};
adma2mattr {
compatible = "qemu:memory-transaction-attr";
requester-id = <0x214>;
phandle = <0x24>;
};
dma-controller@0xebd20000 {
compatible = "xlnx,zdma";
reg = <0x00 0xebd20000 0x00 0x10000 0x00>;
bus-width = <0x80>;
has-parity = <0x01>;
interrupts = <0x4a>;
#stream-id-cells = <0x01>;
dma = <0x17>;
memattr = <0x24>;
reset-gpios = <0x1a 0x00>;
#gpio-cells = <0x01>;
gpio-names = "memattr-secure";
gpios = <0x22 0x02>;
phandle = <0x12b>;
};
adma3mattr {
compatible = "qemu:memory-transaction-attr";
requester-id = <0x216>;
phandle = <0x25>;
};
dma-controller@0xebd30000 {
compatible = "xlnx,zdma";
reg = <0x00 0xebd30000 0x00 0x10000 0x00>;
bus-width = <0x80>;
has-parity = <0x01>;
interrupts = <0x4b>;
#stream-id-cells = <0x01>;
dma = <0x17>;
memattr = <0x25>;
reset-gpios = <0x1a 0x00>;
#gpio-cells = <0x01>;
gpio-names = "memattr-secure";
gpios = <0x22 0x03>;
phandle = <0x12c>;
};
adma4mattr {
compatible = "qemu:memory-transaction-attr";
requester-id = <0x218>;
phandle = <0x26>;
};
dma-controller@0xebd40000 {
compatible = "xlnx,zdma";
reg = <0x00 0xebd40000 0x00 0x10000 0x00>;
bus-width = <0x80>;
has-parity = <0x01>;
interrupts = <0x4c>;
#stream-id-cells = <0x01>;
dma = <0x17>;
memattr = <0x26>;
reset-gpios = <0x1a 0x00>;
#gpio-cells = <0x01>;
gpio-names = "memattr-secure";
gpios = <0x22 0x04>;
phandle = <0x12d>;
};
adma5mattr {
compatible = "qemu:memory-transaction-attr";
requester-id = <0x21a>;
phandle = <0x27>;
};
dma-controller@0xebd50000 {
compatible = "xlnx,zdma";
reg = <0x00 0xebd50000 0x00 0x10000 0x00>;
bus-width = <0x80>;
has-parity = <0x01>;
interrupts = <0x4d>;
#stream-id-cells = <0x01>;
dma = <0x17>;
memattr = <0x27>;
reset-gpios = <0x1a 0x00>;
#gpio-cells = <0x01>;
gpio-names = "memattr-secure";
gpios = <0x22 0x05>;
phandle = <0x12e>;
};
adma6mattr {
compatible = "qemu:memory-transaction-attr";
requester-id = <0x21c>;
phandle = <0x28>;
};
dma-controller@0xebd60000 {
compatible = "xlnx,zdma";
reg = <0x00 0xebd60000 0x00 0x10000 0x00>;
bus-width = <0x80>;
has-parity = <0x01>;
interrupts = <0x4e>;
#stream-id-cells = <0x01>;
dma = <0x17>;
memattr = <0x28>;
reset-gpios = <0x1a 0x00>;
#gpio-cells = <0x01>;
gpio-names = "memattr-secure";
gpios = <0x22 0x06>;
phandle = <0x12f>;
};
adma7mattr {
compatible = "qemu:memory-transaction-attr";
requester-id = <0x21e>;
phandle = <0x29>;
};
dma-controller@0xebd70000 {
compatible = "xlnx,zdma";
reg = <0x00 0xebd70000 0x00 0x10000 0x00>;
bus-width = <0x80>;
has-parity = <0x01>;
interrupts = <0x4f>;
#stream-id-cells = <0x01>;
dma = <0x17>;
memattr = <0x29>;
reset-gpios = <0x1a 0x00>;
#gpio-cells = <0x01>;
gpio-names = "memattr-secure";
gpios = <0x22 0x07>;
phandle = <0x130>;
};
afi_fm@0xeb9b0000 {
compatible = "xlnx,versal-afi-fm";
reg = <0x00 0xeb9b0000 0x00 0x10000 0x00>;
};
lpd_i2c_wrapper {
ps_i2c@0xf1940000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "xlnx,ps7-i2c-1.00.a\0cdns,i2c-r1p10";
interrupts = <0x15>;
reg-extended = <0x0a 0x00 0xf1940000 0x00 0x10000 0x00>;
reset-gpios = <0x1a 0x0b>;
phandle = <0x131>;
};
ps_i2c@0xf1950000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "xlnx,ps7-i2c-1.00.a\0cdns,i2c-r1p10";
interrupts = <0x16>;
reg-extended = <0x0a 0x00 0xf1950000 0x00 0x10000 0x00>;
reset-gpios = <0x1a 0x0c>;
phandle = <0x132>;
};
ps_i2c@0xf1960000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "xlnx,ps7-i2c-1.00.a\0cdns,i2c-r1p10";
interrupts = <0x0b>;
reg-extended = <0x0a 0x00 0xf1960000 0x00 0x10000 0x00>;
reset-gpios = <0x1a 0x30>;
phandle = <0x133>;
};
ps_i2c@0xf1970000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "xlnx,ps7-i2c-1.00.a\0cdns,i2c-r1p10";
interrupts = <0x0c>;
reg-extended = <0x0a 0x00 0xf1970000 0x00 0x10000 0x00>;
reset-gpios = <0x1a 0x31>;
phandle = <0x134>;
};
ps_i2c@0xf1980000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "xlnx,ps7-i2c-1.00.a\0cdns,i2c-r1p10";
interrupts = <0x0d>;
reg-extended = <0x0a 0x00 0xf1980000 0x00 0x10000 0x00>;
reset-gpios = <0x1a 0x32>;
phandle = <0x135>;
};
ps_i2c@0xf1990000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "xlnx,ps7-i2c-1.00.a\0cdns,i2c-r1p10";
interrupts = <0x64>;
reg-extended = <0x0a 0x00 0xf1990000 0x00 0x10000 0x00>;
reset-gpios = <0x1a 0x33>;
phandle = <0x136>;
};
ps_i2c@0xf19a0000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "xlnx,ps7-i2c-1.00.a\0cdns,i2c-r1p10";
interrupts = <0x65>;
reg-extended = <0x0a 0x00 0xf19a0000 0x00 0x10000 0x00>;
reset-gpios = <0x1a 0x34>;
phandle = <0x137>;
};
ps_i2c@0xf19b0000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
compatible = "xlnx,ps7-i2c-1.00.a\0cdns,i2c-r1p10";
interrupts = <0x66>;
reg-extended = <0x0a 0x00 0xf19b0000 0x00 0x10000 0x00>;
reset-gpios = <0x1a 0x35>;
phandle = <0x138>;
};
};
ocm_ctrl@OCM {
compatible = "xlnx,zynqmp-ocmc";
interrupts = <0x10>;
memsize = <0x80000>;
reg = <0x00 0xeb5d0000 0x00 0x10000 0x00>;
reset-gpios = <0x1a 0x18>;
phandle = <0x139>;
};
lpd_slcr@0xeb410000 {
compatible = "xlnx.psxc-lpx-slcr";
reg = <0x00 0xeb410000 0x00 0x100000 0x00>;
interrupt-parent = <0x08>;
interrupts = <0x1e>;
#gpio-cells = <0x01>;
gpio-controller;
num-rpu = <0x0a>;
core-0 = <0x2a>;
core-1 = <0x2b>;
core-2 = <0x2c>;
core-3 = <0x2d>;
core-4 = <0x2e>;
core-5 = <0x2f>;
core-6 = <0x30>;
core-7 = <0x31>;
core-8 = <0x32>;
core-9 = <0x33>;
phandle = <0x1b>;
};
lpd_slcr_secure@0xeb510000 {
compatible = "xlnx.versal2-psxc-lpx-slcr-secure";
reg = <0x00 0xeb510000 0x00 0x40000 0x00>;
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0x22>;
};
lpd_iou_slcr_secure@0xf1a40000 {
compatible = "xlnx,versal-lpd-iou-slcr-secure";
reg = <0x00 0xf1a40000 0x00 0x10000 0x00>;
memattr-gem0 = <0x18>;
memattr-write-gem0 = <0x19>;
memattr-gem1 = <0x1d>;
memattr-write-gem1 = <0x1e>;
phandle = <0x13a>;
};
wwdt@0xeb000000 {
compatible = "xlnx,versal-wwdt";
reg = <0x00 0xeb000000 0x00 0x10000 0x00>;
interrupts = <0xec 0xed 0xee 0xef>;
pclk = <0x5f5e100>;
reset-gpios = <0x1a 0x17>;
phandle = <0x13b>;
};
lpd_gpio@0xf1a50000 {
#gpio-cells = <0x01>;
compatible = "xlnx,zynqmp-gpio";
gpio-controller;
interrupts = <0x14>;
reg = <0x00 0xf1a50000 0x00 0x10000 0x00>;
reset-gpios = <0x1a 0x11>;
phandle = <0x13c>;
};
virtio_mmio_0 {
compatible = "virtio-mmio";
reg = <0x00 0xf5e00000 0x00 0x1000 0x00>;
interrupts = <0x10e>;
};
virtio_mmio_1 {
compatible = "virtio-mmio";
reg = <0x00 0xf5e01000 0x00 0x1000 0x00>;
interrupts = <0x10f>;
};
virtio_mmio_2 {
compatible = "virtio-mmio";
reg = <0x00 0xf5e02000 0x00 0x1000 0x00>;
interrupts = <0x110>;
};
virtio_mmio_3 {
compatible = "virtio-mmio";
reg = <0x00 0xf5e03000 0x00 0x1000 0x00>;
interrupts = <0x111>;
};
virtio_mmio_4 {
compatible = "virtio-mmio";
reg = <0x00 0xf5e04000 0x00 0x1000 0x00>;
interrupts = <0x112>;
};
virtio_mmio_5 {
compatible = "virtio-mmio";
reg = <0x00 0xf5e05000 0x00 0x1000 0x00>;
interrupts = <0x113>;
};
virtio_mmio_6 {
compatible = "virtio-mmio";
reg = <0x00 0xf5e06000 0x00 0x1000 0x00>;
interrupts = <0x114>;
};
virtio_mmio_7 {
compatible = "virtio-mmio";
reg = <0x00 0xf5e07000 0x00 0x1000 0x00>;
interrupts = <0x115>;
};
rpu_ctrl@0 {
#gpio-cells = <0x01>;
gpio-controller;
phandle = <0x13d>;
};
rpu_cluster@0xeb580000 {
compatible = "xlnx,psx_rpu_cluster_2.0";
reg = <0x00 0xeb580000 0x00 0x8000 0x00>;
#gpio-cells = <0x01>;
gpio-controller;
tcm-mr = <0x34>;
phandle = <0x36>;
};
rpu_ctrl_a0@0xeb588000 {
compatible = "xlnx,psxc-rpu-cluster-core";
version = <0x01>;
reg = <0x00 0xeb588000 0x00 0x4000 0x00>;
#gpio-cells = <0x01>;
gpio-controller;
gpios = <0x1a 0x23>;
core = <0x2a>;
tcm-mr = <0x35>;
phandle = <0xe5>;
};
rpu_ctrl_a1@0xeb58c000 {
compatible = "xlnx,psxc-rpu-cluster-core";
version = <0x01>;
reg = <0x00 0xeb58c000 0x00 0x4000 0x00>;
#gpio-cells = <0x01>;
gpio-controller;
gpios = <0x1a 0x24 0x36 0x00>;
core = <0x2b>;
tcm-mr = <0x37>;
phandle = <0xe8>;
};
rpu_cluster@0xeb590000 {
compatible = "xlnx,psx_rpu_cluster_2.0";
reg = <0x00 0xeb590000 0x00 0x8000 0x00>;
#gpio-cells = <0x01>;
gpio-controller;
tcm-mr = <0x38>;
phandle = <0x3a>;
};
rpu_ctrl_b0@0xeb598000 {
compatible = "xlnx,psxc-rpu-cluster-core";
version = <0x01>;
reg = <0x00 0xeb598000 0x00 0x4000 0x00>;
#gpio-cells = <0x01>;
gpio-controller;
gpios = <0x1a 0x25>;
core = <0x2c>;
tcm-mr = <0x39>;
phandle = <0xeb>;
};
rpu_ctrl_b1@0xeb59c000 {
compatible = "xlnx,psxc-rpu-cluster-core";
version = <0x01>;
reg = <0x00 0xeb59c000 0x00 0x4000 0x00>;
#gpio-cells = <0x01>;
gpio-controller;
gpios = <0x1a 0x26 0x3a 0x00>;
core = <0x2d>;
tcm-mr = <0x3b>;
phandle = <0xee>;
};
rpu_cluster@0xeb5a0000 {
compatible = "xlnx,psx_rpu_cluster_2.0";
reg = <0x00 0xeb5a0000 0x00 0x8000 0x00>;
#gpio-cells = <0x01>;
gpio-controller;
tcm-mr = <0x3c>;
phandle = <0x3e>;
};
rpu_ctrl_c0@0xeb5a8000 {
compatible = "xlnx,psxc-rpu-cluster-core";
version = <0x01>;
reg = <0x00 0xeb5a8000 0x00 0x4000 0x00>;
#gpio-cells = <0x01>;
gpio-controller;
gpios = <0x1a 0x27>;
core = <0x2e>;
tcm-mr = <0x3d>;
phandle = <0xf1>;
};
rpu_ctrl_c1@0xeb5ac000 {
compatible = "xlnx,psxc-rpu-cluster-core";
version = <0x01>;
reg = <0x00 0xeb5ac000 0x00 0x4000 0x00>;
#gpio-cells = <0x01>;
gpio-controller;
gpios = <0x1a 0x28 0x3e 0x00>;
core = <0x2f>;
tcm-mr = <0x3f>;
phandle = <0xf4>;
};
rpu_cluster@0xeb5b0000 {
compatible = "xlnx,psx_rpu_cluster_2.0";
reg = <0x00 0xeb5b0000 0x00 0x8000 0x00>;
#gpio-cells = <0x01>;
gpio-controller;
tcm-mr = <0x40>;
phandle = <0x42>;
};
rpu_ctrl_d0@0xeb5b8000 {
compatible = "xlnx,psxc-rpu-cluster-core";
version = <0x01>;
reg = <0x00 0xeb5b8000 0x00 0x4000 0x00>;
#gpio-cells = <0x01>;
gpio-controller;
gpios = <0x1a 0x29>;
core = <0x30>;
tcm-mr = <0x41>;
phandle = <0xf7>;
};
rpu_ctrl_d1@0xeb5bc000 {
compatible = "xlnx,psxc-rpu-cluster-core";
version = <0x01>;
reg = <0x00 0xeb5bc000 0x00 0x4000 0x00>;
#gpio-cells = <0x01>;
gpio-controller;
gpios = <0x1a 0x2a 0x42 0x00>;
core = <0x31>;
tcm-mr = <0x43>;
phandle = <0xfa>;
};
rpu_cluster@0xeb5c0000 {
compatible = "xlnx,psx_rpu_cluster_2.0";
reg = <0x00 0xeb5c0000 0x00 0x8000 0x00>;
#gpio-cells = <0x01>;
gpio-controller;
tcm-mr = <0x44>;
phandle = <0x46>;
};
rpu_ctrl_e0@0xeb5c8000 {
compatible = "xlnx,psxc-rpu-cluster-core";
version = <0x01>;
reg = <0x00 0xeb5c8000 0x00 0x4000 0x00>;
#gpio-cells = <0x01>;
gpio-controller;
gpios = <0x1a 0x2b>;
core = <0x32>;
tcm-mr = <0x45>;
phandle = <0xfd>;
};
rpu_ctrl_e1@0xeb5cc000 {
compatible = "xlnx,psxc-rpu-cluster-core";
version = <0x01>;
reg = <0x00 0xeb5cc000 0x00 0x4000 0x00>;
#gpio-cells = <0x01>;
gpio-controller;
gpios = <0x1a 0x2c 0x46 0x00>;
core = <0x33>;
tcm-mr = <0x47>;
phandle = <0x100>;
};
usb2@USB2_0_XHCI1 {
compatible = "usb_dwc3";
reg = <0x00 0xf1c0c100 0x00 0x600 0x00 0x00 0xf1c00000 0x00
0x100000 0x00>;
interrupts = <0x22 0x23 0x24 0x25>;
dma = <0x17>;
memattr = <0x48>;
reset-gpios = <0x1a 0x04>;
intrs = <0x04>;
slots = <0x02>;
phandle = <0x13e>;
};
i3c0@0xf1940000 {
compatible = "dwc.i3c";
reg = <0x00 0xf1948000 0x00 0x10000 0x00>;
num-devices = <0x0b>;
interrupts = <0x15>;
phandle = <0x13f>;
};
i3c1@0xf1950000 {
compatible = "dwc.i3c";
reg = <0x00 0xf1958000 0x00 0x10000 0x00>;
slave-static-addr-en = <0x01>;
device-id = <0x01>;
interrupts = <0x16>;
phandle = <0x140>;
};
ocm_ctrl@0xeb960000 {
compatible = "xlnx,zynqmp-ocmc";
interrupts = <0x11>;
memsize = <0x80000>;
reg = <0x00 0xeb960000 0x00 0x10000 0x00>;
reset-gpios = <0x1a 0xf1>;
phandle = <0x141>;
};
ocm_ctrl@0xeb9d0000 {
compatible = "xlnx,zynqmp-ocmc";
interrupts = <0x0e>;
memsize = <0x80000>;
reg = <0x00 0xeb9d0000 0x00 0x10000 0x00>;
reset-gpios = <0x1a 0xf2>;
phandle = <0x142>;
};
ocm_ctrl@0xeaa00000 {
compatible = "xlnx,zynqmp-ocmc";
interrupts = <0x0f>;
memsize = <0x80000>;
reg = <0x00 0xeaa00000 0x00 0x10000 0x00>;
reset-gpios = <0x1a 0xf3>;
phandle = <0x143>;
};
can@0xf1a00000 {
compatible = "xlnx,versal-canfd";
rx-fifo0 = <0x40>;
rx-fifo1 = <0x40>;
enable-rx-fifo1 = <0x01>;
canfdbus = <0x1f>;
interrupts = <0x5f>;
reg = <0x00 0xf1a00000 0x00 0x10000 0x00>;
reset-gpios = <0x1a 0x2e>;
phandle = <0x144>;
};
can@0xf1a10000 {
compatible = "xlnx,versal-canfd";
rx-fifo0 = <0x40>;
rx-fifo1 = <0x40>;
enable-rx-fifo1 = <0x01>;
canfdbus = <0x1f>;
interrupts = <0x60>;
reg = <0x00 0xf1a10000 0x00 0x10000 0x00>;
reset-gpios = <0x1a 0x2f>;
phandle = <0x145>;
};
timer@0xf1ea0000 {
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x2f 0x2f 0x2f>;
reg = <0x00 0xf1ea0000 0x00 0x10000 0x00>;
width = <0x20>;
reset-gpios = <0x1a 0x36>;
phandle = <0x146>;
};
timer@0xf1eb0000 {
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x30 0x30 0x30>;
reg = <0x00 0xf1eb0000 0x00 0x10000 0x00>;
width = <0x20>;
reset-gpios = <0x1a 0x37>;
phandle = <0x147>;
};
timer@0xf1ec0000 {
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x31 0x31 0x31>;
reg = <0x00 0xf1ec0000 0x00 0x10000 0x00>;
width = <0x20>;
reset-gpios = <0x1a 0x38>;
phandle = <0x148>;
};
timer@0xf1ed0000 {
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x32 0x32 0x32>;
reg = <0x00 0xf1ed0000 0x00 0x10000 0x00>;
width = <0x20>;
reset-gpios = <0x1a 0x39>;
phandle = <0x149>;
};
sdma0mattr {
compatible = "qemu:memory-transaction-attr";
requester-id = <0x220>;
phandle = <0x49>;
};
dma-controller@0xebd80000 {
compatible = "xlnx,zdma";
reg = <0x00 0xebd80000 0x00 0x10000 0x00>;
bus-width = <0x80>;
has-parity = <0x01>;
interrupts = <0x70>;
#stream-id-cells = <0x01>;
dma = <0x17>;
memattr = <0x49>;
reset-gpios = <0x1a 0x00>;
#gpio-cells = <0x01>;
gpio-names = "memattr-secure";
gpios = <0x22 0x08>;
phandle = <0x14a>;
};
sdma1mattr {
compatible = "qemu:memory-transaction-attr";
requester-id = <0x222>;
phandle = <0x4a>;
};
dma-controller@0xebd90000 {
compatible = "xlnx,zdma";
reg = <0x00 0xebd90000 0x00 0x10000 0x00>;
bus-width = <0x80>;
has-parity = <0x01>;
interrupts = <0x71>;
#stream-id-cells = <0x01>;
dma = <0x17>;
memattr = <0x4a>;
reset-gpios = <0x1a 0x00>;
#gpio-cells = <0x01>;
gpio-names = "memattr-secure";
gpios = <0x22 0x09>;
phandle = <0x14b>;
};
sdma2mattr {
compatible = "qemu:memory-transaction-attr";
requester-id = <0x224>;
phandle = <0x4b>;
};
dma-controller@0xebda0000 {
compatible = "xlnx,zdma";
reg = <0x00 0xebda0000 0x00 0x10000 0x00>;
bus-width = <0x80>;
has-parity = <0x01>;
interrupts = <0x72>;
#stream-id-cells = <0x01>;
dma = <0x17>;
memattr = <0x4b>;
reset-gpios = <0x1a 0x00>;
#gpio-cells = <0x01>;
gpio-names = "memattr-secure";
gpios = <0x22 0x0a>;
phandle = <0x14c>;
};
sdma3mattr {
compatible = "qemu:memory-transaction-attr";
requester-id = <0x226>;
phandle = <0x4c>;
};
dma-controller@0xebdb0000 {
compatible = "xlnx,zdma";
reg = <0x00 0xebdb0000 0x00 0x10000 0x00>;
bus-width = <0x80>;
has-parity = <0x01>;
interrupts = <0x73>;
#stream-id-cells = <0x01>;
dma = <0x17>;
memattr = <0x4c>;
reset-gpios = <0x1a 0x00>;
#gpio-cells = <0x01>;
gpio-names = "memattr-secure";
gpios = <0x22 0x0b>;
phandle = <0x14d>;
};
sdma4mattr {
compatible = "qemu:memory-transaction-attr";
requester-id = <0x228>;
phandle = <0x4d>;
};
dma-controller@0xebdc0000 {
compatible = "xlnx,zdma";
reg = <0x00 0xebdc0000 0x00 0x10000 0x00>;
bus-width = <0x80>;
has-parity = <0x01>;
interrupts = <0x74>;
#stream-id-cells = <0x01>;
dma = <0x17>;
memattr = <0x4d>;
reset-gpios = <0x1a 0x00>;
#gpio-cells = <0x01>;
gpio-names = "memattr-secure";
gpios = <0x22 0x0c>;
phandle = <0x14e>;
};
sdma5mattr {
compatible = "qemu:memory-transaction-attr";
requester-id = <0x22a>;
phandle = <0x4e>;
};
dma-controller@0xebdd0000 {
compatible = "xlnx,zdma";
reg = <0x00 0xebdd0000 0x00 0x10000 0x00>;
bus-width = <0x80>;
has-parity = <0x01>;
interrupts = <0x75>;
#stream-id-cells = <0x01>;
dma = <0x17>;
memattr = <0x4e>;
reset-gpios = <0x1a 0x00>;
#gpio-cells = <0x01>;
gpio-names = "memattr-secure";
gpios = <0x22 0x0d>;
phandle = <0x14f>;
};
sdma6mattr {
compatible = "qemu:memory-transaction-attr";
requester-id = <0x22c>;
phandle = <0x4f>;
};
dma-controller@0xebde0000 {
compatible = "xlnx,zdma";
reg = <0x00 0xebde0000 0x00 0x10000 0x00>;
bus-width = <0x80>;
has-parity = <0x01>;
interrupts = <0x76>;
#stream-id-cells = <0x01>;
dma = <0x17>;
memattr = <0x4f>;
reset-gpios = <0x1a 0x00>;
#gpio-cells = <0x01>;
gpio-names = "memattr-secure";
gpios = <0x22 0x0e>;
phandle = <0x150>;
};
sdma7mattr {
compatible = "qemu:memory-transaction-attr";
requester-id = <0x22e>;
phandle = <0x50>;
};
dma-controller@0xebdf0000 {
compatible = "xlnx,zdma";
reg = <0x00 0xebdf0000 0x00 0x10000 0x00>;
bus-width = <0x80>;
has-parity = <0x01>;
interrupts = <0x77>;
#stream-id-cells = <0x01>;
dma = <0x17>;
memattr = <0x50>;
reset-gpios = <0x1a 0x00>;
#gpio-cells = <0x01>;
gpio-names = "memattr-secure";
gpios = <0x22 0x0f>;
phandle = <0x151>;
};
wwdt@0xeb010000 {
compatible = "xlnx,versal-wwdt";
reg = <0x00 0xeb010000 0x00 0x10000 0x00>;
interrupts = <0xf0 0xf1 0xf2 0xf3>;
pclk = <0x5f5e100>;
reset-gpios = <0x1a 0x3a>;
phandle = <0x152>;
};
lpd_afi_fs@0xeb560000 {
compatible = "xlnx.psxc_afi_fs";
reg = <0x00 0xeb560000 0x00 0x8000 0x00>;
phandle = <0x153>;
};
downstream_amba_asu {
compatible = "qemu:memory-region";
alias = <0x51>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0xffffffff>;
};
};
amba_fpd@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x0b>;
afi_fm@0xec880000 {
compatible = "xlnx,versal-afi-fm";
reg = <0x00 0xec880000 0x00 0x10000 0x00>;
};
afi_fm@0xec8a0000 {
compatible = "xlnx,versal-afi-fm";
reg = <0x00 0xec8a0000 0x00 0x10000 0x00>;
};
cpm_crcpm@0xfca00000 {
compatible = "xlnx,versal_cpm_crcpm";
reg = <0x00 0xfca00000 0x00 0x10000 0x00>;
};
cpm_pcsr@0xfcff0000 {
compatible = "xlnx,versal_cpm_pcsr";
reg = <0x00 0xfcff0000 0x00 0x10000 0x00>;
};
cpm_slcr_secure@0xfca20000 {
compatible = "xlnx.cpm_slcr_secure";
reg = <0x00 0xfca20000 0x00 0x10000 0x00>;
};
fpd_slcr@0xec8c0000 {
compatible = "xlnx,versal-fpd-slcr";
interrupts = <0x8c>;
reg = <0x00 0xec8c0000 0x00 0x10000 0x00>;
};
fpd_slcr_secure@0xec8c0000 {
compatible = "xlnx,versal-fpd-slcr-secure";
interrupts = <0x8c>;
reg = <0x00 0xec8e0000 0x00 0x10000 0x00>;
};
watchdog@0xecc10000 {
compatible = "xlnx,versal-wwdt";
reg = <0x00 0xecc10000 0x00 0x10000 0x00>;
interrupts = <0xec 0xed 0xee 0xef>;
pclk = <0x5f5e100>;
reset-gpios = <0x52 0x1b>;
phandle = <0x154>;
};
apu_cluster@0xecc00000 {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,versal-apu-ctrl";
reg = <0x00 0xecc00000 0x00 0x10000 0x00>;
cpu0 = <0x53>;
cpu1 = <0x54>;
cpu2 = <0x55>;
cpu3 = <0x55>;
cores-per-cluster = <0x02>;
phandle = <0x155>;
};
apu_cluster@0xecd00000 {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,versal-apu-ctrl";
reg = <0x00 0xecd00000 0x00 0x10000 0x00>;
cpu0 = <0x56>;
cpu1 = <0x57>;
cpu2 = <0x55>;
cpu3 = <0x55>;
cores-per-cluster = <0x02>;
phandle = <0x156>;
};
apu_cluster@0xece00000 {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,versal-apu-ctrl";
reg = <0x00 0xece00000 0x00 0x10000 0x00>;
cpu0 = <0x58>;
cpu1 = <0x59>;
cpu2 = <0x55>;
cpu3 = <0x55>;
cores-per-cluster = <0x02>;
phandle = <0x157>;
};
apu_cluster@0xecf00000 {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,versal-apu-ctrl";
reg = <0x00 0xecf00000 0x00 0x10000 0x00>;
cpu0 = <0x5a>;
cpu1 = <0x5b>;
cpu2 = <0x55>;
cpu3 = <0x55>;
cores-per-cluster = <0x02>;
phandle = <0x158>;
};
cmn600ae@0xa0000000 {
compatible = "arm,cmn600ae";
reg = <0x00 0xa0000000 0x00 0x3000000 0x00>;
};
smmuv3@MM_FPD_SMMU {
compatible = "arm-smmuv3";
reg-extended = <0x0b 0x00 0xec000000 0x00 0x200000 0x00 0x17 0x00
0x00 0xffffffff 0xffffffff 0x00 0x5c 0x00 0x00 0xffffffff 0xffffffff 0x00 0x5d 0x00 0x00
0xffffffff 0xffffffff 0x00 0x5e 0x00 0x00 0xffffffff 0xffffffff 0x00 0x5f 0x00 0x00
0xffffffff 0xffffffff 0x00 0x60 0x00 0x00 0xffffffff 0xffffffff 0x00 0x61 0x00 0x00
0xffffffff 0xffffffff 0x00 0x62 0x00 0x00 0xffffffff 0xffffffff 0x00 0x63 0x00 0x00
0xffffffff 0xffffffff 0x00 0x64 0x00 0x00 0xffffffff 0xffffffff 0x00 0x65 0x00 0x00
0xffffffff 0xffffffff 0x00 0x66 0x00 0x00 0xffffffff 0xffffffff 0x00 0x67 0x00 0x00
0xffffffff 0xffffffff 0x00>;
mr-0 = <0x0d>;
mr-1 = <0x0d>;
mr-2 = <0x0d>;
mr-3 = <0x0d>;
mr-4 = <0x0d>;
mr-5 = <0x0d>;
mr-6 = <0x0d>;
mr-7 = <0x0d>;
mr-8 = <0x0d>;
mr-9 = <0x0d>;
mr-10 = <0x0d>;
mr-11 = <0x0d>;
mr-12 = <0x0d>;
dma_mr = <0x0d>;
primary-bus = <0x68>;
phandle = <0x159>;
};
dummy_pcie@0x6_0000_0000 {
compatible = "PCI";
phandle = <0x68>;
};
apu_pcil@0xecb10000 {
compatible = "xlnx.apu_pcil";
reg = <0x00 0xecb10000 0x00 0x10000 0x00>;
core-mask = <0x3333>;
cluster-mask = <0x0f>;
gpios = <0x1b 0x52 0x1b 0x53 0x1b 0x54 0x1b 0x55 0x1b 0x56 0x1b 0x57
0x1b 0x58 0x1b 0x59 0x1b 0x5a 0x1b 0x5b 0x1b 0x5c 0x1b 0x5d 0x1b 0x5e 0x1b 0x5f 0x1b 0x60 0x1b 0x61
0x1b 0x62 0x1b 0x63 0x1b 0x64 0x1b 0x65 0x1b 0x66 0x1b 0x67 0x1b 0x68 0x1b 0x69>;
core-0 = <0x53>;
core-1 = <0x54>;
core-4 = <0x56>;
core-5 = <0x57>;
core-8 = <0x58>;
core-9 = <0x59>;
core-12 = <0x5a>;
core-13 = <0x5b>;
phandle = <0x15a>;
};
lpd_afi_fs@0xec860000 {
compatible = "xlnx.psxc_afi_fs";
reg = <0x00 0xec860000 0x00 0x8000 0x00>;
phandle = <0x15b>;
};
mmi_gem_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x25e>;
phandle = <0x69>;
};
mmi_usb_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x20e>;
phandle = <0x6b>;
};
amba_mmi@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x6d>;
mdio_10gbe@0 {
#address-cells = <0x01>;
#size-cells = <0x00>;
#priority-cells = <0x00>;
compatible = "mdio";
phandle = <0x6a>;
phy@1 {
compatible = "phy-clause45-generic";
device_type = "ethernet-phy";
reg = <0x01>;
phandle = <0x15c>;
};
};
ethernet@0xed920000 {
#address-cells = <0x01>;
#size-cells = <0x00>;
#priority-cells = <0x00>;
compatible = "cdns,gem";
reg = <0x00 0xed920000 0x00 0x10000 0x00>;
interrupts = <0xa4 0xa4 0xa4 0xa4>;
dma = <0x5d>;
memattr = <0x69>;
num-priority-queues = <0x04>;
mdio = <0x6a>;
has-usxgmii = <0x01>;
phandle = <0x15d>;
};
usb_drd@0xedec0000 {
compatible = "usb_dwc3";
reg = <0x00 0xedec0000 0x00 0x10000 0x00>;
interrupts = <0xbf 0xc0>;
dma = <0x5d>;
memattr = <0x6b>;
intrs = <0x02>;
slots = <0x02>;
phandle = <0x15e>;
};
mmi_crs@0xedc00000 {
compatible = "xlnx.mmi_crx";
reg = <0x00 0xedc00000 0x00 0x10000 0x00>;
phandle = <0x15f>;
};
mmi_pcsr@0xeb2f0000 {
compatible = "xlnx,noc-npi-dev";
reg = <0x00 0xeb2f0000 0x00 0x10000 0x01>;
map-size = <0x10000>;
custom = <0x01>;
pcsr-status = <0x7ffe>;
phandle = <0x160>;
};
mmi_gtyp@0xed900000 {
compatible = "xlnx,noc-npi-dev";
reg = <0x00 0xed900000 0x00 0x20000 0x01>;
map-size = <0xed900000>;
custom = <0x01>;
pcsr-status = <0x3a00d0>;
phandle = <0x161>;
};
mmi_slcr_sec@0 {
compatible = "qemu:memory-region";
qemu,ram = <0x01>;
reg = <0x00 0xedc30000 0x00 0x10000 0x00>;
read-only;
phandle = <0x162>;
};
trng@0xede80000 {
doc-status = "complete";
compatible = "xlnx,versal-trng";
reg = <0x00 0xede80000 0x00 0x10000 0x00>;
interrupts = <0xc7>;
#gpio-cells = <0x01>;
phandle = <0x6c>;
};
udh_slcr@0xedea0000 {
compatible = "xlnx.mmi_udh_slcr";
reg = <0x00 0xedea0000 0x00 0x8000 0x00>;
gpios = <0x6c 0x00>;
phandle = <0x163>;
};
udh_pll@0xede90000 {
compatible = "xlnx.mmi_udh_pll";
reg = <0x00 0xede90000 0x00 0x10000 0x00>;
phandle = <0x164>;
};
mmi_gpu_a@0 {
compatible = "qemu:memory-region";
qemu,ram = <0x01>;
reg = <0x00 0xed0a0098 0x00 0x10 0x00>;
read-only;
phandle = <0x165>;
};
loader_write_cpu0_0x1@0xEDC30440 {
compatible = "loader";
addr = <0xedc30440>;
data = <0x01>;
data-len = <0x04>;
cpu-num = <0x00>;
attrs-debug = <0x01>;
attrs-secure = <0x00>;
attrs-requester-id = <0x00>;
phandle = <0x166>;
};
loader_write_cpu0_0x7F@0xEDC30444 {
compatible = "loader";
addr = <0xedc30444>;
data = <0x7f>;
data-len = <0x04>;
cpu-num = <0x00>;
attrs-debug = <0x01>;
attrs-secure = <0x00>;
attrs-requester-id = <0x00>;
phandle = <0x167>;
};
loader_write_cpu0_0x1@0xEDC3044c {
compatible = "loader";
addr = <0xedc3044c>;
data = <0x01>;
data-len = <0x04>;
cpu-num = <0x00>;
attrs-debug = <0x01>;
attrs-secure = <0x00>;
attrs-requester-id = <0x00>;
phandle = <0x168>;
};
loader_write_cpu0_0x1@0xEDC30450 {
compatible = "loader";
addr = <0xedc30450>;
data = <0x01>;
data-len = <0x04>;
cpu-num = <0x00>;
attrs-debug = <0x01>;
attrs-secure = <0x00>;
attrs-requester-id = <0x00>;
phandle = <0x169>;
};
loader_write_cpu0_0x1@0xEDC30460 {
compatible = "loader";
addr = <0xedc30460>;
data = <0x01>;
data-len = <0x04>;
cpu-num = <0x00>;
attrs-debug = <0x01>;
attrs-secure = <0x00>;
attrs-requester-id = <0x00>;
phandle = <0x16a>;
};
loader_write_cpu0_0x7f@0xEDC30464 {
compatible = "loader";
addr = <0xedc30464>;
data = <0x7f>;
data-len = <0x04>;
cpu-num = <0x00>;
attrs-debug = <0x01>;
attrs-secure = <0x00>;
attrs-requester-id = <0x00>;
phandle = <0x16b>;
};
loader_write_cpu0_0x1@0xEDC3046c {
compatible = "loader";
addr = <0xedc3046c>;
data = <0x01>;
data-len = <0x04>;
cpu-num = <0x00>;
attrs-debug = <0x01>;
attrs-secure = <0x00>;
attrs-requester-id = <0x00>;
phandle = <0x16c>;
};
loader_write_cpu0_0x1@0xEDC30470 {
compatible = "loader";
addr = <0xedc30470>;
data = <0x01>;
data-len = <0x04>;
cpu-num = <0x00>;
attrs-debug = <0x01>;
attrs-secure = <0x00>;
attrs-requester-id = <0x00>;
phandle = <0x16d>;
};
loader_write_cpu0_0x3@0xED0A0098 {
compatible = "loader";
addr = <0xed0a0098>;
data = <0x03>;
data-len = <0x04>;
cpu-num = <0x00>;
attrs-debug = <0x01>;
attrs-secure = <0x00>;
attrs-requester-id = <0x00>;
phandle = <0x16e>;
};
};
downstream_amba_mmi {
compatible = "qemu:memory-region";
alias = <0x6d>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0xffffffff>;
};
};
amba_pmc_internal@0 {
doc-ignore = <0x01>;
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x0c>;
downstream_amba_pmc_ppu {
compatible = "qemu:memory-region";
alias = <0x6e>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0xffffffff>;
};
downstream_amba_pmc_iou {
compatible = "qemu:memory-region";
alias = <0x16>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0xffffffff>;
};
downstream_amba_pmc_sec {
compatible = "qemu:memory-region";
alias = <0x6f>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0xffffffff>;
};
downstream_amba_pmc_sys {
compatible = "qemu:memory-region";
alias = <0x70>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0xffffffff>;
};
downstream_amba_pmc_pl {
compatible = "qemu:memory-region";
alias = <0x71>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0xffffffff>;
};
downstream_amba_pmc_bat {
compatible = "qemu:memory-region";
alias = <0x72>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0xffffffff>;
};
xmpu_pmc@0 {
compatible = "xlnx,versal-xmpu";
interrupts = <0x13>;
reg-extended = <0x0c 0x00 0xf12f0000 0x00 0x10000 0x00 0x0c 0x00
0xf2000000 0x00 0x20000 0x02>;
protected-mr = <0x73>;
mr-0 = <0x0c>;
protected-base = <0xf2000000>;
phandle = <0x16f>;
};
xppu_pmc_npi@0xf1300000 {
compatible = "xlnx,versal-xppu";
reg-extended = <0x0c 0x00 0xf1300000 0x00 0x10000 0x00 0x0c 0x00
0xf6000000 0x00 0x1000000 0x02 0x0c 0x00 0xf7000000 0x00 0x1000000 0x02>;
mr = <0x71>;
interrupts = <0x13>;
phandle = <0x170>;
};
xppu_pmc@0xf1310000 {
compatible = "xlnx,versal-xppu";
reg-extended = <0x0c 0x00 0xf1310000 0x00 0x10000 0x00 0x0d 0x00
0xf1000000 0x00 0x1000000 0x02 0x0d 0x00 0xf0000000 0x00 0x1000000 0x02 0x0d 0x00 0xc0000000 0x00
0x20000000 0x02>;
mr = <0x0c>;
interrupts = <0x13>;
phandle = <0x171>;
};
};
amba_pmc@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x74>;
downstream_amba {
compatible = "qemu:memory-region";
alias = <0x0d>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0xffffffff>;
};
downstream_amba_pmc_internal {
compatible = "qemu:memory-region";
alias = <0x0c>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0xffffffff>;
};
xmpu_pmc_cfu@0xf1340000 {
compatible = "xlnx,versal-xmpu";
reg-extended = <0x74 0x00 0xf1340000 0x00 0x10000 0x00 0x71 0x00
0xf12b0000 0x00 0x11000 0x02 0x71 0x00 0xf1f80000 0x00 0x40000 0x02>;
protected-mr = <0x75>;
mr-0 = <0x71>;
protected-base = <0xf12b0000>;
phandle = <0x172>;
};
pmx_err_mng@0xf1110000 {
compatible = "xlnx,pmxc-err-mng";
reg = <0x00 0xf1130000 0x00 0x10000 0x01>;
gpios = <0x76 0x03 0x1b 0x2e 0x1b 0x2f 0x1b 0x30 0x1b 0x31>;
interrupts = <0xbca>;
phandle = <0x173>;
};
intpmxc_config@0xf1400000 {
compatible = "xlnx.pmxc_intpmx_config";
reg = <0x00 0xf1400000 0x00 0x300000 0x00>;
phandle = <0x174>;
};
};
amba_pmc_iou@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
doc-name = "PMC IOU";
doc-status = "partial";
phandle = <0x16>;
pmc_iou_slcr@0xf1060000 {
doc-status = "partial";
compatible = "xlnx,versal-pmx-iou-slcr";
reg = <0x00 0xf1060000 0x00 0x1000 0x00>;
interrupts = <0xde>;
gpio-controller;
#gpio-cells = <0x02>;
phandle = <0x85>;
};
pmc_iou_slcr_secure@0xf1070000 {
compatible = "xlnx,versal-pmc-iou-slcr-secure";
reg = <0x00 0xf1070000 0x00 0x10000 0x00>;
interrupts = <0xbca>;
memattr-sd0 = <0x77>;
memattr-write-sd0 = <0x78>;
memattr-sd1 = <0x79>;
memattr-write-sd1 = <0x7a>;
memattr-write-qspi = <0x7b>;
memattr-write-ospi = <0x7c>;
phandle = <0x175>;
};
pmc_qspi_dma@QSPI_DMA {
doc-status = "complete";
compatible = "zynqmp,csu-dma";
interrupts = <0xd9>;
#stream-id-cells = <0x01>;
reg = <0x00 0xf1030800 0x00 0x800 0x00>;
dma = <0x74>;
memattr = <0x7d>;
memattr-write = <0x7b>;
is-dst = <0x01>;
reset-gpios = <0x7e 0x00>;
phandle = <0x7f>;
};
pmc_qspi@0xf1030000 {
doc-status = "complete";
#address-cells = <0x01>;
#size-cells = <0x00>;
#bus-cells = <0x01>;
compatible = "xlnx,usmp-gqspi\0cdns,spi-r1p6";
stream-connected-dma = <0x7f>;
dma = <0x74>;
interrupts = <0xd9>;
num-ss-bits = <0x02>;
reg-extended = <0x16 0x00 0xf1030000 0x00 0x1000 0x00 0x80 0x00 0x00
0x00 0x20000000 0x00>;
speed-hz = <0x989680>;
xlnx,fb-clk = <0x01>;
xlnx,qspi-clk-freq-hz = <0xbebc200>;
xlnx,qspi-mode = <0x02>;
reset-gpios = <0x7e 0x00>;
phandle = <0x176>;
qspi_flash_lcs_lb@0 {
#address-cells = <0x01>;
#size-cells = <0x01>;
#priority-cells = <0x00>;
#bus-cells = <0x01>;
compatible = "m25qu02gcbb\0st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x00 0x00>;
drive-index = <0x00>;
phandle = <0x177>;
qspi_flash_lcs_lb@0x00000000 {
label = "qspi_flash_lcs_lb";
reg = <0x00 0x2000000>;
};
};
qspi_flash_lcs_ub@0 {
#address-cells = <0x01>;
#size-cells = <0x01>;
#priority-cells = <0x00>;
#bus-cells = <0x01>;
compatible = "m25qu02gcbb\0st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x02 0x01>;
drive-index = <0x01>;
phandle = <0x178>;
qspi_flash_lcs_ub@0x00000000 {
label = "qspi_flash_lcs_ub";
reg = <0x00 0x2000000>;
};
};
qspi_flash_ucs_lb@0 {
#address-cells = <0x01>;
#size-cells = <0x01>;
#priority-cells = <0x00>;
#bus-cells = <0x01>;
compatible = "m25qu02gcbb\0st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x01 0x00>;
drive-index = <0x02>;
phandle = <0x179>;
qspi_flash_ucs_lb@0x00000000 {
label = "qspi_flash_ucs_lb";
reg = <0x00 0x2000000>;
};
};
qspi_flash_ucs_ub@0 {
#address-cells = <0x01>;
#size-cells = <0x01>;
#priority-cells = <0x00>;
#bus-cells = <0x01>;
compatible = "m25qu02gcbb\0st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x03 0x01>;
drive-index = <0x03>;
phandle = <0x17a>;
qspi_flash_ucs_ub@0x00000000 {
label = "qspi_flash_ucs_ub";
reg = <0x00 0x2000000>;
};
};
};
ospi_dst_dma@0 {
doc-status = "complete";
compatible = "zynqmp,csu-dma";
interrupts = <0xd8>;
reg = <0x00 0xf1011800 0x00 0x800 0x00>;
dma = <0x74>;
memattr = <0x81>;
memattr-write = <0x7c>;
is-dst = <0x01>;
reset-gpios = <0x7e 0x01>;
phandle = <0x83>;
};
ospi_src_dma@0 {
doc-status = "complete";
compatible = "zynqmp,csu-dma";
interrupts = <0xd8>;
reg = <0x00 0xf1011000 0x00 0x800 0x00>;
dma = <0x82>;
memattr = <0x81>;
memattr-write = <0x7c>;
stream-connected-dma = <0x83>;
reset-gpios = <0x7e 0x01>;
phandle = <0x84>;
};
spi@0xf1010000 {
doc-status = "complete";
#address-cells = <0x01>;
#size-cells = <0x00>;
#bus-cells = <0x01>;
compatible = "xlnx,versal-ospi";
reg-extended = <0x16 0x00 0xf1010000 0x00 0x1000 0x00 0x82 0x00 0x00
0x00 0x20000000 0x00>;
dma-src = <0x84>;
interrupts = <0xd8>;
reset-gpios = <0x7e 0x01>;
gpios = <0x85 0x03 0x00>;
phandle = <0x17b>;
ospi_flash_lcs_lb@0 {
#address-cells = <0x01>;
#size-cells = <0x01>;
#priority-cells = <0x00>;
#bus-cells = <0x01>;
compatible = "mt35xu02gbba";
spi-max-frequency = <0x2faf080>;
reg = <0x00 0x00>;
drive-index = <0x04>;
phandle = <0x17c>;
ospi_flash_lcs_lb@0x00000000 {
label = "ospi_flash_lcs_lb";
reg = <0x00 0x2000000>;
};
};
ospi_flash_lcs_ub@0 {
#address-cells = <0x01>;
#size-cells = <0x01>;
#priority-cells = <0x00>;
#bus-cells = <0x01>;
compatible = "mt35xu02gbba";
spi-max-frequency = <0x2faf080>;
reg = <0x01 0x00>;
drive-index = <0x05>;
phandle = <0x17d>;
ospi_flash_lcs_ub@0x00000000 {
label = "ospi_flash_lcs_ub";
reg = <0x00 0x2000000>;
};
};
ospi_flash_ucs_lb@0 {
#address-cells = <0x01>;
#size-cells = <0x01>;
#priority-cells = <0x00>;
#bus-cells = <0x01>;
compatible = "mt35xu01gbba\0st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x02 0x00>;
drive-index = <0x06>;
phandle = <0x17e>;
ospi_flash_ucs_lb@0x00000000 {
label = "ospi_flash_ucs_lb";
reg = <0x00 0x2000000>;
};
};
ospi_flash_ucs_ub@0 {
#address-cells = <0x01>;
#size-cells = <0x01>;
#priority-cells = <0x00>;
#bus-cells = <0x01>;
compatible = "mt35xu01gbba\0st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x03 0x00>;
drive-index = <0x07>;
phandle = <0x17f>;
ospi_flash_ucs_ub@0x00000000 {
label = "ospi_flash_ucs_ub";
reg = <0x00 0x2000000>;
};
};
};
gpio_mr_mux@0xc0000000 {
doc-status = "complete";
compatible = "gpio-mr-mux";
reg = <0x00 0xc0000000 0x00 0x20000000 0x00>;
gpios = <0x85 0x02 0x00 0x85 0x03 0x00>;
mr-size = <0x20000000>;
mr0 = <0x80>;
mr1 = <0x82>;
mr2 = <0x80>;
mr3 = <0x82>;
phandle = <0x180>;
};
pmc_gpio@0xf1020000 {
#gpio-cells = <0x01>;
compatible = "xlnx,zynqmp-gpio";
gpio-controller;
interrupts = <0xca>;
reg = <0x00 0xf1020000 0x00 0x10000 0x00>;
reset-gpios = <0x7e 0x05>;
phandle = <0x181>;
};
mmc@0xf1040000 {
doc-status = "complete";
compatible = "xilinx,zynqmp-sdhci\0generic-sdhci";
drive-index = <0x00>;
reg = <0x00 0xf1040000 0x00 0x10000 0x00>;
interrupts = <0xda>;
dma = <0x17>;
memattr = <0x77>;
memattr-write = <0x78>;
gpios = <0x85 0x00 0x00>;
gpio-names = "SLOTTYPE";
reset-gpios = <0x7e 0x08>;
is-mmc = <0x00>;
xlnx,has-cd = <0x01>;
xlnx,has-power = <0x00>;
xlnx,has-wp = <0x01>;
xlnx,sdio-clk-freq-hz = <0x2faf080>;
phandle = <0x182>;
};
mmc@0xf1050000 {
doc-status = "complete";
compatible = "xlnx,versalnet-emmc";
drive-index = <0x01>;
reg = <0x00 0xf1050200 0x00 0x100 0x00 0x00 0xf1050000 0x00
0x100 0x00>;
interrupts = <0xdc>;
dma = <0x17>;
memattr = <0x79>;
memattr-write = <0x7a>;
gpios = <0x85 0x01 0x00>;
gpio-names = "SLOTTYPE";
reset-gpios = <0x7e 0x03>;
is-mmc = <0x00>;
xlnx,has-cd = <0x01>;
xlnx,has-power = <0x00>;
xlnx,has-wp = <0x01>;
xlnx,sdio-clk-freq-hz = <0x2faf080>;
phandle = <0x183>;
};
pmc_tap@0xf11a0000 {
doc-status = "complete";
doc-comments = "Just a stub.";
compatible = "xlnx,pmc-tap";
interrupts-extended = <0x86 0x1e>;
interrupt-names = "sec-dbg-int";
reg = <0x00 0xf11a0000 0x00 0x80000 0x00>;
idcode = <0x14ca8093>;
platform-ver = <0x01>;
phandle = <0x184>;
};
pmc_i2c_wrapper {
pmc_i2c@0xf1000000 {
compatible = "xlnx,ps7-i2c-1.00.a\0cdns,i2c-r1p10";
interrupts = <0xcb>;
reg-extended = <0x16 0x00 0xf1000000 0x00 0x10000 0x00>;
#address-cells = <0x01>;
#size-cells = <0x00>;
reset-gpios = <0x7e 0x04>;
phandle = <0x185>;
};
};
wwdt@0xf03f0000 {
compatible = "xlnx,versal-wwdt";
reg = <0x00 0xf03f0000 0x00 0x10000 0x00>;
pclk = <0x5f5e100>;
phandle = <0x186>;
};
pmc_ufshc@0xf10b0000 {
compatible = "ufshc-sysbus";
reg = <0x00 0xf10b0000 0x00 0x10000 0x00>;
interrupts = <0xea>;
ufs-target = <0x87>;
unipro-mphy = <0x88>;
dma = <0x74>;
phandle = <0x89>;
};
unipro@0 {
compatible = "unipro-mphy";
ufshc = <0x89>;
#gpio-cells = <0x01>;
phandle = <0x88>;
};
ufs_dev@0 {
compatible = "ufs-dev";
num-luns = <0x08>;
phandle = <0x87>;
};
ufs_reg@0xf1060000 {
compatible = "dwc.ufs_reg";
reg = <0x00 0xf1061000 0x00 0x100 0x01>;
gpios = <0x88 0x00>;
phandle = <0x187>;
};
};
amba_pmc_sec@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
doc-name = "PMC Secure";
doc-status = "in-progress";
qemu-fdt-abort-on-error = "Unable to create PMC security models.
Cannot continue.\nTry installing libgcrypt.";
phandle = <0x6f>;
trng@0xf1230000 {
doc-status = "complete";
compatible = "xlnx,versal-trng";
reg = <0x00 0xf1230000 0x00 0x1000 0x00>;
interrupts = <0xe9>;
};
pmc_dma0_src@0 {
doc-status = "complete";
compatible = "zynqmp,csu-dma";
stream-connected-dma0 = <0x8a>;
reg = <0x00 0xf11c0000 0x00 0x800 0x00>;
dma = <0x74>;
memattr = <0x8b>;
dma-width = <0x10>;
interrupts = <0xe0>;
reset-gpios = <0x7e 0x13>;
byte-align = <0x01>;
phandle = <0x188>;
};
pmc_dma0_dst@0 {
doc-status = "complete";
compatible = "zynqmp,csu-dma";
reg = <0x00 0xf11c0800 0x00 0x800 0x00>;
dma = <0x74>;
memattr = <0x8b>;
is-dst = <0x01>;
dma-width = <0x10>;
interrupts = <0xe0>;
reset-gpios = <0x7e 0x13>;
byte-align = <0x01>;
phandle = <0x8d>;
};
pmc_dma1_src@0 {
doc-status = "complete";
compatible = "zynqmp,csu-dma";
stream-connected-dma1 = <0x8a>;
reg = <0x00 0xf11d0000 0x00 0x800 0x00>;
dma = <0x74>;
memattr = <0x8c>;
dma-width = <0x10>;
interrupts = <0xe1>;
reset-gpios = <0x7e 0x14>;
byte-align = <0x01>;
phandle = <0x189>;
};
pmc_dma1_dst@0 {
doc-status = "complete";
compatible = "zynqmp,csu-dma";
reg = <0x00 0xf11d0800 0x00 0x800 0x00>;
dma = <0x74>;
memattr = <0x8c>;
is-dst = <0x01>;
dma-width = <0x10>;
interrupts = <0xe1>;
reset-gpios = <0x7e 0x14>;
byte-align = <0x01>;
phandle = <0x8e>;
};
pmc_stream_switch@0 {
doc-status = "complete";
compatible = "versal,pmc-sss";
reg-extended = <0x70 0x00 0xf1110500 0x00 0x04 0x01>;
stream-connected-dma0 = <0x8d>;
stream-connected-dma1 = <0x8e>;
stream-connected-aes = <0x8f>;
stream-connected-sha = <0x90>;
stream-connected-sbi = <0x91>;
stream-connected-sha1 = <0x92>;
phandle = <0x8a>;
};
pmc_sha@0xf1210000 {
doc-status = "complete";
compatible = "xlnx,asu_sha3";
reg = <0x00 0xf1210000 0x00 0x100 0x00>;
interrupts = <0xe7>;
phandle = <0x90>;
};
pmc_aes@0xf11e0000 {
doc-status = "in-progress";
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx-pmxc-aes";
stream-connected-aes = <0x8a>;
reg = <0x00 0xf11e0000 0x00 0x100 0x00>;
interrupts = <0xe4>;
gpios = <0x93 0x00 0x93 0x01>;
gpio-names = "busy\0done";
aes-core = <0x93>;
integrated-endianness-swap = <0x01>;
asu-aes = <0x94>;
phandle = <0x8f>;
xlnx_aes@0 {
#gpio-cells = <0x01>;
compatible = "xlnx-aes";
gpios = <0x8f 0x00>;
gpio-names = "reset";
phandle = <0x93>;
};
};
pmc_rsa@0xf1200000 {
doc-status = "complete";
compatible = "xlnx,versal-ecdsa-rsa";
reg = <0x00 0xf1200000 0x00 0x6c 0x00>;
interrupts = <0xe5>;
ram-nr-words = <0x100>;
phandle = <0x18a>;
};
xlnx_pmc_efuse_cache@0xf1250000 {
doc-status = "complete";
compatible = "xlnx,pmx_efuse_cache";
reg = <0x00 0xf1250000 0x00 0x10000 0x00>;
efuse = <0x95>;
phandle = <0x99>;
};
pmc_puf_ctrl@0 {
compatible = "xlnx,versal-puf-ctrl";
zynqmp-aes-key-sink-puf = <0x8f>;
efuse = <0x95>;
reg = <0x00 0xf1150000 0x00 0x10000 0x00>;
#gpio-cells = <0x01>;
gpio-controller;
phandle = <0x97>;
};
pmc_efuse@0xf1240000 {
doc-status = "complete";
compatible = "xlnx,pmx_efuse_ctrl";
#gpio-cells = <0x02>;
zynqmp-aes-key-sink-efuses = <0x8f>;
zynqmp-aes-key-sink-efuses-user0 = <0x8f>;
zynqmp-aes-key-sink-efuses-user1 = <0x8f>;
reg = <0x00 0xf1240000 0x00 0x10000 0x00>;
interrupts = <0xe6>;
efuse = <0x95>;
phandle = <0x18b>;
xlnx_efuse@0 {
doc-ignore = <0x01>;
compatible = "xlnx,efuse";
efuse-nr = <0x03>;
efuse-size = <0x2000>;
init-factory-extidcode = <0x01>;
phandle = <0x95>;
};
};
pmc_bbram@0xf11f0000 {
doc-status = "partial";
doc-limitations = "Missing AES key connections.";
compatible = "xlnx,bbram-ctrl";
reg = <0x00 0xf11f0000 0x00 0x10000 0x00>;
interrupts = <0xbca>;
zynqmp-aes-key-sink-bbram = <0x8f>;
crc-zpads = <0x00>;
phandle = <0x98>;
};
pmc_sbi@0xf1220000 {
doc-status = "complete";
compatible = "pmc,slave-boot";
reg = <0x00 0xf1220000 0x00 0x10000 0x00 0x00 0xf2100000
0x00 0x10000 0x00>;
interrupts = <0xe3>;
stream-connected-sbi = <0x8a>;
reset-gpios = <0x7e 0x12>;
phandle = <0x91>;
};
pmc_sha1@0xF1800000 {
doc-status = "complete";
compatible = "xlnx,asu_sha2";
reg = <0x00 0xf1800000 0x00 0x10000 0x00>;
phandle = <0x92>;
};
};
amba_pmc_ppu@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x6e>;
pmc_gic_proxy@0 {
doc-status = "complete";
#interrupt-cells = <0x03>;
interrupt-controller;
compatible = "xlnx,zynqmp-gicp";
reg = <0x00 0xf1140000 0x00 0x100 0x00>;
interrupt-parent = <0x08>;
interrupts = <0x10>;
max-ints = <0x100>;
phandle = <0x07>;
};
};
amba_pmc_sys@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
doc-name = "PMC System";
doc-status = "partial";
phandle = <0x70>;
pmc_clk_rst@0xf1260000 {
doc-status = "partial";
compatible = "xlnx,pmx_crp";
reg = <0x00 0xf1260000 0x00 0x80000 0x00>;
interrupts = <0xbca>;
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0x7e>;
};
pmc_int@0xf1400000 {
doc-status = "partial";
compatible = "xlnx,versal-pmc-int";
reg = <0x00 0xf1400000 0x00 0x300000 0x00>;
interrupts = <0xe2>;
phandle = <0x18c>;
};
pmc_reset_domain@0 {
compatible = "qemu,reset-device";
gpios = <0x7e 0x02>;
};
pmc_global@0xf1110000 {
doc-status = "partial";
#gpio-cells = <0x01>;
gpio-controller;
interrupts-extended = <0x08 0x10 0x08 0x1b 0x08 0x1b 0x08 0x1b 0x08
0x1b 0x08 0x11 0x08 0x11 0x96 0x00 0x86 0x10 0x86 0x11 0x86 0x12 0x86 0x13 0x86 0x14 0x86 0x15 0x86
0x16 0x86 0x17 0x86 0x18 0x86 0x19 0x86 0x1a 0x86 0x1b 0x96 0x00 0x86 0x1d>;
reg = <0x00 0xf1110000 0x00 0x50000 0x00>;
gpios = <0x97 0x00>;
bbram = <0x98>;
efuse = <0x99>;
compatible = "xlnx,pmxc_global";
phandle = <0x76>;
};
pmc_stream_zero@ {
compatible = "xlnx,pmc-stream-zero";
reg = <0x00 0xf1110518 0x00 0x04 0x01>;
stream-connected-pzm = <0x8a>;
phandle = <0x18d>;
};
pmc_analog@0xf1160000 {
compatible = "xlnx,pmxc_anlg";
reg = <0x00 0xf1160000 0x00 0x40000 0x00>;
interrupts-extended = <0x07 0x00 0x13 0x00>;
tamper-sink = <0x76>;
phandle = <0x18e>;
};
pmc_sysmon@0xf1270000 {
compatible = "xlnx,pmc-sysmon";
reg = <0x00 0xf1270000 0x00 0x30000 0x00>;
interrupts = <0x12 0x79>;
reset-gpios = <0x7e 0x15>;
efuse = <0x99>;
ams-sats = <0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0>;
tamper-sink = <0x76>;
phandle = <0x18f>;
};
pmc_ams_sat@0 {
compatible = "xlnx,ams-sat";
reg = <0x00 0xf1280000 0x00 0x10000 0x01>;
phandle = <0x9a>;
};
pmc_ams_sat@1 {
compatible = "xlnx,ams-sat";
reg = <0x00 0xf1290000 0x00 0x10000 0x01>;
phandle = <0x9b>;
};
versal_pmc_tamper@ {
compatible = "xlnx,pmc_tamper";
reg-extended = <0x70 0x00 0xf1110530 0x00 0x38 0x01 0xa1 0x00
0xf0041100 0x00 0x38 0x02>;
phandle = <0x190>;
};
lpd_ams_sat@0 {
compatible = "xlnx,ams-sat";
reg = <0x00 0xeb550000 0x00 0x10000 0x01>;
phandle = <0x9c>;
};
fpd_ams_sat@0 {
compatible = "xlnx,ams-sat";
reg = <0x00 0xecc30000 0x00 0x10000 0x01>;
phandle = <0x9d>;
};
fpd_ams_sat@1 {
compatible = "xlnx,ams-sat";
reg = <0x00 0xecd30000 0x00 0x10000 0x01>;
phandle = <0x9e>;
};
fpd_ams_sat@2 {
compatible = "xlnx,ams-sat";
reg = <0x00 0xece30000 0x00 0x10000 0x01>;
phandle = <0x9f>;
};
fpd_ams_sat@3 {
compatible = "xlnx,ams-sat";
reg = <0x00 0xecf30000 0x00 0x10000 0x01>;
phandle = <0xa0>;
};
};
amba_pmc_pl@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
doc-name = "PMC PL";
doc-status = "partial";
phandle = <0x71>;
noc_npi_nir@0xf6000000 {
compatible = "xlnx.npi-nir";
reg = <0x00 0xf6000000 0x00 0x10000 0x01>;
phandle = <0x191>;
};
npi_ddrmc_ub0@0xf62c0000 {
doc-limitations = "Only the uB rst is supported";
compatible = "xlnx,ddrmc5_ub";
reg = <0x00 0xf62c0000 0x00 0x40000 0x01>;
reset-gpios = <0x7e 0x0f>;
#gpio-cells = <0x01>;
gpio-controller;
phandle = <0x192>;
};
npi_ddrmc_main0@0xf6290000 {
doc-limitations = "Just a stub";
compatible = "xlnx,versal-ddrmc-main";
reg = <0x00 0xf6290000 0x00 0x10000 0x01>;
reset-gpios = <0x7e 0x0f>;
phandle = <0xcf>;
};
npi_ddrmc_noc0@0xf62a0000 {
doc-limitations = "Just a stub";
compatible = "xlnx,versal-ddrmc-noc";
reg = <0x00 0xf62a0000 0x00 0x20000 0xffffffff>;
reset-gpios = <0x7e 0x0f>;
phandle = <0x193>;
};
npi_ddrmc_ub1@0xf63b0000 {
doc-limitations = "Only the uB rst is supported";
compatible = "xlnx,ddrmc5_ub";
reg = <0x00 0xf63b0000 0x00 0x40000 0x01>;
reset-gpios = <0x7e 0x0f>;
#gpio-cells = <0x01>;
gpio-controller;
phandle = <0x194>;
};
npi_ddrmc_main1@0xf6380000 {
doc-limitations = "Just a stub";
compatible = "xlnx,versal-ddrmc-main";
reg = <0x00 0xf6380000 0x00 0x10000 0x01>;
reset-gpios = <0x7e 0x0f>;
phandle = <0x195>;
};
npi_ddrmc_noc1@0xf6390000 {
doc-limitations = "Just a stub";
compatible = "xlnx,versal-ddrmc-noc";
reg = <0x00 0xf6390000 0x00 0x20000 0xffffffff>;
reset-gpios = <0x7e 0x0f>;
phandle = <0x196>;
};
npi_ddrmc_ub2@0xf6940000 {
doc-limitations = "Only the uB rst is supported";
compatible = "xlnx,ddrmc5_ub";
reg = <0x00 0xf6940000 0x00 0x40000 0x01>;
reset-gpios = <0x7e 0x0f>;
#gpio-cells = <0x01>;
gpio-controller;
phandle = <0x197>;
};
npi_ddrmc_main2@0xf6910000 {
doc-limitations = "Just a stub";
compatible = "xlnx,versal-ddrmc-main";
reg = <0x00 0xf6910000 0x00 0x10000 0x01>;
reset-gpios = <0x7e 0x0f>;
phandle = <0x198>;
};
npi_ddrmc_noc2@0xf6920000 {
doc-limitations = "Just a stub";
compatible = "xlnx,versal-ddrmc-noc";
reg = <0x00 0xf6920000 0x00 0x20000 0xffffffff>;
reset-gpios = <0x7e 0x0f>;
phandle = <0x199>;
};
npi_ddrmc_ub3@0xf6a20000 {
doc-limitations = "Only the uB rst is supported";
compatible = "xlnx,ddrmc5_ub";
reg = <0x00 0xf6a20000 0x00 0x40000 0x01>;
reset-gpios = <0x7e 0x0f>;
#gpio-cells = <0x01>;
gpio-controller;
phandle = <0x19a>;
};
npi_ddrmc_main3@0xf69f0000 {
doc-limitations = "Just a stub";
compatible = "xlnx,versal-ddrmc-main";
reg = <0x00 0xf69f0000 0x00 0x10000 0x01>;
reset-gpios = <0x7e 0x0f>;
phandle = <0x19b>;
};
npi_ddrmc_noc3@0xf6a00000 {
doc-limitations = "Just a stub";
compatible = "xlnx,versal-ddrmc-noc";
reg = <0x00 0xf6a00000 0x00 0x20000 0xffffffff>;
reset-gpios = <0x7e 0x0f>;
phandle = <0x19c>;
};
npi_ddrmc_xmpu0@0xf62a0000 {
compatible = "xlnx,versal-ddrmc-xmpu";
reg-extended = <0x71 0x00 0xf62b2000 0x00 0x10000 0x01 0x0d 0x00
0x00 0x00 0x80000000 0x00>;
protected-mr = <0xa2>;
mr-0 = <0x0d>;
protected-base = <0x00>;
phandle = <0x19d>;
};
npi_me@0xf6540000 {
compatible = "xlnx.aie2p_s_npi";
reg = <0x00 0xf6540000 0x00 0x10000 0x01>;
reset-gpios = <0x7e 0x0f>;
phandle = <0x19e>;
};
noc_npi_devs@0 {
compatible = "xlnx,noc-npi-dev";
reg = <0x00 0xf6000000 0x00 0x2000000 0x00>;
phandle = <0x19f>;
};
cfu_fdro@0xf12c2000 {
compatible = "xlnx,versal-cfu-fdro";
reg = <0x00 0xf12c2000 0x00 0x1000 0x00>;
phandle = <0xa4>;
};
cfu_sfr@0xf12c1000 {
compatible = "xlnx,versal-cfu-sfr";
reg = <0x00 0xf12c1000 0x00 0x1000 0x00>;
cfu = <0xa3>;
phandle = <0x1a0>;
};
cframe0_reg@0xf12d0000 {
compatible = "xlnx.cframe_reg";
reg = <0x00 0xf12d0000 0x00 0x1000 0x00 0x00 0xf12d1000
0x00 0x1000 0x00>;
interrupts = <0x13>;
cfu-fdro = <0xa4>;
blktype0-frames = <0x853f>;
blktype1-frames = <0xdc8>;
blktype2-frames = <0x3200>;
blktype3-frames = <0x0b>;
blktype4-frames = <0x05>;
blktype5-frames = <0x01>;
blktype6-frames = <0x01>;
phandle = <0xa5>;
};
cframe1_reg@0xf12d2000 {
compatible = "xlnx.cframe_reg";
reg = <0x00 0xf12d2000 0x00 0x1000 0x00 0x00 0xf12d3000
0x00 0x1000 0x00>;
interrupts = <0x13>;
cfu-fdro = <0xa4>;
blktype0-frames = <0x9662>;
blktype1-frames = <0xf01>;
blktype2-frames = <0x3c01>;
blktype3-frames = <0x0d>;
blktype4-frames = <0x07>;
blktype5-frames = <0x03>;
blktype6-frames = <0x01>;
phandle = <0xa6>;
};
cframe2_reg@0xf12d4000 {
compatible = "xlnx.cframe_reg";
reg = <0x00 0xf12d4000 0x00 0x1000 0x00 0x00 0xf12d5000
0x00 0x1000 0x00>;
interrupts = <0x13>;
cfu-fdro = <0xa4>;
blktype0-frames = <0x9662>;
blktype1-frames = <0xf01>;
blktype2-frames = <0x3c01>;
blktype3-frames = <0x0d>;
blktype4-frames = <0x07>;
blktype5-frames = <0x03>;
blktype6-frames = <0x01>;
phandle = <0xa7>;
};
cframe3_reg@0xf12d6000 {
compatible = "xlnx.cframe_reg";
reg = <0x00 0xf12d6000 0x00 0x1000 0x00 0x00 0xf12d7000
0x00 0x1000 0x00>;
interrupts = <0x13>;
cfu-fdro = <0xa4>;
blktype0-frames = <0x9662>;
blktype1-frames = <0xf01>;
blktype2-frames = <0x3c01>;
blktype3-frames = <0x0d>;
blktype4-frames = <0x07>;
blktype5-frames = <0x03>;
blktype6-frames = <0x01>;
phandle = <0xa8>;
};
cframe4_reg@0xf12d8000 {
compatible = "xlnx.cframe_reg";
reg = <0x00 0xf12d8000 0x00 0x1000 0x00 0x00 0xf12d9000
0x00 0x1000 0x00>;
interrupts = <0x13>;
cfu-fdro = <0xa4>;
phandle = <0xa9>;
};
cframe5_reg@0xf12da000 {
compatible = "xlnx.cframe_reg";
reg = <0x00 0xf12da000 0x00 0x1000 0x00 0x00 0xf12db000
0x00 0x1000 0x00>;
interrupts = <0x13>;
cfu-fdro = <0xa4>;
phandle = <0xaa>;
};
cframe6_reg@0xf12dc000 {
compatible = "xlnx.cframe_reg";
reg = <0x00 0xf12dc000 0x00 0x1000 0x00 0x00 0xf12dd000
0x00 0x1000 0x00>;
interrupts = <0x13>;
cfu-fdro = <0xa4>;
phandle = <0xab>;
};
cframe7_reg@0xf12de000 {
compatible = "xlnx.cframe_reg";
reg = <0x00 0xf12de000 0x00 0x1000 0x00 0x00 0xf12df000
0x00 0x1000 0x00>;
interrupts = <0x13>;
cfu-fdro = <0xa4>;
phandle = <0xac>;
};
cframe8_reg@0xf12e0000 {
compatible = "xlnx.cframe_reg";
reg = <0x00 0xf12e0000 0x00 0x1000 0x00 0x00 0xf12e1000
0x00 0x1000 0x00>;
interrupts = <0x13>;
cfu-fdro = <0xa4>;
phandle = <0xad>;
};
cframe9_reg@0xf12e2000 {
compatible = "xlnx.cframe_reg";
reg = <0x00 0xf12e2000 0x00 0x1000 0x00 0x00 0xf12e3000
0x00 0x1000 0x00>;
interrupts = <0x13>;
cfu-fdro = <0xa4>;
phandle = <0xae>;
};
cframe10_reg@0xf12e4000 {
compatible = "xlnx.cframe_reg";
reg = <0x00 0xf12e4000 0x00 0x1000 0x00 0x00 0xf12e5000
0x00 0x1000 0x00>;
interrupts = <0x13>;
cfu-fdro = <0xa4>;
phandle = <0xaf>;
};
cframe11_reg@0xf12e6000 {
compatible = "xlnx.cframe_reg";
reg = <0x00 0xf12e6000 0x00 0x1000 0x00 0x00 0xf12e7000
0x00 0x1000 0x00>;
interrupts = <0x13>;
cfu-fdro = <0xa4>;
phandle = <0xb0>;
};
cframe12_reg@0xf12e8000 {
compatible = "xlnx.cframe_reg";
reg = <0x00 0xf12e8000 0x00 0x1000 0x00 0x00 0xf12e9000
0x00 0x1000 0x00>;
interrupts = <0x13>;
cfu-fdro = <0xa4>;
phandle = <0xb1>;
};
cframe13_reg@0xf12ea000 {
compatible = "xlnx.cframe_reg";
reg = <0x00 0xf12ea000 0x00 0x1000 0x00 0x00 0xf12eb000
0x00 0x1000 0x00>;
interrupts = <0x13>;
cfu-fdro = <0xa4>;
phandle = <0xb2>;
};
cframe14_reg@0xf12ec000 {
compatible = "xlnx.cframe_reg";
reg = <0x00 0xf12ec000 0x00 0x1000 0x00 0x00 0xf12ed000
0x00 0x1000 0x00>;
interrupts = <0x13>;
cfu-fdro = <0xa4>;
phandle = <0xb3>;
};
cframe_bcast_reg@0xf12ee000 {
compatible = "xlnx.cframe-bcast-reg";
reg = <0x00 0xf12ee000 0x00 0x1000 0x00 0x00 0xf12ef000
0x00 0x1000 0x00>;
cframe0 = <0xa5>;
cframe1 = <0xa6>;
cframe2 = <0xa7>;
cframe3 = <0xa8>;
cframe4 = <0xa9>;
cframe5 = <0xaa>;
cframe6 = <0xab>;
cframe7 = <0xac>;
cframe8 = <0xad>;
cframe9 = <0xae>;
cframe10 = <0xaf>;
cframe11 = <0xb0>;
cframe12 = <0xb1>;
cframe13 = <0xb2>;
cframe14 = <0xb3>;
phandle = <0x1a1>;
};
gtyp_npi_slave_0@0xf65a0000 {
compatible = "xlnx,xlnx,gtyp_npi_slave";
reg = <0x00 0xf65a0000 0x00 0x20000 0x00>;
};
gtyp_npi_slave_1@0xf66c0000 {
compatible = "xlnx,xlnx,gtyp_npi_slave";
reg = <0x00 0xf66c0000 0x00 0x20000 0x00>;
};
gtyp_npi_slave_2@0xf6720000 {
compatible = "xlnx,xlnx,gtyp_npi_slave";
reg = <0x00 0xf6720000 0x00 0x20000 0x00>;
};
dummy_cfu_mem@0xf12b0000 {
compatible = "qemu:memory-region";
phandle = <0x75>;
cfu@0x0 {
doc-status = "partial";
doc-comments = "Stub";
doc-limitations = "No way to extract CFRAME data.";
compatible = "xlnx,versal-cfu";
reg = <0x00 0x00 0x00 0x10000 0x00 0x00 0x10000 0x00 0x1000
0x00 0x00 0xcd0000 0x00 0x40000 0x00>;
chardev = "pmc-cfu";
dma = <0x74>;
phandle = <0xa3>;
};
};
};
amba_pmc_bat@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
doc-name = "PMC BAT";
doc-status = "partial";
phandle = <0x72>;
rtc@0xf12a0000 {
doc-status = "complete";
doc-comments = "Versal PMC RTC";
compatible = "xlnx,zynqmp-rtc";
interrupts = <0xbca 0xc8 0xc9>;
reg = <0x00 0xf12a0000 0x00 0x10000 0x00>;
xlnx,version = "2.0.0";
phandle = <0x1a2>;
};
};
amba_psm@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x14>;
};
amba_xram@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x15>;
xram_ctrl_0 {
compatible = "xlnx,versal-xramc";
reg = <0x00 0xeb8e0000 0x00 0x10000 0x00>;
interrupts = <0x4f>;
alloc-ram = <0x00>;
};
xram_ctrl_1 {
compatible = "xlnx,versal-xramc";
reg = <0x00 0xeb8f0000 0x00 0x10000 0x00>;
interrupts = <0x4f>;
alloc-ram = <0x00>;
};
xram_ctrl_2 {
compatible = "xlnx,versal-xramc";
reg = <0x00 0xeb900000 0x00 0x10000 0x00>;
interrupts = <0x4f>;
alloc-ram = <0x00>;
};
xram_ctrl_3 {
compatible = "xlnx,versal-xramc";
reg = <0x00 0xeb910000 0x00 0x10000 0x00>;
interrupts = <0x4f>;
alloc-ram = <0x00>;
};
};
crf@0xec200000 {
compatible = "xlnx,versal-psx-crf";
reg-extended = <0x0b 0x00 0xec200000 0x00 0x100000 0x00>;
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0x52>;
};
amba_asu_cpu@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
#interrupt-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0xb4>;
downstream_amba {
compatible = "qemu:memory-region";
alias = <0x0d>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0xffffffff>;
};
};
amba_asu@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x51>;
asu_instr_ram@0xebe00000 {
compatible = "qemu:memory-region";
device_type = "memory";
qemu,ram = <0x01>;
reg = <0x00 0xebe00000 0x00 0x40000 0x00>;
phandle = <0x1a3>;
};
io-module@0xebe80000 {
#address-cells = <0x02>;
#size-cells = <0x01>;
#priority-cells = <0x00>;
compatible = "xlnx,iomodule-1.02.a\0syscon\0simple-bus";
container = <0xb4>;
priority = <0xffffffff>;
xlnx,freq = <0x47868c0>;
xlnx,instance = "iomodule_0";
xlnx,io-mask = <0xfffe0000>;
xlnx,lmb-awidth = <0x20>;
xlnx,lmb-dwidth = <0x20>;
xlnx,mask = <0xffffff80>;
xlnx,use-io-bus = <0x01>;
phandle = <0x1a4>;
asu_io_intc@0C {
#interrupt-cells = <0x01>;
compatible = "xlnx,io-intc-1.02.a\0xlnx,io_intc";
interrupt-controller;
interrupts-extended = <0xb5 0x0b>;
reg = <0x00 0xebe8000c 0x04 0x00 0xebe80030 0x10 0x00
0xebe80080 0x7c>;
xlnx,intc-addr-width = <0x20>;
xlnx,intc-base-vectors = <0x00>;
xlnx,intc-has-fast = <0x00>;
xlnx,intc-intr-size = <0x10>;
xlnx,intc-level-edge = <0x00>;
xlnx,intc-positive = <0xffff>;
xlnx,intc-use-ext-intr = <0x01>;
phandle = <0x09>;
};
asu_gpi@20 {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,io-gpi-1.02.a\0xlnx,io_gpi";
interrupt-parent = <0x09>;
interrupts = <0x0b>;
reg = <0x00 0xebe80020 0x04>;
xlnx,gpi-interrupt = <0x01>;
xlnx,gpi-size = <0x20>;
xlnx,use-gpi = <0x01>;
phandle = <0x1a5>;
};
asu_gpo@10 {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,io-gpo-1.02.a\0xlnx,io_gpo";
reg = <0x00 0xebe80010 0x04>;
xlnx,gpo-init = <0x00>;
xlnx,gpo-size = <0x03>;
xlnx,use-gpo = <0x01>;
phandle = <0xb6>;
};
asu_gpo@14 {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,io-gpo-1.02.a\0xlnx,io_gpo";
reg = <0x00 0xebe80014 0x04>;
xlnx,gpo-init = <0x00>;
xlnx,gpo-size = <0x20>;
xlnx,use-gpo = <0x01>;
phandle = <0x1a6>;
};
asu_pit@40 {
compatible = "xlnx,io-pit-1.02.a\0xlnx,io_pit";
interrupt-parent = <0x09>;
interrupts = <0x03>;
reg = <0x00 0xebe80040 0x0c>;
xlnx,pit-interrupt = <0x01>;
xlnx,pit-prescaler = <0x09>;
xlnx,pit-readable = <0x01>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x01>;
frequency = <0x1b6b0b00>;
gpios = <0xb6 0x01 0xb7 0x00>;
gpio-names = "ps_config\0ps_hit_in";
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0x1a7>;
};
asu_pit@50 {
compatible = "xlnx,io-pit-1.02.a\0xlnx,io_pit";
interrupt-parent = <0x09>;
interrupts = <0x04>;
reg = <0x00 0xebe80050 0x0c>;
xlnx,pit-interrupt = <0x01>;
xlnx,pit-prescaler = <0x09>;
xlnx,pit-readable = <0x01>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x01>;
frequency = <0x1b6b0b00>;
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0xb7>;
};
asu_pit@60 {
compatible = "xlnx,io-pit-1.02.a\0xlnx,io_pit";
interrupt-parent = <0x09>;
interrupts = <0x05>;
reg = <0x00 0xebe80060 0x0c>;
xlnx,pit-interrupt = <0x01>;
xlnx,pit-prescaler = <0x09>;
xlnx,pit-readable = <0x01>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x01>;
frequency = <0x1b6b0b00>;
gpios = <0xb6 0x02 0xb8 0x00>;
gpio-names = "ps_config\0ps_hit_in";
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0x1a8>;
};
asu_pit@70 {
compatible = "xlnx,io-pit-1.02.a\0xlnx,io_pit";
interrupt-parent = <0x09>;
interrupts = <0x06>;
reg = <0x00 0xebe80070 0x0c>;
xlnx,pit-interrupt = <0x01>;
xlnx,pit-prescaler = <0x09>;
xlnx,pit-readable = <0x01>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x01>;
frequency = <0x1b6b0b00>;
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0xb8>;
};
};
asu_mdm_uart@0xebef0000 {
compatible = "xlnx,xps-uartlite";
reg = <0x00 0xebef0000 0x00 0x10 0x01>;
chardev = "serial4";
phandle = <0x1a9>;
};
asu_global@0xebf80000 {
compatible = "xlnx,asu_global";
reg = <0x00 0xebf80000 0x00 0x20000 0x00>;
gpios = <0xb9 0x00>;
phandle = <0x1aa>;
};
asu_global_pmc@0xebf80000 {
compatible = "xlnx,asu_global_pmc";
reg = <0x00 0xebf90000 0x00 0x20000 0x00>;
phandle = <0x1ab>;
};
asu_local@0xebe8e000 {
compatible = "xlnx,asu_local_reg";
reg = <0x00 0xebe8e000 0x00 0x2000 0x00>;
phandle = <0x1ac>;
};
asu_sss@0xebe8e000 {
compatible = "asu-sss";
reg = <0x00 0xebe8e000 0x00 0x08 0x01>;
stream-connected-dma0 = <0xba>;
stream-connected-sha2 = <0xbb>;
stream-connected-sha3 = <0xbc>;
stream-connected-dma1 = <0xbd>;
stream-connected-aes = <0xb9>;
phandle = <0xbe>;
};
asu_dma_src@0xebe8c000 {
compatible = "zynqmp,csu-dma";
reg = <0x00 0xebe8c000 0x00 0x800 0x00>;
interrupts = <0x13>;
stream-connected-dma0 = <0xbe>;
dma = <0xb4>;
memattr = <0x8b>;
dma-width = <0x10>;
byte-align = <0x01>;
phandle = <0x1ad>;
};
asu_dma_dst@0xebe8c000 {
compatible = "zynqmp,csu-dma";
reg = <0x00 0xebe8c800 0x00 0x800 0x00>;
interrupts = <0x13>;
dma = <0xb4>;
memattr = <0x8b>;
dma-width = <0x10>;
is-dst = <0x01>;
byte-align = <0x01>;
phandle = <0xba>;
};
asu_dma1_src@0xebe8d000 {
compatible = "zynqmp,csu-dma";
reg = <0x00 0xebe8d000 0x00 0x800 0x00>;
interrupts = <0x13>;
stream-connected-dma1 = <0xbe>;
dma = <0xb4>;
memattr = <0x8c>;
dma-width = <0x10>;
byte-align = <0x01>;
phandle = <0x1ae>;
};
asu_dma1_dst@0xebe8d000 {
compatible = "zynqmp,csu-dma";
reg = <0x00 0xebe8d800 0x00 0x800 0x00>;
interrupts = <0x14>;
dma = <0xb4>;
memattr = <0x8c>;
dma-width = <0x10>;
is-dst = <0x01>;
byte-align = <0x01>;
phandle = <0xbd>;
};
asu_xmpu@0xebf60000 {
compatible = "xlnx,versal-xmpu";
reg-extended = <0x51 0x00 0xebf60000 0x00 0x10000 0x00 0x51 0x00
0xebe40000 0x00 0x20000 0x02>;
protected-mr = <0xbf>;
mr-0 = <0x0d>;
protected-base = <0xebe40000>;
phandle = <0x1af>;
};
asu_aes@0xebe88000 {
doc-status = "complete";
compatible = "xlnx,asu-aes";
reg = <0x00 0xebe88000 0x00 0x2000 0x00>;
#gpio-cells = <0x01>;
gpio-controller;
interrupts = <0x12 0x1a>;
keyvault = <0x94>;
stream-connected-aes = <0xbe>;
phandle = <0xb9>;
};
asu_kv@0xebe8a000 {
compatible = "xlnx,asu-kv";
reg = <0x00 0xebe8a000 0x00 0x2000 0x00>;
pmxc-aes = <0x8f>;
aes-engine = <0xb9>;
phandle = <0x94>;
};
asu_sha3@0xebf40000 {
doc-status = "complete";
compatible = "xlnx,asu_sha3";
reg = <0x00 0xebf40000 0x00 0x10000 0x00>;
interrupts = <0x15>;
phandle = <0xbc>;
};
asu_sha2@0xebf30000 {
doc-status = "complete";
compatible = "xlnx,asu_sha2";
reg = <0x00 0xebf30000 0x00 0x10000 0x00>;
phandle = <0xbb>;
};
pmc_rsa@0xebf50000 {
doc-status = "complete";
compatible = "xlnx,asu-ecdsa-rsa";
reg = <0x00 0xebf50000 0x00 0x10000 0x00>;
interrupts = <0x17>;
phandle = <0x1b0>;
};
trng@0xebf20000 {
doc-status = "complete";
compatible = "xlnx-asu-trng";
reg = <0x00 0xebf10000 0x00 0x20000 0x00>;
interrupts = <0x18>;
phandle = <0x1b1>;
};
asu_ecc@0xebf00000 {
doc-status = "complete";
compatible = "xlnx,asu_ecc";
reg = <0x00 0xebf00000 0x00 0x10000 0x00>;
interrupts = <0x16>;
phandle = <0x1b2>;
};
};
};
lmb_pmc_ppu0@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
doc-name = "LMB PPU0";
doc-status = "complete";
phandle = <0xa1>;
main_bus_for_pmc {
compatible = "qemu:memory-region";
alias = <0x74>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0x00>;
};
pmc_rom@0xf0000000 {
reg = <0x00 0xf0000000 0x00 0x40000 0x01>;
compatible = "qemu:memory-region";
container = <0xa1>;
qemu,ram = <0x01>;
read-only;
phandle = <0x1b3>;
};
ppu0_ram@0xf0060000 {
reg = <0x00 0xf0060000 0x00 0x8000 0x01>;
compatible = "qemu:memory-region";
container = <0xa1>;
qemu,ram = <0x01>;
phandle = <0x1b4>;
};
io-module@00 {
doc-status = "complete";
#address-cells = <0x02>;
#size-cells = <0x01>;
#priority-cells = <0x00>;
compatible = "xlnx,iomodule-1.02.a\0syscon\0simple-bus";
container = <0xa1>;
priority = <0xffffffff>;
xlnx,freq = <0x47868c0>;
xlnx,instance = "iomodule_1";
xlnx,io-mask = <0xfffe0000>;
xlnx,lmb-awidth = <0x20>;
xlnx,lmb-dwidth = <0x20>;
xlnx,mask = <0xffffff80>;
xlnx,use-io-bus = <0x01>;
phandle = <0x1b5>;
pmc_ppu0_intc@0C {
#interrupt-cells = <0x01>;
compatible = "xlnx,io-intc-1.02.a\0xlnx,io_intc";
interrupt-controller;
interrupts-extended = <0xc0 0x00>;
reg = <0x00 0xf008000c 0x04 0x00 0xf0080030 0x10 0x00
0xf0080080 0x7c>;
xlnx,intc-addr-width = <0x20>;
xlnx,intc-base-vectors = <0x00>;
xlnx,intc-has-fast = <0x00>;
xlnx,intc-intr-size = <0x10>;
xlnx,intc-level-edge = <0x00>;
xlnx,intc-positive = <0xffff>;
xlnx,intc-use-ext-intr = <0x01>;
phandle = <0x86>;
};
pmc_ppu0_gpi@20 {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,io-gpi-1.02.a\0xlnx,io_gpi";
interrupt-parent = <0x86>;
interrupts = <0x0b>;
reg = <0x00 0xf0080020 0x04>;
xlnx,gpi-interrupt = <0x01>;
xlnx,gpi-size = <0x20>;
xlnx,use-gpi = <0x01>;
phandle = <0x1b6>;
};
pmc_ppu0_gpi@24 {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,io-gpi-1.02.a\0xlnx,io_gpi";
interrupt-parent = <0x86>;
interrupts = <0x0c>;
reg = <0x00 0xf0080024 0x04>;
xlnx,gpi-interrupt = <0x01>;
xlnx,gpi-size = <0x20>;
xlnx,use-gpi = <0x01>;
phandle = <0x1b7>;
};
pmc_ppu0_gpi@28 {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,io-gpi-1.02.a\0xlnx,io_gpi";
interrupt-parent = <0x86>;
interrupts = <0x0d>;
reg = <0x00 0xf0080028 0x04>;
xlnx,gpi-interrupt = <0x01>;
xlnx,gpi-size = <0x20>;
xlnx,use-gpi = <0x01>;
phandle = <0x1b8>;
};
pmc_ppu0_gpi@2c {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,io-gpi-1.02.a\0xlnx,io_gpi";
interrupt-parent = <0x86>;
interrupts = <0x0e>;
reg = <0x00 0xf008002c 0x04>;
xlnx,gpi-interrupt = <0x01>;
xlnx,gpi-size = <0x20>;
xlnx,use-gpi = <0x01>;
phandle = <0x1b9>;
};
pmc_ppu0_gpo@10 {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,io-gpo-1.02.a\0xlnx,io_gpo";
reg = <0x00 0xf0080010 0x04>;
xlnx,gpo-init = <0x00>;
xlnx,gpo-size = <0x09>;
xlnx,use-gpo = <0x01>;
phandle = <0xc1>;
};
pmc_ppu0_gpo@14 {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,io-gpo-1.02.a\0xlnx,io_gpo";
reg = <0x00 0xf0080014 0x04>;
xlnx,gpo-init = <0x00>;
xlnx,gpo-size = <0x20>;
xlnx,use-gpo = <0x01>;
phandle = <0x1ba>;
};
pmc_ppu0_gpo@18 {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,io-gpo-1.02.a\0xlnx,io_gpo";
reg = <0x00 0xf0080018 0x04>;
xlnx,gpo-init = <0x00>;
xlnx,gpo-size = <0x20>;
xlnx,use-gpo = <0x01>;
phandle = <0x1bb>;
};
pmc_ppu0_gpo@1c {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,io-gpo-1.02.a\0xlnx,io_gpo";
reg = <0x00 0xf008001c 0x04>;
xlnx,gpo-init = <0x00>;
xlnx,gpo-size = <0x20>;
xlnx,use-gpo = <0x01>;
phandle = <0x1bc>;
};
pmc_ppu0_pit@40 {
compatible = "xlnx,io-pit-1.02.a\0xlnx,io_pit";
interrupt-parent = <0x86>;
interrupts = <0x03>;
reg = <0x00 0xf0080040 0x0c>;
xlnx,pit-interrupt = <0x01>;
xlnx,pit-prescaler = <0x09>;
xlnx,pit-readable = <0x01>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x01>;
frequency = <0x1b6b0b00>;
gpios = <0xc1 0x01 0xc2 0x00>;
gpio-names = "ps_config\0ps_hit_in";
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0x1bd>;
};
pmc_ppu0_pit@50 {
compatible = "xlnx,io-pit-1.02.a\0xlnx,io_pit";
interrupt-parent = <0x86>;
interrupts = <0x04>;
reg = <0x00 0xf0080050 0x0c>;
xlnx,pit-interrupt = <0x01>;
xlnx,pit-prescaler = <0x09>;
xlnx,pit-readable = <0x01>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x01>;
frequency = <0x1b6b0b00>;
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0xc2>;
};
pmc_ppu0_pit@60 {
compatible = "xlnx,io-pit-1.02.a\0xlnx,io_pit";
interrupt-parent = <0x86>;
interrupts = <0x05>;
reg = <0x00 0xf0080060 0x0c>;
xlnx,pit-interrupt = <0x01>;
xlnx,pit-prescaler = <0x09>;
xlnx,pit-readable = <0x01>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x01>;
frequency = <0x1b6b0b00>;
gpios = <0xc1 0x06 0xc3 0x00>;
gpio-names = "ps_config\0ps_hit_in";
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0x1be>;
};
pmc_ppu0_pit@70 {
compatible = "xlnx,io-pit-1.02.a\0xlnx,io_pit";
interrupt-parent = <0x86>;
interrupts = <0x06>;
reg = <0x00 0xf0080070 0x0c>;
xlnx,pit-interrupt = <0x01>;
xlnx,pit-prescaler = <0x09>;
xlnx,pit-readable = <0x01>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x01>;
frequency = <0x1b6b0b00>;
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0xc3>;
};
};
};
lmb_pmc_ppu1@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
doc-name = "LMB PPU1";
doc-status = "complete";
phandle = <0xc4>;
main_bus_for_pmc {
compatible = "qemu:memory-region";
alias = <0x74>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0x00>;
};
io-module@00 {
doc-status = "complete";
#address-cells = <0x02>;
#size-cells = <0x01>;
#priority-cells = <0x00>;
compatible = "xlnx,iomodule-1.02.a\0syscon\0simple-bus";
container = <0xc4>;
priority = <0xffffffff>;
xlnx,freq = <0x47868c0>;
xlnx,instance = "iomodule_1";
xlnx,io-mask = <0xfffe0000>;
xlnx,lmb-awidth = <0x20>;
xlnx,lmb-dwidth = <0x20>;
xlnx,mask = <0xffffff80>;
xlnx,use-io-bus = <0x01>;
phandle = <0x1bf>;
pmc_ppu1_intc@0C {
#interrupt-cells = <0x01>;
compatible = "xlnx,io-intc-1.02.a\0xlnx,io_intc";
interrupt-controller;
interrupts-extended = <0xc5 0x00>;
reg = <0x00 0xf030000c 0x04 0x00 0xf0300030 0x10 0x00
0xf0300080 0x7c>;
xlnx,intc-addr-width = <0x20>;
xlnx,intc-base-vectors = <0x00>;
xlnx,intc-has-fast = <0x00>;
xlnx,intc-intr-size = <0x10>;
xlnx,intc-level-edge = <0x00>;
xlnx,intc-positive = <0xffff>;
xlnx,intc-use-ext-intr = <0x01>;
phandle = <0x08>;
};
pmc_ppu1_gpi@20 {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,io-gpi-1.02.a\0xlnx,io_gpi";
interrupt-parent = <0x08>;
interrupts = <0x0b>;
reg = <0x00 0xf0300020 0x04>;
xlnx,gpi-interrupt = <0x01>;
xlnx,gpi-size = <0x20>;
xlnx,use-gpi = <0x01>;
phandle = <0x1c0>;
};
pmc_ppu1_gpi@24 {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,io-gpi-1.02.a\0xlnx,io_gpi";
interrupt-parent = <0x08>;
interrupts = <0x0c>;
reg = <0x00 0xf0300024 0x04>;
xlnx,gpi-interrupt = <0x01>;
xlnx,gpi-size = <0x20>;
xlnx,use-gpi = <0x01>;
phandle = <0x1c1>;
};
pmc_ppu1_gpi@28 {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,io-gpi-1.02.a\0xlnx,io_gpi";
interrupt-parent = <0x08>;
interrupts = <0x0d>;
reg = <0x00 0xf0300028 0x04>;
xlnx,gpi-interrupt = <0x01>;
xlnx,gpi-size = <0x20>;
xlnx,use-gpi = <0x01>;
phandle = <0x1c2>;
};
pmc_ppu1_gpi@2c {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,io-gpi-1.02.a\0xlnx,io_gpi";
interrupt-parent = <0x08>;
interrupts = <0x0e>;
reg = <0x00 0xf030002c 0x04>;
xlnx,gpi-interrupt = <0x01>;
xlnx,gpi-size = <0x20>;
xlnx,use-gpi = <0x01>;
phandle = <0x1c3>;
};
pmc_ppu1_gpo@10 {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,io-gpo-1.02.a\0xlnx,io_gpo";
reg = <0x00 0xf0300010 0x04>;
xlnx,gpo-init = <0x00>;
xlnx,gpo-size = <0x09>;
xlnx,use-gpo = <0x01>;
phandle = <0xc6>;
};
pmc_ppu1_gpo@14 {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,io-gpo-1.02.a\0xlnx,io_gpo";
reg = <0x00 0xf0300014 0x04>;
xlnx,gpo-init = <0x00>;
xlnx,gpo-size = <0x20>;
xlnx,use-gpo = <0x01>;
phandle = <0x1c4>;
};
pmc_ppu1_gpo@18 {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,io-gpo-1.02.a\0xlnx,io_gpo";
reg = <0x00 0xf0300018 0x04>;
xlnx,gpo-init = <0x00>;
xlnx,gpo-size = <0x20>;
xlnx,use-gpo = <0x01>;
phandle = <0x1c5>;
};
pmc_ppu1_gpo@1c {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,io-gpo-1.02.a\0xlnx,io_gpo";
reg = <0x00 0xf030001c 0x04>;
xlnx,gpo-init = <0x00>;
xlnx,gpo-size = <0x20>;
xlnx,use-gpo = <0x01>;
phandle = <0x1c6>;
};
pmc_ppu1_pit@40 {
compatible = "xlnx,io-pit-1.02.a\0xlnx,io_pit";
interrupt-parent = <0x08>;
interrupts = <0x03>;
reg = <0x00 0xf0300040 0x0c>;
xlnx,pit-interrupt = <0x01>;
xlnx,pit-prescaler = <0x09>;
xlnx,pit-readable = <0x01>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x01>;
frequency = <0x5f5e100>;
gpios = <0xc6 0x01 0xc7 0x00>;
gpio-names = "ps_config\0ps_hit_in";
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0x1c7>;
};
pmc_ppu1_pit@50 {
compatible = "xlnx,io-pit-1.02.a\0xlnx,io_pit";
interrupt-parent = <0x08>;
interrupts = <0x04>;
reg = <0x00 0xf0300050 0x0c>;
xlnx,pit-interrupt = <0x01>;
xlnx,pit-prescaler = <0x09>;
xlnx,pit-readable = <0x01>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x01>;
frequency = <0x5f5e100>;
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0xc7>;
};
pmc_ppu1_pit@60 {
compatible = "xlnx,io-pit-1.02.a\0xlnx,io_pit";
interrupt-parent = <0x08>;
interrupts = <0x05>;
reg = <0x00 0xf0300060 0x0c>;
xlnx,pit-interrupt = <0x01>;
xlnx,pit-prescaler = <0x09>;
xlnx,pit-readable = <0x01>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x01>;
frequency = <0x5f5e100>;
gpios = <0xc6 0x06 0xc8 0x00>;
gpio-names = "ps_config\0ps_hit_in";
gpio-controller;
#gpio-cells = <0x01>;
windows-frequency = <0x13d620>;
phandle = <0x1c8>;
};
pmc_ppu1_pit@70 {
compatible = "xlnx,io-pit-1.02.a\0xlnx,io_pit";
interrupt-parent = <0x08>;
interrupts = <0x06>;
reg = <0x00 0xf0300070 0x0c>;
xlnx,pit-interrupt = <0x01>;
xlnx,pit-prescaler = <0x09>;
xlnx,pit-readable = <0x01>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x01>;
frequency = <0x5f5e100>;
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0xc8>;
};
};
};
lmb_psm@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x1c9>;
downstream_amba {
compatible = "qemu:memory-region";
alias = <0x0d>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0xffffffff>;
};
main_bus_for_pmc {
compatible = "qemu:memory-region";
alias = <0x14>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0x00>;
};
};
lmb_ddrmc@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
doc-name = "LMB DDRMC0";
doc-status = "partial";
phandle = <0xc9>;
ddrmc0_ram_data@0x1c000 {
reg = <0x00 0x1c000 0x00 0x4000 0x01>;
compatible = "qemu:memory-region";
qemu,ram = <0x01>;
phandle = <0x1ca>;
};
ddrmc0_ram_instr@0x20000 {
reg = <0x00 0x20000 0x00 0x20000 0x01>;
compatible = "qemu:memory-region";
qemu,ram = <0x01>;
phandle = <0x1cb>;
};
ddrmc0_ram_exchange@0x08000 {
reg = <0x00 0x8000 0x00 0x8000 0x01>;
compatible = "qemu:memory-region";
qemu,ram = <0x01>;
phandle = <0x1cc>;
};
io-module@00 {
doc-status = "complete";
#address-cells = <0x02>;
#size-cells = <0x01>;
#priority-cells = <0x00>;
compatible = "simple-bus";
container = <0xc9>;
priority = <0xffffffff>;
phandle = <0x1cd>;
ddrmc0_intc@0C {
#interrupt-cells = <0x01>;
compatible = "xlnx,io-intc-1.02.a\0xlnx,io_intc";
interrupt-controller;
interrupts-extended = <0xca 0x00>;
reg = <0x00 0x1b00c 0x04 0x00 0x1b030 0x10 0x00 0x1b080 0x7c>;
xlnx,intc-addr-width = <0x20>;
xlnx,intc-base-vectors = <0x00>;
xlnx,intc-has-fast = <0x00>;
xlnx,intc-intr-size = <0x10>;
xlnx,intc-level-edge = <0x00>;
xlnx,intc-positive = <0xffff>;
xlnx,intc-use-ext-intr = <0x01>;
phandle = <0xcb>;
};
ddrmc0_gpo@10 {
#gpio-cells = <0x01>;
gpio-controller;
compatible = "xlnx,io-gpo-1.02.a\0xlnx,io_gpo";
reg = <0x00 0x1b010 0x04>;
xlnx,gpo-init = <0x00>;
xlnx,gpo-size = <0x03>;
xlnx,use-gpo = <0x01>;
phandle = <0xcc>;
};
ddrmc0_pit@40 {
compatible = "xlnx,io-pit-1.02.a\0xlnx,io_pit";
interrupt-parent = <0xcb>;
interrupts = <0x03>;
reg = <0x00 0x1b040 0x0c>;
xlnx,pit-interrupt = <0x01>;
xlnx,pit-prescaler = <0x09>;
xlnx,pit-readable = <0x01>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x01>;
frequency = <0x1b6b0b00>;
gpios = <0xcc 0x01 0xcd 0x00>;
gpio-names = "ps_config\0ps_hit_in";
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0x1ce>;
};
ddrmc0_pit@50 {
compatible = "xlnx,io-pit-1.02.a\0xlnx,io_pit";
interrupt-parent = <0xcb>;
interrupts = <0x04>;
reg = <0x00 0x1b050 0x0c>;
xlnx,pit-interrupt = <0x01>;
xlnx,pit-prescaler = <0x09>;
xlnx,pit-readable = <0x01>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x01>;
frequency = <0x1b6b0b00>;
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0xcd>;
};
ddrmc0_pit@60 {
compatible = "xlnx,io-pit-1.02.a\0xlnx,io_pit";
interrupt-parent = <0xcb>;
interrupts = <0x05>;
reg = <0x00 0x1b060 0x0c>;
xlnx,pit-interrupt = <0x01>;
xlnx,pit-prescaler = <0x09>;
xlnx,pit-readable = <0x01>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x01>;
frequency = <0x1b6b0b00>;
gpios = <0xcc 0x06 0xce 0x00>;
gpio-names = "ps_config\0ps_hit_in";
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0x1cf>;
};
ddrmc0_pit@70 {
compatible = "xlnx,io-pit-1.02.a\0xlnx,io_pit";
interrupt-parent = <0xcb>;
interrupts = <0x06>;
reg = <0x00 0x1b070 0x0c>;
xlnx,pit-interrupt = <0x01>;
xlnx,pit-prescaler = <0x09>;
xlnx,pit-readable = <0x01>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x01>;
frequency = <0x1b6b0b00>;
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0xce>;
};
};
ddrmc_uart0@0 {
compatible = "xlnx,io_uart";
reg = <0x00 0x1b000 0x0c 0x1b04c 0x04>;
xlnx,use-uart-rx = <0x01>;
xlnx,use-uart-tx = <0x01>;
chardev = "ddrmc-uart0\0serial1";
phandle = <0x1d0>;
};
alias_npi_ddrmc_main {
compatible = "qemu:memory-region";
alias = <0xcf>;
reg = <0x00 0x00 0x00 0x8000 0x00>;
};
};
lmb_ddrmc@1 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x1d1>;
ddrmc1_ram_data@0x1c000 {
reg = <0x00 0x1c000 0x00 0x4000 0x01>;
compatible = "qemu:memory-region";
qemu,ram = <0x01>;
phandle = <0x1d2>;
};
ddrmc1_ram_instr@0x20000 {
reg = <0x00 0x20000 0x00 0x20000 0x01>;
compatible = "qemu:memory-region";
qemu,ram = <0x01>;
phandle = <0x1d3>;
};
ddrmc1_ram_exchange@0x08000 {
reg = <0x00 0x8000 0x00 0x8000 0x01>;
compatible = "qemu:memory-region";
qemu,ram = <0x01>;
phandle = <0x1d4>;
};
};
amba_rpu@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0xd0>;
downstream_amba {
compatible = "qemu:memory-region";
alias = <0x0d>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0x00>;
};
timer_a {
compatible = "arm,armv8-timer";
interrupt-parent = <0x02>;
interrupts = <0x01 0x0e 0x301 0x01 0x0b 0x301 0x01 0x0a 0x301>;
clock-frequency = <0x5f5e100>;
};
timer_b {
compatible = "arm,armv8-timer";
interrupt-parent = <0x03>;
interrupts = <0x01 0x0e 0x301 0x01 0x0b 0x301 0x01 0x0a 0x301>;
clock-frequency = <0x5f5e100>;
};
timer_c {
compatible = "arm,armv8-timer";
interrupt-parent = <0x04>;
interrupts = <0x01 0x0e 0x301 0x01 0x0b 0x301 0x01 0x0a 0x301>;
clock-frequency = <0x5f5e100>;
};
timer_d {
compatible = "arm,armv8-timer";
interrupt-parent = <0x05>;
interrupts = <0x01 0x0e 0x301 0x01 0x0b 0x301 0x01 0x0a 0x301>;
clock-frequency = <0x5f5e100>;
};
timer_e {
compatible = "arm,armv8-timer";
interrupt-parent = <0x06>;
interrupts = <0x01 0x0e 0x301 0x01 0x0b 0x301 0x01 0x0a 0x301>;
clock-frequency = <0x5f5e100>;
};
};
amba_r5@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0xe3>;
downstream_amba {
compatible = "qemu:memory-region";
alias = <0xd0>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0x00>;
};
downstream_tcm {
compatible = "qemu:memory-region";
alias = <0x35>;
reg = <0x00 0x00 0x00 0x400000 0x01>;
};
downstream_gic0 {
compatible = "qemu:memory-region";
alias = <0xd1>;
reg = <0x00 0xe2000000 0x00 0x140000 0x01>;
};
};
amba_r5@1 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0xe6>;
downstream_amba {
compatible = "qemu:memory-region";
alias = <0xd0>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0x00>;
};
downstream_tcm {
compatible = "qemu:memory-region";
alias = <0x37>;
reg = <0x00 0x00 0x00 0x400000 0x01>;
};
downstream_gic0 {
compatible = "qemu:memory-region";
alias = <0xd1>;
reg = <0x00 0xe2000000 0x00 0x140000 0x01>;
};
};
dummy1@0 {
doc-ignore = <0x01>;
interrupt-controller;
#interrupt-cells = <0x01>;
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0x96>;
};
tbu0_slave@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x17>;
};
tbu1_slave@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x5c>;
};
tbu2_slave@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x5d>;
};
tbu3_slave@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x5e>;
};
tbu4_slave@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x5f>;
};
tbu5_slave@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x60>;
};
tbu6_slave@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x61>;
};
memory@00000000 {
compatible = "qemu:memory-region";
device_type = "memory";
container = <0x0d>;
phandle = <0x102>;
};
memory@8_0000_0000 {
compatible = "qemu:memory-region";
device_type = "memory";
container = <0x0d>;
phandle = <0x103>;
};
memory@0x50000000000ULL {
compatible = "qemu:memory-region";
device_type = "memory";
container = <0x0d>;
phandle = <0x1d5>;
};
ocm_mem_bank_0@ {
compatible = "qemu:memory-region";
container = <0x0e>;
qemu,ram = <0x01>;
reg = <0x00 0x100000 0x00 0x80000 0x00>;
phandle = <0x1d6>;
};
ocm_mem_bank_1@ {
compatible = "qemu:memory-region";
container = <0x0e>;
qemu,ram = <0x01>;
reg = <0x00 0x180000 0x00 0x80000 0x00>;
phandle = <0x1d7>;
};
ocm_mem_bank_2@ {
compatible = "qemu:memory-region";
container = <0x0e>;
qemu,ram = <0x01>;
reg = <0x00 0x00 0x00 0x80000 0x00>;
phandle = <0x1d8>;
};
ocm_mem_bank_3@ {
compatible = "qemu:memory-region";
container = <0x0e>;
qemu,ram = <0x01>;
reg = <0x00 0x80000 0x00 0x80000 0x00>;
phandle = <0x1d9>;
};
xram_mem@0xbbe00000 {
compatible = "qemu:memory-region";
phandle = <0x1da>;
};
ipi_msgbuf@0 {
compatible = "qemu:memory-region";
device_type = "memory";
container = <0x0a>;
qemu,ram = <0x01>;
reg = <0x00 0xeb3f0000 0x00 0x1000 0x00>;
phandle = <0x1db>;
};
pmc_ram@0xf2000000 {
compatible = "qemu:memory-region";
phandle = <0x73>;
};
pmc_ram_bank_0@0x0 {
compatible = "qemu:memory-region";
container = <0x73>;
qemu,ram = <0x01>;
reg = <0x00 0x00 0x00 0x20000 0x00>;
phandle = <0x1dc>;
};
pmc_ppu1_ram@0xf0200000 {
compatible = "qemu:memory-region";
container = <0x0d>;
qemu,ram = <0x01>;
reg = <0x00 0xf0200000 0x00 0x80000 0x00>;
phandle = <0x1dd>;
};
pmc_ppu1_ram@0xf0280000 {
compatible = "qemu:memory-region";
container = <0x0d>;
qemu,ram = <0x01>;
reg = <0x00 0xf0280000 0x00 0x20000 0x00>;
phandle = <0x1de>;
};
ppu0_mdm_uart@0xf0110000 {
doc-status = "complete";
compatible = "xlnx,xps-uartlite";
reg-extended = <0xa1 0x00 0xf0110000 0x00 0x10 0x01>;
chardev = "serial0";
};
ppu1_mdm_uart@0xf0310000 {
doc-status = "complete";
compatible = "xlnx,xps-uartlite";
reg-extended = <0xc4 0x00 0xf0310000 0x00 0x10 0x01>;
chardev = "serial1";
};
lqspi_mr@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x80>;
};
lospi_mr@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x82>;
};
cpus {
#address-cells = <0x01>;
#size-cells = <0x00>;
apu_cpu@0 {
compatible = "cortex-a78-arm-cpu";
device_type = "cpu";
arm,ccsidr0 = <0x701fe00a>;
arm,ccsidr1 = <0x201fe012>;
reg = <0x00>;
core-count = <0x02>;
arm,reset-hivecs = <0x01>;
arm,rvbar = <0xffff0000>;
arm,reset-cbar = <0xe2060000>;
mr = <0xd2>;
memory = <0xd2>;
qemu,halt = <0x01>;
gdb-id = "Cortex-A78 0";
#interrupt-cells = <0x01>;
memattr_s = <0xd3>;
memattr_ns = <0xd4>;
reset-gpios = <0x52 0x00>;
gpios = <0x1b 0x40>;
gpio-names = "wfi";
power-gpios = <0x1b 0x00>;
mp-affinity = <0x1000000>;
generic-timer-frequency = <0x298100>;
phandle = <0x53>;
};
apu_cpu@1 {
compatible = "cortex-a78-arm-cpu";
device_type = "cpu";
arm,ccsidr0 = <0x701fe00a>;
arm,ccsidr1 = <0x201fe012>;
reg = <0x01>;
core-count = <0x02>;
arm,reset-hivecs = <0x01>;
arm,rvbar = <0xffff0000>;
arm,reset-cbar = <0xe2060000>;
mr = <0xd2>;
memory = <0xd2>;
qemu,halt = <0x01>;
gdb-id = "Cortex-A78 1";
#interrupt-cells = <0x01>;
direct-lnx-start-powered-off = <0x01>;
start-powered-off = <0x00>;
memattr_s = <0xd5>;
memattr_ns = <0xd6>;
reset-gpios = <0x52 0x01>;
gpios = <0x1b 0x41>;
gpio-names = "wfi";
power-gpios = <0x1b 0x01>;
mp-affinity = <0x1000100>;
generic-timer-frequency = <0x298100>;
phandle = <0x54>;
};
apu_cpu@2 {
compatible = "cortex-a78-arm-cpu";
device_type = "cpu";
arm,ccsidr0 = <0x701fe00a>;
arm,ccsidr1 = <0x201fe012>;
reg = <0x02>;
core-count = <0x02>;
arm,reset-hivecs = <0x01>;
arm,rvbar = <0xffff0000>;
arm,reset-cbar = <0xe2060000>;
mr = <0xd2>;
memory = <0xd2>;
qemu,halt = <0x01>;
gdb-id = "Cortex-A78 2";
#interrupt-cells = <0x01>;
direct-lnx-start-powered-off = <0x01>;
start-powered-off = <0x00>;
memattr_s = <0xd7>;
memattr_ns = <0xd8>;
reset-gpios = <0x52 0x04>;
gpios = <0x1b 0x42>;
gpio-names = "wfi";
power-gpios = <0x1b 0x02>;
mp-affinity = <0x1010000>;
generic-timer-frequency = <0x298100>;
phandle = <0x56>;
};
apu_cpu@3 {
compatible = "cortex-a78-arm-cpu";
device_type = "cpu";
arm,ccsidr0 = <0x701fe00a>;
arm,ccsidr1 = <0x201fe012>;
reg = <0x03>;
core-count = <0x02>;
arm,reset-hivecs = <0x01>;
arm,rvbar = <0xffff0000>;
arm,reset-cbar = <0xe2060000>;
mr = <0xd2>;
memory = <0xd2>;
qemu,halt = <0x01>;
gdb-id = "Cortex-A78 3";
#interrupt-cells = <0x01>;
direct-lnx-start-powered-off = <0x01>;
start-powered-off = <0x00>;
memattr_s = <0xd9>;
memattr_ns = <0xda>;
reset-gpios = <0x52 0x05>;
gpios = <0x1b 0x43>;
gpio-names = "wfi";
power-gpios = <0x1b 0x03>;
mp-affinity = <0x1010100>;
generic-timer-frequency = <0x298100>;
phandle = <0x57>;
};
apu_cpu@4 {
compatible = "cortex-a78-arm-cpu";
device_type = "cpu";
arm,ccsidr0 = <0x701fe00a>;
arm,ccsidr1 = <0x201fe012>;
reg = <0x04>;
core-count = <0x02>;
arm,reset-hivecs = <0x01>;
arm,rvbar = <0xffff0000>;
arm,reset-cbar = <0xe2060000>;
mr = <0xd2>;
memory = <0xd2>;
qemu,halt = <0x01>;
gdb-id = "Cortex-A78 4";
#interrupt-cells = <0x01>;
direct-lnx-start-powered-off = <0x01>;
start-powered-off = <0x00>;
memattr_s = <0xdb>;
memattr_ns = <0xdc>;
reset-gpios = <0x52 0x08>;
gpios = <0x1b 0x44>;
gpio-names = "wfi";
power-gpios = <0x1b 0x04>;
mp-affinity = <0x1020000>;
generic-timer-frequency = <0x298100>;
phandle = <0x58>;
};
apu_cpu@5 {
compatible = "cortex-a78-arm-cpu";
device_type = "cpu";
arm,ccsidr0 = <0x701fe00a>;
arm,ccsidr1 = <0x201fe012>;
reg = <0x05>;
core-count = <0x02>;
arm,reset-hivecs = <0x01>;
arm,rvbar = <0xffff0000>;
arm,reset-cbar = <0xe2060000>;
mr = <0xd2>;
memory = <0xd2>;
qemu,halt = <0x01>;
gdb-id = "Cortex-A78 5";
#interrupt-cells = <0x01>;
direct-lnx-start-powered-off = <0x01>;
start-powered-off = <0x00>;
memattr_s = <0xdd>;
memattr_ns = <0xde>;
reset-gpios = <0x52 0x09>;
gpios = <0x1b 0x45>;
gpio-names = "wfi";
power-gpios = <0x1b 0x05>;
mp-affinity = <0x1020100>;
generic-timer-frequency = <0x298100>;
phandle = <0x59>;
};
apu_cpu@6 {
compatible = "cortex-a78-arm-cpu";
device_type = "cpu";
arm,ccsidr0 = <0x701fe00a>;
arm,ccsidr1 = <0x201fe012>;
reg = <0x06>;
core-count = <0x02>;
arm,reset-hivecs = <0x01>;
arm,rvbar = <0xffff0000>;
arm,reset-cbar = <0xe2060000>;
mr = <0xd2>;
memory = <0xd2>;
qemu,halt = <0x01>;
gdb-id = "Cortex-A78 6";
#interrupt-cells = <0x01>;
direct-lnx-start-powered-off = <0x01>;
start-powered-off = <0x00>;
memattr_s = <0xdf>;
memattr_ns = <0xe0>;
reset-gpios = <0x52 0x0c>;
gpios = <0x1b 0x46>;
gpio-names = "wfi";
power-gpios = <0x1b 0x06>;
mp-affinity = <0x1030000>;
generic-timer-frequency = <0x298100>;
phandle = <0x5a>;
};
apu_cpu@7 {
compatible = "cortex-a78-arm-cpu";
device_type = "cpu";
arm,ccsidr0 = <0x701fe00a>;
arm,ccsidr1 = <0x201fe012>;
reg = <0x07>;
core-count = <0x02>;
arm,reset-hivecs = <0x01>;
arm,rvbar = <0xffff0000>;
arm,reset-cbar = <0xe2060000>;
mr = <0xd2>;
memory = <0xd2>;
qemu,halt = <0x01>;
gdb-id = "Cortex-A78 7";
#interrupt-cells = <0x01>;
direct-lnx-start-powered-off = <0x01>;
start-powered-off = <0x00>;
memattr_s = <0xe1>;
memattr_ns = <0xe2>;
reset-gpios = <0x52 0x0d>;
gpios = <0x1b 0x47>;
gpio-names = "wfi";
power-gpios = <0x1b 0x07>;
mp-affinity = <0x1030100>;
generic-timer-frequency = <0x298100>;
phandle = <0x5b>;
};
rpu_a@0 {
#address-cells = <0x01>;
#size-cells = <0x00>;
phandle = <0x1df>;
rpu_cpu_a@0 {
compatible = "cortex-r52-arm-cpu";
device_type = "cpu";
arm,tcmtr = <0x10001>;
arm,ctr = <0x8003c003>;
arm,clidr = <0x9200003>;
arm,ccsidr0 = <0xf01fe019>;
arm,ccsidr1 = <0xf01fe019>;
arm,mp-affinity = <0x00>;
arm,id_pfr0 = <0x131>;
arm,reset-hivecs = <0x01>;
#interrupt-cells = <0x01>;
memory = <0xe3>;
qemu,halt = <0x01>;
memattr_ns = <0xe4>;
core-count = <0x02>;
gdb-id = "Cortex-R52 #a0";
gpios = <0x1a 0x23 0xe5 0x00 0x1b 0x48>;
gpio-names = "reset\0halt\0wfi";
reset-cbar = <0xe2000000>;
power-gpios = <0x1b 0x08>;
phandle = <0x2a>;
};
rpu_cpu_a@1 {
compatible = "cortex-r52-arm-cpu";
device_type = "cpu";
arm,tcmtr = <0x10001>;
arm,ctr = <0x8003c003>;
arm,clidr = <0x9200003>;
arm,ccsidr0 = <0xf01fe019>;
arm,ccsidr1 = <0xf01fe019>;
arm,mp-affinity = <0x01>;
arm,id_pfr0 = <0x131>;
arm,reset-hivecs = <0x01>;
#interrupt-cells = <0x01>;
memory = <0xe6>;
qemu,halt = <0x01>;
memattr_ns = <0xe7>;
core-count = <0x02>;
gdb-id = "Cortex-R52 #a1";
gpios = <0x1a 0x24 0xe8 0x00 0x1b 0x49>;
gpio-names = "reset\0halt\0wfi";
reset-cbar = <0xe2000000>;
power-gpios = <0x1b 0x09>;
phandle = <0x2b>;
};
};
rpu_b@0 {
#address-cells = <0x01>;
#size-cells = <0x00>;
phandle = <0x1e0>;
rpu_cpu_b@0 {
compatible = "cortex-r52-arm-cpu";
device_type = "cpu";
arm,tcmtr = <0x10001>;
arm,ctr = <0x8003c003>;
arm,clidr = <0x9200003>;
arm,ccsidr0 = <0xf01fe019>;
arm,ccsidr1 = <0xf01fe019>;
arm,mp-affinity = <0x100>;
arm,id_pfr0 = <0x131>;
arm,reset-hivecs = <0x01>;
#interrupt-cells = <0x01>;
memory = <0xe9>;
qemu,halt = <0x01>;
memattr_ns = <0xea>;
core-count = <0x02>;
gdb-id = "Cortex-R52 #b0";
gpios = <0x1a 0x25 0xeb 0x00 0x1b 0x4a>;
gpio-names = "reset\0halt\0wfi";
reset-cbar = <0xe2000000>;
power-gpios = <0x1b 0x0a>;
phandle = <0x2c>;
};
rpu_cpu_b@1 {
compatible = "cortex-r52-arm-cpu";
device_type = "cpu";
arm,tcmtr = <0x10001>;
arm,ctr = <0x8003c003>;
arm,clidr = <0x9200003>;
arm,ccsidr0 = <0xf01fe019>;
arm,ccsidr1 = <0xf01fe019>;
arm,mp-affinity = <0x101>;
arm,id_pfr0 = <0x131>;
arm,reset-hivecs = <0x01>;
#interrupt-cells = <0x01>;
memory = <0xec>;
qemu,halt = <0x01>;
memattr_ns = <0xed>;
core-count = <0x02>;
gdb-id = "Cortex-R52 #b1";
gpios = <0x1a 0x26 0xee 0x00 0x1b 0x4b>;
gpio-names = "reset\0halt\0wfi";
reset-cbar = <0xe2000000>;
power-gpios = <0x1b 0x0b>;
phandle = <0x2d>;
};
};
rpu_c@0 {
#address-cells = <0x01>;
#size-cells = <0x00>;
phandle = <0x1e1>;
rpu_cpu_c@0 {
compatible = "cortex-r52-arm-cpu";
device_type = "cpu";
arm,tcmtr = <0x10001>;
arm,ctr = <0x8003c003>;
arm,clidr = <0x9200003>;
arm,ccsidr0 = <0xf01fe019>;
arm,ccsidr1 = <0xf01fe019>;
arm,mp-affinity = <0x200>;
arm,id_pfr0 = <0x131>;
arm,reset-hivecs = <0x01>;
#interrupt-cells = <0x01>;
memory = <0xef>;
qemu,halt = <0x01>;
memattr_ns = <0xf0>;
core-count = <0x02>;
gdb-id = "Cortex-R52 #c0";
gpios = <0x1a 0x27 0xf1 0x00 0x1b 0x4c>;
gpio-names = "reset\0halt\0wfi";
reset-cbar = <0xe2000000>;
power-gpios = <0x1b 0x0c>;
phandle = <0x2e>;
};
rpu_cpu_c@1 {
compatible = "cortex-r52-arm-cpu";
device_type = "cpu";
arm,tcmtr = <0x10001>;
arm,ctr = <0x8003c003>;
arm,clidr = <0x9200003>;
arm,ccsidr0 = <0xf01fe019>;
arm,ccsidr1 = <0xf01fe019>;
arm,mp-affinity = <0x201>;
arm,id_pfr0 = <0x131>;
arm,reset-hivecs = <0x01>;
#interrupt-cells = <0x01>;
memory = <0xf2>;
qemu,halt = <0x01>;
memattr_ns = <0xf3>;
core-count = <0x02>;
gdb-id = "Cortex-R52 #c1";
gpios = <0x1a 0x28 0xf4 0x00 0x1b 0x4d>;
gpio-names = "reset\0halt\0wfi";
reset-cbar = <0xe2000000>;
power-gpios = <0x1b 0x0d>;
phandle = <0x2f>;
};
};
rpu_d@0 {
#address-cells = <0x01>;
#size-cells = <0x00>;
phandle = <0x1e2>;
rpu_cpu_d@0 {
compatible = "cortex-r52-arm-cpu";
device_type = "cpu";
arm,tcmtr = <0x10001>;
arm,ctr = <0x8003c003>;
arm,clidr = <0x9200003>;
arm,ccsidr0 = <0xf01fe019>;
arm,ccsidr1 = <0xf01fe019>;
arm,mp-affinity = <0x300>;
arm,id_pfr0 = <0x131>;
arm,reset-hivecs = <0x01>;
#interrupt-cells = <0x01>;
memory = <0xf5>;
qemu,halt = <0x01>;
memattr_ns = <0xf6>;
core-count = <0x02>;
gdb-id = "Cortex-R52 #d0";
gpios = <0x1a 0x29 0xf7 0x00 0x1b 0x4e>;
gpio-names = "reset\0halt\0wfi";
reset-cbar = <0xe2000000>;
power-gpios = <0x1b 0x0e>;
phandle = <0x30>;
};
rpu_cpu_d@1 {
compatible = "cortex-r52-arm-cpu";
device_type = "cpu";
arm,tcmtr = <0x10001>;
arm,ctr = <0x8003c003>;
arm,clidr = <0x9200003>;
arm,ccsidr0 = <0xf01fe019>;
arm,ccsidr1 = <0xf01fe019>;
arm,mp-affinity = <0x301>;
arm,id_pfr0 = <0x131>;
arm,reset-hivecs = <0x01>;
#interrupt-cells = <0x01>;
memory = <0xf8>;
qemu,halt = <0x01>;
memattr_ns = <0xf9>;
core-count = <0x02>;
gdb-id = "Cortex-R52 #d1";
gpios = <0x1a 0x2a 0xfa 0x00 0x1b 0x4f>;
gpio-names = "reset\0halt\0wfi";
reset-cbar = <0xe2000000>;
power-gpios = <0x1b 0x0f>;
phandle = <0x31>;
};
};
rpu_e@0 {
#address-cells = <0x01>;
#size-cells = <0x00>;
phandle = <0x1e3>;
rpu_cpu_e@0 {
compatible = "cortex-r52-arm-cpu";
device_type = "cpu";
arm,tcmtr = <0x10001>;
arm,ctr = <0x8003c003>;
arm,clidr = <0x9200003>;
arm,ccsidr0 = <0xf01fe019>;
arm,ccsidr1 = <0xf01fe019>;
arm,mp-affinity = <0x400>;
arm,id_pfr0 = <0x131>;
arm,reset-hivecs = <0x01>;
#interrupt-cells = <0x01>;
memory = <0xfb>;
qemu,halt = <0x01>;
memattr_ns = <0xfc>;
core-count = <0x02>;
gdb-id = "Cortex-R52 #e0";
gpios = <0x1a 0x2b 0xfd 0x00 0x1b 0x50>;
gpio-names = "reset\0halt\0wfi";
reset-cbar = <0xe2000000>;
power-gpios = <0x1b 0x10>;
phandle = <0x32>;
};
rpu_cpu_e@1 {
compatible = "cortex-r52-arm-cpu";
device_type = "cpu";
arm,tcmtr = <0x10001>;
arm,ctr = <0x8003c003>;
arm,clidr = <0x9200003>;
arm,ccsidr0 = <0xf01fe019>;
arm,ccsidr1 = <0xf01fe019>;
arm,mp-affinity = <0x401>;
arm,id_pfr0 = <0x131>;
arm,reset-hivecs = <0x01>;
#interrupt-cells = <0x01>;
memory = <0xfe>;
qemu,halt = <0x01>;
memattr_ns = <0xff>;
core-count = <0x02>;
gdb-id = "Cortex-R52 #e1";
gpios = <0x1a 0x2c 0x100 0x00 0x1b 0x51>;
gpio-names = "reset\0halt\0wfi";
reset-cbar = <0xe2000000>;
power-gpios = <0x1b 0x11>;
phandle = <0x33>;
};
};
};
amba_apu@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0xd2>;
downstream_amba {
compatible = "qemu:memory-region";
alias = <0x0d>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0xffffffff>;
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <0x01>;
interrupts = <0x1000001 0x0d 0xffffff01 0x1000001 0x0e 0xffffff01 0x1000001
0x0b 0xffffff01 0x1000001 0x0a 0xffffff01>;
clock-frequency = <0x5f5e100>;
phandle = <0x1e4>;
};
};
amba_apu_gic@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
container = <0x0b>;
priority = <0xffffffff>;
phandle = <0x1e5>;
interrupt-controller@0xe2000000 {
#address-cells = <0x00>;
#size-cells = <0x00>;
#interrupt-cells = <0x03>;
compatible = "arm-gicv3";
reg = <0x00 0xe2000000 0x00 0x10000 0x00 0x00 0xe2060000
0x00 0x400000 0x00>;
interrupt-controller;
interrupts-extended = <0x53 0x00 0x54 0x00 0x56 0x00 0x57 0x00 0x58 0x00
0x59 0x00 0x5a 0x00 0x5b 0x00 0x53 0x01 0x54 0x01 0x56 0x01 0x57 0x01 0x58 0x01 0x59 0x01 0x5a
0x01 0x5b 0x01 0x53 0x02 0x54 0x02 0x56 0x02 0x57 0x02 0x58 0x02 0x59 0x02 0x5a 0x02 0x5b 0x02
0x53 0x03 0x54 0x03 0x56 0x03 0x57 0x03 0x58 0x03 0x59 0x03 0x5a 0x03 0x5b 0x03 0x01 0x01 0x09
0x104 0x01 0x01 0x09 0x204 0x01 0x01 0x09 0x404 0x01 0x01 0x09 0x804 0x01 0x01 0x09 0x1004
0x01 0x01 0x09 0x2004 0x01 0x01 0x09 0x4004 0x01 0x01 0x09 0x8004>;
num-cpu = <0x08>;
num-irq = <0x220>;
has-security-extensions = <0x01>;
redist-region-count = <0x08>;
has-lpi = <0x01>;
sysmem = <0x0d>;
phandle = <0x01>;
};
git_its@0xe2040000 {
compatible = "arm-gicv3-its";
reg = <0x00 0xe2040000 0x00 0x20000 0x00>;
parent-gicv3 = <0x01>;
};
};
lpd_reset_domain@0 {
compatible = "qemu,reset-domain";
mr0 = <0x0a>;
reset-gpios = <0x7e 0x07 0x7e 0x0a>;
};
fpd_reset_domain@0 {
compatible = "qemu,reset-domain";
mr0 = <0x0b>;
reset-gpios = <0x7e 0x07 0x7e 0x0a 0x1a 0x1c 0x1a 0x1d>;
};
amba_alias@0 {
compatible = "qemu:memory-region";
container = <0x101>;
alias = <0x0d>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0x01>;
phandle = <0x1e6>;
};
qemu_sysmem@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "qemu:system-memory";
phandle = <0x101>;
};
dummy_ppu0@0 {
#interrupt-cells = <0x01>;
phandle = <0xc0>;
};
dummy_ppu1@0 {
#interrupt-cells = <0x01>;
phandle = <0xc5>;
};
dummy_ddrmc0@0 {
#interrupt-cells = <0x01>;
phandle = <0xca>;
};
dummy_ddrmc1@0 {
#interrupt-cells = <0x01>;
phandle = <0x1e7>;
};
ddr@0x00000000 {
compatible = "qemu:memory-region";
container = <0x102>;
qemu,ram = <0x01>;
reg = <0x00 0x00 0x00 0x80000000 0x00>;
phandle = <0xa2>;
};
ddr_2@0x800000000ULL {
compatible = "qemu:memory-region-spec";
container = <0x103>;
qemu,ram = <0x01>;
reg = <0x08 0x00 0x08 0x00 0x00>;
phandle = <0x1e8>;
};
mdio {
#address-cells = <0x01>;
#size-cells = <0x00>;
#priority-cells = <0x00>;
compatible = "mdio";
phandle = <0x1c>;
phy@1 {
compatible = "dp83867";
device_type = "ethernet-phy";
reg = <0x01>;
phandle = <0x1e9>;
};
phy@2 {
compatible = "88e1118r";
device_type = "ethernet-phy";
reg = <0x02>;
phandle = <0x1ea>;
};
};
cpu_dummy {
phandle = <0x55>;
};
tbu7_slave@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x62>;
};
tbu8_slave@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x63>;
};
tbu9_slave@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x64>;
};
tbu10_slave@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x65>;
};
tbu11_slave@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x66>;
};
tbu12_slave@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x67>;
};
mr_rpu_gic_a@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
phandle = <0xd1>;
rpu_gic_a@0x0 {
#address-cells = <0x00>;
#size-cells = <0x00>;
#interrupt-cells = <0x03>;
compatible = "arm-gicv3";
reg = <0x00 0x00 0x00 0x10000 0x00 0x00 0x100000 0x00 0x40000 0x00>;
interrupt-controller;
interrupts-extended = <0x2a 0x00 0x2b 0x00 0x2a 0x01 0x2b 0x01 0x2a 0x02
0x2b 0x02 0x2a 0x03 0x2b 0x03 0x02 0x01 0x09 0x104 0x02 0x01 0x09 0x204>;
first-cpu-idx = <0x08>;
num-cpu = <0x02>;
num-irq = <0x120>;
redist-region-count = <0x02>;
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0x02>;
};
};
mr_rpu_gic_b@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
phandle = <0x104>;
rpu_gic_b@0x0 {
#address-cells = <0x00>;
#size-cells = <0x00>;
#interrupt-cells = <0x03>;
compatible = "arm-gicv3";
reg = <0x00 0x00 0x00 0x10000 0x00 0x00 0x100000 0x00 0x40000 0x00>;
interrupt-controller;
interrupts-extended = <0x2c 0x00 0x2d 0x00 0x2c 0x01 0x2d 0x01 0x2c 0x02
0x2d 0x02 0x2c 0x03 0x2d 0x03 0x03 0x01 0x09 0x104 0x03 0x01 0x09 0x204>;
first-cpu-idx = <0x0a>;
num-cpu = <0x02>;
num-irq = <0x120>;
redist-region-count = <0x02>;
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0x03>;
};
};
mr_rpu_gic_c@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
phandle = <0x105>;
rpu_gic_c@0x0 {
#address-cells = <0x00>;
#size-cells = <0x00>;
#interrupt-cells = <0x03>;
compatible = "arm-gicv3";
reg = <0x00 0x00 0x00 0x10000 0x00 0x00 0x100000 0x00 0x40000 0x00>;
interrupt-controller;
interrupts-extended = <0x2e 0x00 0x2f 0x00 0x2e 0x01 0x2f 0x01 0x2e 0x02
0x2f 0x02 0x2e 0x03 0x2f 0x03 0x04 0x01 0x09 0x104 0x04 0x01 0x09 0x204>;
first-cpu-idx = <0x0c>;
num-cpu = <0x02>;
num-irq = <0x120>;
redist-region-count = <0x02>;
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0x04>;
};
};
mr_rpu_gic_d@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
phandle = <0x106>;
rpu_gic_d@0x0 {
#address-cells = <0x00>;
#size-cells = <0x00>;
#interrupt-cells = <0x03>;
compatible = "arm-gicv3";
reg = <0x00 0x00 0x00 0x10000 0x00 0x00 0x100000 0x00 0x40000 0x00>;
interrupt-controller;
interrupts-extended = <0x30 0x00 0x31 0x00 0x30 0x01 0x31 0x01 0x30 0x02
0x31 0x02 0x30 0x03 0x31 0x03 0x05 0x01 0x09 0x104 0x05 0x01 0x09 0x204>;
first-cpu-idx = <0x0e>;
num-cpu = <0x02>;
num-irq = <0x120>;
redist-region-count = <0x02>;
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0x05>;
};
};
mr_rpu_gic_e@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
phandle = <0x107>;
rpu_gic_e@0x0 {
#address-cells = <0x00>;
#size-cells = <0x00>;
#interrupt-cells = <0x03>;
compatible = "arm-gicv3";
reg = <0x00 0x00 0x00 0x10000 0x00 0x00 0x100000 0x00 0x40000 0x00>;
interrupt-controller;
interrupts-extended = <0x32 0x00 0x33 0x00 0x32 0x01 0x33 0x01 0x32 0x02
0x33 0x02 0x32 0x03 0x33 0x03 0x06 0x01 0x09 0x104 0x06 0x01 0x09 0x204>;
first-cpu-idx = <0x10>;
num-cpu = <0x02>;
num-irq = <0x120>;
redist-region-count = <0x02>;
gpio-controller;
#gpio-cells = <0x01>;
phandle = <0x06>;
};
};
tcm_core@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "qemu:memory-region";
phandle = <0x35>;
atcm_rpu_core0@0x00000 {
compatible = "qemu:memory-region";
container = <0x35>;
qemu,ram = <0x01>;
reg = <0x00 0x00 0x00 0x10000 0x00>;
phandle = <0x1eb>;
};
btcm_rpu_core0@0x00000 {
compatible = "qemu:memory-region";
container = <0x35>;
qemu,ram = <0x01>;
reg = <0x00 0x10000 0x00 0x10000 0x00>;
phandle = <0x1ec>;
};
ctcm_rpu_core0@0x00000 {
compatible = "qemu:memory-region";
container = <0x35>;
qemu,ram = <0x01>;
reg = <0x00 0x20000 0x00 0x10000 0x00>;
phandle = <0x1ed>;
};
};
tcm_core@1 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "qemu:memory-region";
phandle = <0x37>;
atcm_rpu_core1@0x00000 {
compatible = "qemu:memory-region";
container = <0x37>;
qemu,ram = <0x01>;
reg = <0x00 0x00 0x00 0x10000 0x00>;
phandle = <0x1ee>;
};
btcm_rpu_core1@0x00000 {
compatible = "qemu:memory-region";
container = <0x37>;
qemu,ram = <0x01>;
reg = <0x00 0x10000 0x00 0x10000 0x00>;
phandle = <0x1ef>;
};
ctcm_rpu_core1@0x00000 {
compatible = "qemu:memory-region";
container = <0x37>;
qemu,ram = <0x01>;
reg = <0x00 0x20000 0x00 0x10000 0x00>;
phandle = <0x1f0>;
};
};
tcm_core@2 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "qemu:memory-region";
phandle = <0x39>;
atcm_rpu_core2@0x00000 {
compatible = "qemu:memory-region";
container = <0x39>;
qemu,ram = <0x01>;
reg = <0x00 0x00 0x00 0x10000 0x00>;
phandle = <0x1f1>;
};
btcm_rpu_core2@0x00000 {
compatible = "qemu:memory-region";
container = <0x39>;
qemu,ram = <0x01>;
reg = <0x00 0x10000 0x00 0x10000 0x00>;
phandle = <0x1f2>;
};
ctcm_rpu_core2@0x00000 {
compatible = "qemu:memory-region";
container = <0x39>;
qemu,ram = <0x01>;
reg = <0x00 0x20000 0x00 0x10000 0x00>;
phandle = <0x1f3>;
};
};
tcm_core@3 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "qemu:memory-region";
phandle = <0x3b>;
atcm_rpu_core3@0x00000 {
compatible = "qemu:memory-region";
container = <0x3b>;
qemu,ram = <0x01>;
reg = <0x00 0x00 0x00 0x10000 0x00>;
phandle = <0x1f4>;
};
btcm_rpu_core3@0x00000 {
compatible = "qemu:memory-region";
container = <0x3b>;
qemu,ram = <0x01>;
reg = <0x00 0x10000 0x00 0x10000 0x00>;
phandle = <0x1f5>;
};
ctcm_rpu_core3@0x00000 {
compatible = "qemu:memory-region";
container = <0x3b>;
qemu,ram = <0x01>;
reg = <0x00 0x20000 0x00 0x10000 0x00>;
phandle = <0x1f6>;
};
};
tcm_core@4 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "qemu:memory-region";
phandle = <0x3d>;
atcm_rpu_core4@0x00000 {
compatible = "qemu:memory-region";
container = <0x3d>;
qemu,ram = <0x01>;
reg = <0x00 0x00 0x00 0x10000 0x00>;
phandle = <0x1f7>;
};
btcm_rpu_core4@0x00000 {
compatible = "qemu:memory-region";
container = <0x3d>;
qemu,ram = <0x01>;
reg = <0x00 0x10000 0x00 0x10000 0x00>;
phandle = <0x1f8>;
};
ctcm_rpu_core4@0x00000 {
compatible = "qemu:memory-region";
container = <0x3d>;
qemu,ram = <0x01>;
reg = <0x00 0x20000 0x00 0x10000 0x00>;
phandle = <0x1f9>;
};
};
tcm_core@5 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "qemu:memory-region";
phandle = <0x3f>;
atcm_rpu_core5@0x00000 {
compatible = "qemu:memory-region";
container = <0x3f>;
qemu,ram = <0x01>;
reg = <0x00 0x00 0x00 0x10000 0x00>;
phandle = <0x1fa>;
};
btcm_rpu_core5@0x00000 {
compatible = "qemu:memory-region";
container = <0x3f>;
qemu,ram = <0x01>;
reg = <0x00 0x10000 0x00 0x10000 0x00>;
phandle = <0x1fb>;
};
ctcm_rpu_core5@0x00000 {
compatible = "qemu:memory-region";
container = <0x3f>;
qemu,ram = <0x01>;
reg = <0x00 0x20000 0x00 0x10000 0x00>;
phandle = <0x1fc>;
};
};
tcm_core@6 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "qemu:memory-region";
phandle = <0x41>;
atcm_rpu_core6@0x00000 {
compatible = "qemu:memory-region";
container = <0x41>;
qemu,ram = <0x01>;
reg = <0x00 0x00 0x00 0x10000 0x00>;
phandle = <0x1fd>;
};
btcm_rpu_core6@0x00000 {
compatible = "qemu:memory-region";
container = <0x41>;
qemu,ram = <0x01>;
reg = <0x00 0x10000 0x00 0x10000 0x00>;
phandle = <0x1fe>;
};
ctcm_rpu_core6@0x00000 {
compatible = "qemu:memory-region";
container = <0x41>;
qemu,ram = <0x01>;
reg = <0x00 0x20000 0x00 0x10000 0x00>;
phandle = <0x1ff>;
};
};
tcm_core@7 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "qemu:memory-region";
phandle = <0x43>;
atcm_rpu_core7@0x00000 {
compatible = "qemu:memory-region";
container = <0x43>;
qemu,ram = <0x01>;
reg = <0x00 0x00 0x00 0x10000 0x00>;
phandle = <0x200>;
};
btcm_rpu_core7@0x00000 {
compatible = "qemu:memory-region";
container = <0x43>;
qemu,ram = <0x01>;
reg = <0x00 0x10000 0x00 0x10000 0x00>;
phandle = <0x201>;
};
ctcm_rpu_core7@0x00000 {
compatible = "qemu:memory-region";
container = <0x43>;
qemu,ram = <0x01>;
reg = <0x00 0x20000 0x00 0x10000 0x00>;
phandle = <0x202>;
};
};
tcm_core@8 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "qemu:memory-region";
phandle = <0x45>;
atcm_rpu_core8@0x00000 {
compatible = "qemu:memory-region";
container = <0x45>;
qemu,ram = <0x01>;
reg = <0x00 0x00 0x00 0x10000 0x00>;
phandle = <0x203>;
};
btcm_rpu_core8@0x00000 {
compatible = "qemu:memory-region";
container = <0x45>;
qemu,ram = <0x01>;
reg = <0x00 0x10000 0x00 0x10000 0x00>;
phandle = <0x204>;
};
ctcm_rpu_core8@0x00000 {
compatible = "qemu:memory-region";
container = <0x45>;
qemu,ram = <0x01>;
reg = <0x00 0x20000 0x00 0x10000 0x00>;
phandle = <0x205>;
};
};
tcm_core@9 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "qemu:memory-region";
phandle = <0x47>;
atcm_rpu_core9@0x00000 {
compatible = "qemu:memory-region";
container = <0x47>;
qemu,ram = <0x01>;
reg = <0x00 0x00 0x00 0x10000 0x00>;
phandle = <0x206>;
};
btcm_rpu_core9@0x00000 {
compatible = "qemu:memory-region";
container = <0x47>;
qemu,ram = <0x01>;
reg = <0x00 0x10000 0x00 0x10000 0x00>;
phandle = <0x207>;
};
ctcm_rpu_core9@0x00000 {
compatible = "qemu:memory-region";
container = <0x47>;
qemu,ram = <0x01>;
reg = <0x00 0x20000 0x00 0x10000 0x00>;
phandle = <0x208>;
};
};
tcm_cluster_a@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "qemu:memory-region";
phandle = <0x0f>;
tcm_core_0 {
compatible = "qemu:memory-region";
alias = <0x35>;
reg = <0x00 0x00 0x00 0x40000 0x00>;
};
tcm_core_1 {
compatible = "qemu:memory-region";
alias = <0x37>;
reg = <0x00 0x40000 0x00 0x40000 0x00>;
};
};
tcm_cluster_b@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "qemu:memory-region";
phandle = <0x10>;
tcm_core_0 {
compatible = "qemu:memory-region";
alias = <0x39>;
reg = <0x00 0x00 0x00 0x40000 0x00>;
};
tcm_core_1 {
compatible = "qemu:memory-region";
alias = <0x3b>;
reg = <0x00 0x40000 0x00 0x40000 0x00>;
};
};
tcm_cluster_c@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "qemu:memory-region";
phandle = <0x11>;
tcm_core_0 {
compatible = "qemu:memory-region";
alias = <0x3d>;
reg = <0x00 0x00 0x00 0x40000 0x00>;
};
tcm_core_1 {
compatible = "qemu:memory-region";
alias = <0x3f>;
reg = <0x00 0x40000 0x00 0x40000 0x00>;
};
};
tcm_cluster_d@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "qemu:memory-region";
phandle = <0x12>;
tcm_core_0 {
compatible = "qemu:memory-region";
alias = <0x41>;
reg = <0x00 0x00 0x00 0x40000 0x00>;
};
tcm_core_1 {
compatible = "qemu:memory-region";
alias = <0x43>;
reg = <0x00 0x40000 0x00 0x40000 0x00>;
};
};
tcm_cluster_e@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "qemu:memory-region";
phandle = <0x13>;
tcm_core_0 {
compatible = "qemu:memory-region";
alias = <0x45>;
reg = <0x00 0x00 0x00 0x40000 0x00>;
};
tcm_core_1 {
compatible = "qemu:memory-region";
alias = <0x47>;
reg = <0x00 0x40000 0x00 0x40000 0x00>;
};
};
amba_r5@2 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0xe9>;
downstream_tcm {
compatible = "qemu:memory-region";
alias = <0x39>;
reg = <0x00 0x00 0x00 0x400000 0x01>;
};
downstream_gic1 {
compatible = "qemu:memory-region";
alias = <0x104>;
reg = <0x00 0xe2000000 0x00 0x140000 0x01>;
};
downstream_amba {
compatible = "qemu:memory-region";
alias = <0xd0>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0x00>;
};
};
amba_r5@3 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0xec>;
downstream_tcm {
compatible = "qemu:memory-region";
alias = <0x3b>;
reg = <0x00 0x00 0x00 0x400000 0x01>;
};
downstream_gic1 {
compatible = "qemu:memory-region";
alias = <0x104>;
reg = <0x00 0xe2000000 0x00 0x140000 0x01>;
};
downstream_amba {
compatible = "qemu:memory-region";
alias = <0xd0>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0x00>;
};
};
amba_r5@4 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0xef>;
downstream_tcm {
compatible = "qemu:memory-region";
alias = <0x3d>;
reg = <0x00 0x00 0x00 0x400000 0x01>;
};
downstream_gic2 {
compatible = "qemu:memory-region";
alias = <0x105>;
reg = <0x00 0xe2000000 0x00 0x140000 0x01>;
};
downstream_amba {
compatible = "qemu:memory-region";
alias = <0xd0>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0x00>;
};
};
amba_r5@5 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0xf2>;
downstream_tcm {
compatible = "qemu:memory-region";
alias = <0x3f>;
reg = <0x00 0x00 0x00 0x400000 0x01>;
};
downstream_gic2 {
compatible = "qemu:memory-region";
alias = <0x105>;
reg = <0x00 0xe2000000 0x00 0x140000 0x01>;
};
downstream_amba {
compatible = "qemu:memory-region";
alias = <0xd0>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0x00>;
};
};
amba_r5@6 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0xf5>;
downstream_tcm {
compatible = "qemu:memory-region";
alias = <0x41>;
reg = <0x00 0x00 0x00 0x400000 0x01>;
};
downstream_gic3 {
compatible = "qemu:memory-region";
alias = <0x106>;
reg = <0x00 0xe2000000 0x00 0x140000 0x01>;
};
downstream_amba {
compatible = "qemu:memory-region";
alias = <0xd0>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0x00>;
};
};
amba_r5@7 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0xf8>;
downstream_tcm {
compatible = "qemu:memory-region";
alias = <0x43>;
reg = <0x00 0x00 0x00 0x400000 0x01>;
};
downstream_gic3 {
compatible = "qemu:memory-region";
alias = <0x106>;
reg = <0x00 0xe2000000 0x00 0x140000 0x01>;
};
downstream_amba {
compatible = "qemu:memory-region";
alias = <0xd0>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0x00>;
};
};
amba_r5@8 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0xfb>;
downstream_tcm {
compatible = "qemu:memory-region";
alias = <0x45>;
reg = <0x00 0x00 0x00 0x400000 0x01>;
};
downstream_gic4 {
compatible = "qemu:memory-region";
alias = <0x107>;
reg = <0x00 0xe2000000 0x00 0x140000 0x01>;
};
downstream_amba {
compatible = "qemu:memory-region";
alias = <0xd0>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0x00>;
};
};
amba_r5@9 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0xfe>;
downstream_tcm {
compatible = "qemu:memory-region";
alias = <0x47>;
reg = <0x00 0x00 0x00 0x400000 0x01>;
};
downstream_gic4 {
compatible = "qemu:memory-region";
alias = <0x107>;
reg = <0x00 0xe2000000 0x00 0x140000 0x01>;
};
downstream_amba {
compatible = "qemu:memory-region";
alias = <0xd0>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0x00>;
};
};
rpu2_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x208>;
phandle = <0xea>;
};
rpu3_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x20c>;
phandle = <0xed>;
};
rpu4_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x208>;
phandle = <0xf0>;
};
rpu5_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x20c>;
phandle = <0xf3>;
};
rpu6_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x208>;
phandle = <0xf6>;
};
rpu7_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x20c>;
phandle = <0xf9>;
};
rpu8_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x208>;
phandle = <0xfc>;
};
rpu9_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x20c>;
phandle = <0xff>;
};
usb1_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x231>;
phandle = <0x48>;
};
apu2_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x262>;
phandle = <0xd7>;
};
apu2_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x262>;
phandle = <0xd8>;
};
apu3_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x263>;
phandle = <0xd9>;
};
apu3_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x263>;
phandle = <0xda>;
};
apu4_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x268>;
phandle = <0xdb>;
};
apu4_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x268>;
phandle = <0xdc>;
};
apu5_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x269>;
phandle = <0xdd>;
};
apu5_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x269>;
phandle = <0xde>;
};
apu6_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x26a>;
phandle = <0xdf>;
};
apu6_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x26a>;
phandle = <0xe0>;
};
apu7_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x26b>;
phandle = <0xe1>;
};
apu7_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x26b>;
phandle = <0xe2>;
};
apu8_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x270>;
phandle = <0x209>;
};
apu8_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x270>;
phandle = <0x20a>;
};
apu9_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x271>;
phandle = <0x20b>;
};
apu9_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x271>;
phandle = <0x20c>;
};
apu10_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x272>;
phandle = <0x20d>;
};
apu10_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x272>;
phandle = <0x20e>;
};
apu11_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x273>;
phandle = <0x20f>;
};
apu11_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x273>;
phandle = <0x210>;
};
apu12_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x278>;
phandle = <0x211>;
};
apu12_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x278>;
phandle = <0x212>;
};
apu13_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x279>;
phandle = <0x213>;
};
apu13_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x279>;
phandle = <0x214>;
};
apu14_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x27a>;
phandle = <0x215>;
};
apu14_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x27a>;
phandle = <0x216>;
};
apu15_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x27b>;
phandle = <0x217>;
};
apu15_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x27b>;
phandle = <0x218>;
};
apu16_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x280>;
phandle = <0x219>;
};
apu16_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x280>;
phandle = <0x21a>;
};
apu17_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x281>;
phandle = <0x21b>;
};
apu17_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x281>;
phandle = <0x21c>;
};
apu18_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x282>;
phandle = <0x21d>;
};
apu18_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x282>;
phandle = <0x21e>;
};
apu19_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x283>;
phandle = <0x21f>;
};
apu19_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x283>;
phandle = <0x220>;
};
apu20_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x288>;
phandle = <0x221>;
};
apu20_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x288>;
phandle = <0x222>;
};
apu21_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x289>;
phandle = <0x223>;
};
apu21_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x289>;
phandle = <0x224>;
};
apu22_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x28a>;
phandle = <0x225>;
};
apu22_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x28a>;
phandle = <0x226>;
};
apu23_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x28b>;
phandle = <0x227>;
};
apu23_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x28b>;
phandle = <0x228>;
};
apu24_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x290>;
phandle = <0x229>;
};
apu24_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x290>;
phandle = <0x22a>;
};
apu25_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x291>;
phandle = <0x22b>;
};
apu25_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x291>;
phandle = <0x22c>;
};
apu26_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x292>;
phandle = <0x22d>;
};
apu26_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x292>;
phandle = <0x22e>;
};
apu27_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x293>;
phandle = <0x22f>;
};
apu27_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x293>;
phandle = <0x230>;
};
apu28_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x298>;
phandle = <0x231>;
};
apu28_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x298>;
phandle = <0x232>;
};
apu29_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x299>;
phandle = <0x233>;
};
apu29_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x299>;
phandle = <0x234>;
};
apu30_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x29a>;
phandle = <0x235>;
};
apu30_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x29a>;
phandle = <0x236>;
};
apu31_s_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x01>;
requester-id = <0x29b>;
phandle = <0x237>;
};
apu31_ns_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x29b>;
phandle = <0x238>;
};
asu_cpu_ma {
doc-ignore = <0x01>;
compatible = "qemu:memory-transaction-attr";
secure = <0x00>;
requester-id = <0x00>;
phandle = <0x239>;
};
lmb_amba_asu@0 {
#address-cells = <0x02>;
#size-cells = <0x02>;
#priority-cells = <0x01>;
compatible = "simple-bus";
ranges;
phandle = <0x23a>;
main_bus_for_asu {
compatible = "qemu:memory-region";
alias = <0xb4>;
reg = <0x00 0x00 0xffffffff 0xffffffff 0x00>;
};
};
ocm_mem@0xbbe00000 {
compatible = "qemu:memory-region";
phandle = <0x0e>;
};
asu_data_ram_wrapper@0xebe40000 {
compatible = "qemu:memory-region";
phandle = <0xbf>;
asu_data_ram@0 {
compatible = "qemu:memory-region";
device_type = "memory";
qemu,ram = <0x01>;
reg = <0x00 0x00 0x00 0x20000 0x00>;
};
};
psm_gic_proxy@0 {
#interrupt-cells = <0x03>;
interrupt-controller;
phandle = <0x23b>;
};
asu_cpu@0 {
#interrupt-cells = <0x01>;
phandle = <0xb5>;
};
__symbols__ {
pmc_ppu0_memattr = "/pmc_ppu0_ma";
pmc_ppu1_memattr = "/pmc_ppu1_ma";
psm_memattr = "/psm_ma";
ddrmc_ub0_memattr = "/ddrmc_ub0_ma";
ddrmc_ub1_memattr = "/ddrmc_ub1_ma";
pmc_dma0_memattr = "/pmc_dma0_ma";
pmc_dma1_memattr = "/pmc_dma1_ma";
pmc_qspi_dma_memattr_smid = "/pmc_qspi_dma_ma_smid";
pmc_qspi_dma_w_memattr_smid = "/pmc_qspi_dma_w_ma_smid";
apu0_s_memattr = "/apu0_s_ma";
apu0_ns_memattr = "/apu0_ns_ma";
apu1_s_memattr = "/apu1_s_ma";
apu1_ns_memattr = "/apu1_ns_ma";
rpu0_s_memattr = "/rpu0_s_ma";
rpu1_s_memattr = "/rpu1_s_ma";
gem0_memattr_smid = "/gem0_ma_smid";
gem0_w_memattr_smid = "/gem0_w_ma_smid";
gem1_memattr_smid = "/gem1_ma_smid";
gem1_w_memattr_smid = "/gem1_w_ma_smid";
ospi_dma_memattr_smid = "/ospi_dma_ma_smid";
ospi_dma_w_memattr_smid = "/ospi_dma_w_ma_smid";
sd0_memattr_smid = "/sd0_ma_smid";
sd0_w_memattr_smid = "/sd0_w_ma_smid";
sd1_memattr_smid = "/sd1_ma_smid";
sd1_w_memattr_smid = "/sd1_w_ma_smid";
usb0_memattr = "/usb0_ma";
amba_root = "/amba_root@0";
amba = "/amba_root@0/amba@0";
xmpu_ocm = "/amba_root@0/amba@0/xmpu_ocm@0";
xmpu_ocm2 = "/amba_root@0/amba@0/xmpu_ocm2@0";
loader_write_0xF1110880 = "/amba_root@0/amba@0/loader_write_cpu0_0x1@0xF1110880";
loader_write_0xFD1A0050 = "/amba_root@0/amba@0/loader_write_cpu0_0x5@0xFD1A0050";
loader_write_0xF111010C = "/amba_root@0/amba@0/loader_write_cpu0_0xFF@0xF111010C";
s_axi_tcm_a = "/amba_root@0/amba@0/s_axi_tcm_a@0";
s_axi_tcm_b = "/amba_root@0/amba@0/s_axi_tcm_b@0";
s_axi_tcm_c = "/amba_root@0/amba@0/s_axi_tcm_c@0";
s_axi_tcm_d = "/amba_root@0/amba@0/s_axi_tcm_d@0";
s_axi_tcm_e = "/amba_root@0/amba@0/s_axi_tcm_e@0";
loader_write_0xF12B0100 = "/amba_root@0/amba@0/loader_write_cpu0_0x80C@0xF12B0100";
loader_write_0xF1260320 = "/amba_root@0/amba@0/loader_write_cpu0_0x77@0xF1260320";
xmpu_ocm1 = "/amba_root@0/amba@0/xmpu_ocm1@0";
xmpu_ocm3 = "/amba_root@0/amba@0/xmpu_ocm3@0";
amba_lpd = "/amba_root@0/amba_lpd@0";
xppu_lpd = "/amba_root@0/amba_lpd@0/xppu_lpd@0xeb990000";
gem0 = "/amba_root@0/amba_lpd@0/ethernet@0xf1a60000";
gem1 = "/amba_root@0/amba_lpd@0/ethernet@0xf1a70000";
serial0 = "/amba_root@0/amba_lpd@0/serial@0xf1920000";
serial1 = "/amba_root@0/amba_lpd@0/serial@0xf1930000";
canfdbus0 = "/amba_root@0/amba_lpd@0/canfdbus@0";
can0 = "/amba_root@0/amba_lpd@0/can@0xf19e0000";
can1 = "/amba_root@0/amba_lpd@0/can@0xf19f0000";
crl = "/amba_root@0/amba_lpd@0/crl@0xeb5e0000";
lpd_iou_slcr = "/amba_root@0/amba_lpd@0/slcr@0xf1a20000";
ipi = "/amba_root@0/amba_lpd@0/ipi@0xeb300000";
spi0 = "/amba_root@0/amba_lpd@0/spi@0xf19c0000";
spi0_flash0 = "/amba_root@0/amba_lpd@0/spi@0xf19c0000/spi0_flash0@0";
spi1 = "/amba_root@0/amba_lpd@0/spi@0xf19d0000";
spi1_flash0 = "/amba_root@0/amba_lpd@0/spi@0xf19d0000/spi1_flash0@0";
dwc3_0 = "/amba_root@0/amba_lpd@0/usb2@USB2_0_XHCI";
ttc0 = "/amba_root@0/amba_lpd@0/timer@0xf1e60000";
ttc1 = "/amba_root@0/amba_lpd@0/timer@0xf1e70000";
ttc2 = "/amba_root@0/amba_lpd@0/timer@0xf1e80000";
ttc3 = "/amba_root@0/amba_lpd@0/timer@0xf1e90000";
adma0_mattr = "/amba_root@0/amba_lpd@0/adma0mattr";
adma0 = "/amba_root@0/amba_lpd@0/dma-controller@0xebd00000";
adma1_mattr = "/amba_root@0/amba_lpd@0/adma1mattr";
adma1 = "/amba_root@0/amba_lpd@0/dma-controller@0xebd10000";
adma2_mattr = "/amba_root@0/amba_lpd@0/adma2mattr";
adma2 = "/amba_root@0/amba_lpd@0/dma-controller@0xebd20000";
adma3_mattr = "/amba_root@0/amba_lpd@0/adma3mattr";
adma3 = "/amba_root@0/amba_lpd@0/dma-controller@0xebd30000";
adma4_mattr = "/amba_root@0/amba_lpd@0/adma4mattr";
adma4 = "/amba_root@0/amba_lpd@0/dma-controller@0xebd40000";
adma5_mattr = "/amba_root@0/amba_lpd@0/adma5mattr";
adma5 = "/amba_root@0/amba_lpd@0/dma-controller@0xebd50000";
adma6_mattr = "/amba_root@0/amba_lpd@0/adma6mattr";
adma6 = "/amba_root@0/amba_lpd@0/dma-controller@0xebd60000";
adma7_mattr = "/amba_root@0/amba_lpd@0/adma7mattr";
adma7 = "/amba_root@0/amba_lpd@0/dma-controller@0xebd70000";
ps_i2c0 = "/amba_root@0/amba_lpd@0/lpd_i2c_wrapper/ps_i2c@0xf1940000";
ps_i2c1 = "/amba_root@0/amba_lpd@0/lpd_i2c_wrapper/ps_i2c@0xf1950000";
ps_i2c2 = "/amba_root@0/amba_lpd@0/lpd_i2c_wrapper/ps_i2c@0xf1960000";
ps_i2c3 = "/amba_root@0/amba_lpd@0/lpd_i2c_wrapper/ps_i2c@0xf1970000";
ps_i2c4 = "/amba_root@0/amba_lpd@0/lpd_i2c_wrapper/ps_i2c@0xf1980000";
ps_i2c5 = "/amba_root@0/amba_lpd@0/lpd_i2c_wrapper/ps_i2c@0xf1990000";
ps_i2c6 = "/amba_root@0/amba_lpd@0/lpd_i2c_wrapper/ps_i2c@0xf19a0000";
ps_i2c7 = "/amba_root@0/amba_lpd@0/lpd_i2c_wrapper/ps_i2c@0xf19b0000";
ocm_ctrl0 = "/amba_root@0/amba_lpd@0/ocm_ctrl@OCM";
lpd_slcr = "/amba_root@0/amba_lpd@0/lpd_slcr@0xeb410000";
lpd_slcr_secure = "/amba_root@0/amba_lpd@0/lpd_slcr_secure@0xeb510000";
lpd_iou_slcr_secure = "/amba_root@0/amba_lpd@0/lpd_iou_slcr_secure@0xf1a40000";
lpd_wwdt0 = "/amba_root@0/amba_lpd@0/wwdt@0xeb000000";
lpd_gpio = "/amba_root@0/amba_lpd@0/lpd_gpio@0xf1a50000";
rpu_ctrl = "/amba_root@0/amba_lpd@0/rpu_ctrl@0";
rpu_ctrl_a = "/amba_root@0/amba_lpd@0/rpu_cluster@0xeb580000";
rpu_ctrl_a0 = "/amba_root@0/amba_lpd@0/rpu_ctrl_a0@0xeb588000";
rpu_ctrl_a1 = "/amba_root@0/amba_lpd@0/rpu_ctrl_a1@0xeb58c000";
rpu_ctrl_b = "/amba_root@0/amba_lpd@0/rpu_cluster@0xeb590000";
rpu_ctrl_b0 = "/amba_root@0/amba_lpd@0/rpu_ctrl_b0@0xeb598000";
rpu_ctrl_b1 = "/amba_root@0/amba_lpd@0/rpu_ctrl_b1@0xeb59c000";
rpu_ctrl_c = "/amba_root@0/amba_lpd@0/rpu_cluster@0xeb5a0000";
rpu_ctrl_c0 = "/amba_root@0/amba_lpd@0/rpu_ctrl_c0@0xeb5a8000";
rpu_ctrl_c1 = "/amba_root@0/amba_lpd@0/rpu_ctrl_c1@0xeb5ac000";
rpu_ctrl_d = "/amba_root@0/amba_lpd@0/rpu_cluster@0xeb5b0000";
rpu_ctrl_d0 = "/amba_root@0/amba_lpd@0/rpu_ctrl_d0@0xeb5b8000";
rpu_ctrl_d1 = "/amba_root@0/amba_lpd@0/rpu_ctrl_d1@0xeb5bc000";
rpu_ctrl_e = "/amba_root@0/amba_lpd@0/rpu_cluster@0xeb5c0000";
rpu_ctrl_e0 = "/amba_root@0/amba_lpd@0/rpu_ctrl_e0@0xeb5c8000";
rpu_ctrl_e1 = "/amba_root@0/amba_lpd@0/rpu_ctrl_e1@0xeb5cc000";
dwc3_1 = "/amba_root@0/amba_lpd@0/usb2@USB2_0_XHCI1";
psx_i3c0 = "/amba_root@0/amba_lpd@0/i3c0@0xf1940000";
psx_i3c1 = "/amba_root@0/amba_lpd@0/i3c1@0xf1950000";
ocm_ctrl1 = "/amba_root@0/amba_lpd@0/ocm_ctrl@0xeb960000";
ocm_ctrl2 = "/amba_root@0/amba_lpd@0/ocm_ctrl@0xeb9d0000";
ocm_ctrl3 = "/amba_root@0/amba_lpd@0/ocm_ctrl@0xeaa00000";
can2 = "/amba_root@0/amba_lpd@0/can@0xf1a00000";
can3 = "/amba_root@0/amba_lpd@0/can@0xf1a10000";
ttc4 = "/amba_root@0/amba_lpd@0/timer@0xf1ea0000";
ttc5 = "/amba_root@0/amba_lpd@0/timer@0xf1eb0000";
ttc6 = "/amba_root@0/amba_lpd@0/timer@0xf1ec0000";
ttc7 = "/amba_root@0/amba_lpd@0/timer@0xf1ed0000";
sdma0_mattr = "/amba_root@0/amba_lpd@0/sdma0mattr";
sdma0 = "/amba_root@0/amba_lpd@0/dma-controller@0xebd80000";
sdma1_mattr = "/amba_root@0/amba_lpd@0/sdma1mattr";
sdma1 = "/amba_root@0/amba_lpd@0/dma-controller@0xebd90000";
sdma2_mattr = "/amba_root@0/amba_lpd@0/sdma2mattr";
sdma2 = "/amba_root@0/amba_lpd@0/dma-controller@0xebda0000";
sdma3_mattr = "/amba_root@0/amba_lpd@0/sdma3mattr";
sdma3 = "/amba_root@0/amba_lpd@0/dma-controller@0xebdb0000";
sdma4_mattr = "/amba_root@0/amba_lpd@0/sdma4mattr";
sdma4 = "/amba_root@0/amba_lpd@0/dma-controller@0xebdc0000";
sdma5_mattr = "/amba_root@0/amba_lpd@0/sdma5mattr";
sdma5 = "/amba_root@0/amba_lpd@0/dma-controller@0xebdd0000";
sdma6_mattr = "/amba_root@0/amba_lpd@0/sdma6mattr";
sdma6 = "/amba_root@0/amba_lpd@0/dma-controller@0xebde0000";
sdma7_mattr = "/amba_root@0/amba_lpd@0/sdma7mattr";
sdma7 = "/amba_root@0/amba_lpd@0/dma-controller@0xebdf0000";
lpd_wwdt1 = "/amba_root@0/amba_lpd@0/wwdt@0xeb010000";
lpd_afi_fs = "/amba_root@0/amba_lpd@0/lpd_afi_fs@0xeb560000";
amba_fpd = "/amba_root@0/amba_fpd@0";
wwdt0 = "/amba_root@0/amba_fpd@0/watchdog@0xecc10000";
apu_cluster0 = "/amba_root@0/amba_fpd@0/apu_cluster@0xecc00000";
apu_cluster1 = "/amba_root@0/amba_fpd@0/apu_cluster@0xecd00000";
apu_cluster2 = "/amba_root@0/amba_fpd@0/apu_cluster@0xece00000";
apu_cluster3 = "/amba_root@0/amba_fpd@0/apu_cluster@0xecf00000";
smmu = "/amba_root@0/amba_fpd@0/smmuv3@MM_FPD_SMMU";
pcie = "/amba_root@0/amba_fpd@0/dummy_pcie@0x6_0000_0000";
apu_pcil = "/amba_root@0/amba_fpd@0/apu_pcil@0xecb10000";
fpd_afi_fs = "/amba_root@0/amba_fpd@0/lpd_afi_fs@0xec860000";
mmi_gem_memattr = "/amba_root@0/amba_fpd@0/mmi_gem_ma";
mmi_usb_memattr = "/amba_root@0/amba_fpd@0/mmi_usb_ma";
amba_mmi = "/amba_root@0/amba_fpd@0/amba_mmi@0";
mdio_10gbe = "/amba_root@0/amba_fpd@0/amba_mmi@0/mdio_10gbe@0";
phy_10gbe = "/amba_root@0/amba_fpd@0/amba_mmi@0/mdio_10gbe@0/phy@1";
mmi_10gbe = "/amba_root@0/amba_fpd@0/amba_mmi@0/ethernet@0xed920000";
mmi_usb_drd = "/amba_root@0/amba_fpd@0/amba_mmi@0/usb_drd@0xedec0000";
mmi_crx = "/amba_root@0/amba_fpd@0/amba_mmi@0/mmi_crs@0xedc00000";
mmi_pcsr = "/amba_root@0/amba_fpd@0/amba_mmi@0/mmi_pcsr@0xeb2f0000";
mmi_gtyp = "/amba_root@0/amba_fpd@0/amba_mmi@0/mmi_gtyp@0xed900000";
mmi_slcr_secure = "/amba_root@0/amba_fpd@0/amba_mmi@0/mmi_slcr_sec@0";
mmi_trng = "/amba_root@0/amba_fpd@0/amba_mmi@0/trng@0xede80000";
mmi_udh_slcr = "/amba_root@0/amba_fpd@0/amba_mmi@0/udh_slcr@0xedea0000";
mmi_udh_pll = "/amba_root@0/amba_fpd@0/amba_mmi@0/udh_pll@0xede90000";
mmi_gpu_a = "/amba_root@0/amba_fpd@0/amba_mmi@0/mmi_gpu_a@0";
loader_write_0xEDC30440 = "/amba_root@0/amba_fpd@0/amba_mmi@0/
loader_write_cpu0_0x1@0xEDC30440";
loader_write_0xEDC30444 = "/amba_root@0/amba_fpd@0/amba_mmi@0/
loader_write_cpu0_0x7F@0xEDC30444";
loader_write_0xEDC3044c = "/amba_root@0/amba_fpd@0/amba_mmi@0/
loader_write_cpu0_0x1@0xEDC3044c";
loader_write_0xEDC30450 = "/amba_root@0/amba_fpd@0/amba_mmi@0/
loader_write_cpu0_0x1@0xEDC30450";
loader_write_0xEDC30460 = "/amba_root@0/amba_fpd@0/amba_mmi@0/
loader_write_cpu0_0x1@0xEDC30460";
loader_write_0xEDC30464 = "/amba_root@0/amba_fpd@0/amba_mmi@0/
loader_write_cpu0_0x7f@0xEDC30464";
loader_write_0xEDC3046c = "/amba_root@0/amba_fpd@0/amba_mmi@0/
loader_write_cpu0_0x1@0xEDC3046c";
loader_write_0xEDC30470 = "/amba_root@0/amba_fpd@0/amba_mmi@0/
loader_write_cpu0_0x1@0xEDC30470";
loader_write_0xED0A0098 = "/amba_root@0/amba_fpd@0/amba_mmi@0/
loader_write_cpu0_0x3@0xED0A0098";
amba_pmc_internal = "/amba_root@0/amba_pmc_internal@0";
xmpu_pmc = "/amba_root@0/amba_pmc_internal@0/xmpu_pmc@0";
xppu_pmc_npi = "/amba_root@0/amba_pmc_internal@0/xppu_pmc_npi@0xf1300000";
xppu_pmc = "/amba_root@0/amba_pmc_internal@0/xppu_pmc@0xf1310000";
amba_pmc = "/amba_root@0/amba_pmc@0";
xmpu_pmc_cfu = "/amba_root@0/amba_pmc@0/xmpu_pmc_cfu@0xf1340000";
pmx_err_mng = "/amba_root@0/amba_pmc@0/pmx_err_mng@0xf1110000";
intpmxc_config = "/amba_root@0/amba_pmc@0/intpmxc_config@0xf1400000";
amba_pmc_iou = "/amba_root@0/amba_pmc_iou@0";
pmc_iou_slcr = "/amba_root@0/amba_pmc_iou@0/pmc_iou_slcr@0xf1060000";
pmc_iou_slcr_secure = "/amba_root@0/amba_pmc_iou@0/pmc_iou_slcr_secure@0xf1070000";
pmc_qspi_dma_0 = "/amba_root@0/amba_pmc_iou@0/pmc_qspi_dma@QSPI_DMA";
pmc_qspi_0 = "/amba_root@0/amba_pmc_iou@0/pmc_qspi@0xf1030000";
qspi_flash_lcs_lb = "/amba_root@0/amba_pmc_iou@0/pmc_qspi@0xf1030000/
qspi_flash_lcs_lb@0";
qspi_flash_lcs_ub = "/amba_root@0/amba_pmc_iou@0/pmc_qspi@0xf1030000/
qspi_flash_lcs_ub@0";
qspi_flash_ucs_lb = "/amba_root@0/amba_pmc_iou@0/pmc_qspi@0xf1030000/
qspi_flash_ucs_lb@0";
qspi_flash_ucs_ub = "/amba_root@0/amba_pmc_iou@0/pmc_qspi@0xf1030000/
qspi_flash_ucs_ub@0";
ospi_dma_dst = "/amba_root@0/amba_pmc_iou@0/ospi_dst_dma@0";
ospi_dma_src = "/amba_root@0/amba_pmc_iou@0/ospi_src_dma@0";
ospi = "/amba_root@0/amba_pmc_iou@0/spi@0xf1010000";
ospi_flash_lcs_lb = "/amba_root@0/amba_pmc_iou@0/spi@0xf1010000/
ospi_flash_lcs_lb@0";
ospi_flash_lcs_ub = "/amba_root@0/amba_pmc_iou@0/spi@0xf1010000/
ospi_flash_lcs_ub@0";
ospi_flash_ucs_lb = "/amba_root@0/amba_pmc_iou@0/spi@0xf1010000/
ospi_flash_ucs_lb@0";
ospi_flash_ucs_ub = "/amba_root@0/amba_pmc_iou@0/spi@0xf1010000/
ospi_flash_ucs_ub@0";
gpio_mr_mux = "/amba_root@0/amba_pmc_iou@0/gpio_mr_mux@0xc0000000";
pmc_gpio = "/amba_root@0/amba_pmc_iou@0/pmc_gpio@0xf1020000";
sdhci0 = "/amba_root@0/amba_pmc_iou@0/mmc@0xf1040000";
sdhci1 = "/amba_root@0/amba_pmc_iou@0/mmc@0xf1050000";
pmc_tap = "/amba_root@0/amba_pmc_iou@0/pmc_tap@0xf11a0000";
pmc_i2c = "/amba_root@0/amba_pmc_iou@0/pmc_i2c_wrapper/pmc_i2c@0xf1000000";
pmx_wwdt = "/amba_root@0/amba_pmc_iou@0/wwdt@0xf03f0000";
pmc_ufshc = "/amba_root@0/amba_pmc_iou@0/pmc_ufshc@0xf10b0000";
unipro = "/amba_root@0/amba_pmc_iou@0/unipro@0";
ufs_dev = "/amba_root@0/amba_pmc_iou@0/ufs_dev@0";
ufs_reg = "/amba_root@0/amba_pmc_iou@0/ufs_reg@0xf1060000";
amba_pmc_sec = "/amba_root@0/amba_pmc_sec@0";
pmc_dma0_src = "/amba_root@0/amba_pmc_sec@0/pmc_dma0_src@0";
pmc_dma0_dst = "/amba_root@0/amba_pmc_sec@0/pmc_dma0_dst@0";
pmc_dma1_src = "/amba_root@0/amba_pmc_sec@0/pmc_dma1_src@0";
pmc_dma1_dst = "/amba_root@0/amba_pmc_sec@0/pmc_dma1_dst@0";
pmc_stream_switch = "/amba_root@0/amba_pmc_sec@0/pmc_stream_switch@0";
pmc_sha3 = "/amba_root@0/amba_pmc_sec@0/pmc_sha@0xf1210000";
pmc_aes = "/amba_root@0/amba_pmc_sec@0/pmc_aes@0xf11e0000";
xlnx_aes = "/amba_root@0/amba_pmc_sec@0/pmc_aes@0xf11e0000/xlnx_aes@0";
pmc_rsa = "/amba_root@0/amba_pmc_sec@0/pmc_rsa@0xf1200000";
xlnx_pmc_efuse_cache = "/amba_root@0/amba_pmc_sec@0/
xlnx_pmc_efuse_cache@0xf1250000";
pmc_puf_ctrl = "/amba_root@0/amba_pmc_sec@0/pmc_puf_ctrl@0";
pmc_efuse = "/amba_root@0/amba_pmc_sec@0/pmc_efuse@0xf1240000";
xlnx_efuse = "/amba_root@0/amba_pmc_sec@0/pmc_efuse@0xf1240000/xlnx_efuse@0";
pmc_bbram_ctrl = "/amba_root@0/amba_pmc_sec@0/pmc_bbram@0xf11f0000";
pmc_sbi = "/amba_root@0/amba_pmc_sec@0/pmc_sbi@0xf1220000";
pmc_sha3_1 = "/amba_root@0/amba_pmc_sec@0/pmc_sha1@0xF1800000";
amba_pmc_ppu = "/amba_root@0/amba_pmc_ppu@0";
pmc_gic_proxy = "/amba_root@0/amba_pmc_ppu@0/pmc_gic_proxy@0";
amba_pmc_sys = "/amba_root@0/amba_pmc_sys@0";
pmc_clk_rst = "/amba_root@0/amba_pmc_sys@0/pmc_clk_rst@0xf1260000";
pmc_int = "/amba_root@0/amba_pmc_sys@0/pmc_int@0xf1400000";
pmc_global = "/amba_root@0/amba_pmc_sys@0/pmc_global@0xf1110000";
pmc_stream_zero = "/amba_root@0/amba_pmc_sys@0/pmc_stream_zero@";
pmx_analog = "/amba_root@0/amba_pmc_sys@0/pmc_analog@0xf1160000";
pmc_sysmon = "/amba_root@0/amba_pmc_sys@0/pmc_sysmon@0xf1270000";
pmc_ams_sat0 = "/amba_root@0/amba_pmc_sys@0/pmc_ams_sat@0";
pmc_ams_sat1 = "/amba_root@0/amba_pmc_sys@0/pmc_ams_sat@1";
pmc_global_tamper = "/amba_root@0/amba_pmc_sys@0/versal_pmc_tamper@";
lpd_sysmon_sat = "/amba_root@0/amba_pmc_sys@0/lpd_ams_sat@0";
fpd_sysmon_sat0 = "/amba_root@0/amba_pmc_sys@0/fpd_ams_sat@0";
fpd_sysmon_sat1 = "/amba_root@0/amba_pmc_sys@0/fpd_ams_sat@1";
fpd_sysmon_sat2 = "/amba_root@0/amba_pmc_sys@0/fpd_ams_sat@2";
fpd_sysmon_sat3 = "/amba_root@0/amba_pmc_sys@0/fpd_ams_sat@3";
amba_pmc_pl = "/amba_root@0/amba_pmc_pl@0";
noc_npi_nir = "/amba_root@0/amba_pmc_pl@0/noc_npi_nir@0xf6000000";
npi_ddrmc_ub0 = "/amba_root@0/amba_pmc_pl@0/npi_ddrmc_ub0@0xf62c0000";
npi_ddrmc_main0 = "/amba_root@0/amba_pmc_pl@0/npi_ddrmc_main0@0xf6290000";
npi_ddrmc_noc0 = "/amba_root@0/amba_pmc_pl@0/npi_ddrmc_noc0@0xf62a0000";
npi_ddrmc_ub1 = "/amba_root@0/amba_pmc_pl@0/npi_ddrmc_ub1@0xf63b0000";
npi_ddrmc_main1 = "/amba_root@0/amba_pmc_pl@0/npi_ddrmc_main1@0xf6380000";
npi_ddrmc_noc1 = "/amba_root@0/amba_pmc_pl@0/npi_ddrmc_noc1@0xf6390000";
npi_ddrmc_ub2 = "/amba_root@0/amba_pmc_pl@0/npi_ddrmc_ub2@0xf6940000";
npi_ddrmc_main2 = "/amba_root@0/amba_pmc_pl@0/npi_ddrmc_main2@0xf6910000";
npi_ddrmc_noc2 = "/amba_root@0/amba_pmc_pl@0/npi_ddrmc_noc2@0xf6920000";
npi_ddrmc_ub3 = "/amba_root@0/amba_pmc_pl@0/npi_ddrmc_ub3@0xf6a20000";
npi_ddrmc_main3 = "/amba_root@0/amba_pmc_pl@0/npi_ddrmc_main3@0xf69f0000";
npi_ddrmc_noc3 = "/amba_root@0/amba_pmc_pl@0/npi_ddrmc_noc3@0xf6a00000";
npi_ddrmc_xmpu0 = "/amba_root@0/amba_pmc_pl@0/npi_ddrmc_xmpu0@0xf62a0000";
npi_me = "/amba_root@0/amba_pmc_pl@0/npi_me@0xf6540000";
npi_me0 = "/amba_root@0/amba_pmc_pl@0/npi_me@0xf6540000";
noc_npi_devs = "/amba_root@0/amba_pmc_pl@0/noc_npi_devs@0";
cfu_fdro = "/amba_root@0/amba_pmc_pl@0/cfu_fdro@0xf12c2000";
cfu_sfr = "/amba_root@0/amba_pmc_pl@0/cfu_sfr@0xf12c1000";
cframe0_reg = "/amba_root@0/amba_pmc_pl@0/cframe0_reg@0xf12d0000";
cframe1_reg = "/amba_root@0/amba_pmc_pl@0/cframe1_reg@0xf12d2000";
cframe2_reg = "/amba_root@0/amba_pmc_pl@0/cframe2_reg@0xf12d4000";
cframe3_reg = "/amba_root@0/amba_pmc_pl@0/cframe3_reg@0xf12d6000";
cframe4_reg = "/amba_root@0/amba_pmc_pl@0/cframe4_reg@0xf12d8000";
cframe5_reg = "/amba_root@0/amba_pmc_pl@0/cframe5_reg@0xf12da000";
cframe6_reg = "/amba_root@0/amba_pmc_pl@0/cframe6_reg@0xf12dc000";
cframe7_reg = "/amba_root@0/amba_pmc_pl@0/cframe7_reg@0xf12de000";
cframe8_reg = "/amba_root@0/amba_pmc_pl@0/cframe8_reg@0xf12e0000";
cframe9_reg = "/amba_root@0/amba_pmc_pl@0/cframe9_reg@0xf12e2000";
cframe10_reg = "/amba_root@0/amba_pmc_pl@0/cframe10_reg@0xf12e4000";
cframe11_reg = "/amba_root@0/amba_pmc_pl@0/cframe11_reg@0xf12e6000";
cframe12_reg = "/amba_root@0/amba_pmc_pl@0/cframe12_reg@0xf12e8000";
cframe13_reg = "/amba_root@0/amba_pmc_pl@0/cframe13_reg@0xf12ea000";
cframe14_reg = "/amba_root@0/amba_pmc_pl@0/cframe14_reg@0xf12ec000";
cframe_bcast_reg = "/amba_root@0/amba_pmc_pl@0/cframe_bcast_reg@0xf12ee000";
dummy_cfu_mem = "/amba_root@0/amba_pmc_pl@0/dummy_cfu_mem@0xf12b0000";
cfu = "/amba_root@0/amba_pmc_pl@0/dummy_cfu_mem@0xf12b0000/cfu@0x0";
amba_pmc_bat = "/amba_root@0/amba_pmc_bat@0";
rtc = "/amba_root@0/amba_pmc_bat@0/rtc@0xf12a0000";
amba_psm = "/amba_root@0/amba_psm@0";
amba_xram = "/amba_root@0/amba_xram@0";
crf = "/amba_root@0/crf@0xec200000";
amba_asu_cpu = "/amba_root@0/amba_asu_cpu@0";
amba_asu = "/amba_root@0/amba_asu@0";
asu_iram = "/amba_root@0/amba_asu@0/asu_instr_ram@0xebe00000";
asu_io_module = "/amba_root@0/amba_asu@0/io-module@0xebe80000";
asu_io_intc = "/amba_root@0/amba_asu@0/io-module@0xebe80000/asu_io_intc@0C";
asu_io_gpi1 = "/amba_root@0/amba_asu@0/io-module@0xebe80000/asu_gpi@20";
asu_io_gpo1 = "/amba_root@0/amba_asu@0/io-module@0xebe80000/asu_gpo@10";
asu_io_gpo2 = "/amba_root@0/amba_asu@0/io-module@0xebe80000/asu_gpo@14";
asu_io_pit1 = "/amba_root@0/amba_asu@0/io-module@0xebe80000/asu_pit@40";
asu_io_pit2 = "/amba_root@0/amba_asu@0/io-module@0xebe80000/asu_pit@50";
asu_io_pit3 = "/amba_root@0/amba_asu@0/io-module@0xebe80000/asu_pit@60";
asu_io_pit4 = "/amba_root@0/amba_asu@0/io-module@0xebe80000/asu_pit@70";
asu_mdm_uart = "/amba_root@0/amba_asu@0/asu_mdm_uart@0xebef0000";
asu_global = "/amba_root@0/amba_asu@0/asu_global@0xebf80000";
asu_global_pmc = "/amba_root@0/amba_asu@0/asu_global_pmc@0xebf80000";
asu_local = "/amba_root@0/amba_asu@0/asu_local@0xebe8e000";
asu_sss = "/amba_root@0/amba_asu@0/asu_sss@0xebe8e000";
asu_dma_src = "/amba_root@0/amba_asu@0/asu_dma_src@0xebe8c000";
asu_dma_dst = "/amba_root@0/amba_asu@0/asu_dma_dst@0xebe8c000";
asu_dma1_src = "/amba_root@0/amba_asu@0/asu_dma1_src@0xebe8d000";
asu_dma1_dst = "/amba_root@0/amba_asu@0/asu_dma1_dst@0xebe8d000";
asu_xmpu = "/amba_root@0/amba_asu@0/asu_xmpu@0xebf60000";
asu_aes = "/amba_root@0/amba_asu@0/asu_aes@0xebe88000";
asu_kv = "/amba_root@0/amba_asu@0/asu_kv@0xebe8a000";
asu_sha3 = "/amba_root@0/amba_asu@0/asu_sha3@0xebf40000";
asu_sha2 = "/amba_root@0/amba_asu@0/asu_sha2@0xebf30000";
asu_rsa = "/amba_root@0/amba_asu@0/pmc_rsa@0xebf50000";
asu_trng = "/amba_root@0/amba_asu@0/trng@0xebf20000";
asu_ecc = "/amba_root@0/amba_asu@0/asu_ecc@0xebf00000";
lmb_pmc_ppu0 = "/lmb_pmc_ppu0@0";
pmc_rom = "/lmb_pmc_ppu0@0/pmc_rom@0xf0000000";
pmc_ppu0_ram = "/lmb_pmc_ppu0@0/ppu0_ram@0xf0060000";
pmc_ppu0_io_module = "/lmb_pmc_ppu0@0/io-module@00";
pmc_ppu0_io_intc = "/lmb_pmc_ppu0@0/io-module@00/pmc_ppu0_intc@0C";
pmc_ppu0_io_gpi1 = "/lmb_pmc_ppu0@0/io-module@00/pmc_ppu0_gpi@20";
pmc_ppu0_io_gpi2 = "/lmb_pmc_ppu0@0/io-module@00/pmc_ppu0_gpi@24";
pmc_ppu0_io_gpi3 = "/lmb_pmc_ppu0@0/io-module@00/pmc_ppu0_gpi@28";
pmc_ppu0_io_gpi4 = "/lmb_pmc_ppu0@0/io-module@00/pmc_ppu0_gpi@2c";
pmc_ppu0_io_gpo1 = "/lmb_pmc_ppu0@0/io-module@00/pmc_ppu0_gpo@10";
pmc_ppu0_io_gpo2 = "/lmb_pmc_ppu0@0/io-module@00/pmc_ppu0_gpo@14";
pmc_ppu0_io_gpo3 = "/lmb_pmc_ppu0@0/io-module@00/pmc_ppu0_gpo@18";
pmc_ppu0_io_gpo4 = "/lmb_pmc_ppu0@0/io-module@00/pmc_ppu0_gpo@1c";
pmc_ppu0_io_pit1 = "/lmb_pmc_ppu0@0/io-module@00/pmc_ppu0_pit@40";
pmc_ppu0_io_pit2 = "/lmb_pmc_ppu0@0/io-module@00/pmc_ppu0_pit@50";
pmc_ppu0_io_pit3 = "/lmb_pmc_ppu0@0/io-module@00/pmc_ppu0_pit@60";
pmc_ppu0_io_pit4 = "/lmb_pmc_ppu0@0/io-module@00/pmc_ppu0_pit@70";
lmb_pmc_ppu1 = "/lmb_pmc_ppu1@0";
pmc_ppu1_io_module = "/lmb_pmc_ppu1@0/io-module@00";
pmc_ppu1_io_intc = "/lmb_pmc_ppu1@0/io-module@00/pmc_ppu1_intc@0C";
pmc_ppu1_io_gpi1 = "/lmb_pmc_ppu1@0/io-module@00/pmc_ppu1_gpi@20";
pmc_ppu1_io_gpi2 = "/lmb_pmc_ppu1@0/io-module@00/pmc_ppu1_gpi@24";
pmc_ppu1_io_gpi3 = "/lmb_pmc_ppu1@0/io-module@00/pmc_ppu1_gpi@28";
pmc_ppu1_io_gpi4 = "/lmb_pmc_ppu1@0/io-module@00/pmc_ppu1_gpi@2c";
pmc_ppu1_io_gpo1 = "/lmb_pmc_ppu1@0/io-module@00/pmc_ppu1_gpo@10";
pmc_ppu1_io_gpo2 = "/lmb_pmc_ppu1@0/io-module@00/pmc_ppu1_gpo@14";
pmc_ppu1_io_gpo3 = "/lmb_pmc_ppu1@0/io-module@00/pmc_ppu1_gpo@18";
pmc_ppu1_io_gpo4 = "/lmb_pmc_ppu1@0/io-module@00/pmc_ppu1_gpo@1c";
pmc_ppu1_io_pit1 = "/lmb_pmc_ppu1@0/io-module@00/pmc_ppu1_pit@40";
pmc_ppu1_io_pit2 = "/lmb_pmc_ppu1@0/io-module@00/pmc_ppu1_pit@50";
pmc_ppu1_io_pit3 = "/lmb_pmc_ppu1@0/io-module@00/pmc_ppu1_pit@60";
pmc_ppu1_io_pit4 = "/lmb_pmc_ppu1@0/io-module@00/pmc_ppu1_pit@70";
lmb_psm = "/lmb_psm@0";
lmb_ddrmc0 = "/lmb_ddrmc@0";
ddrmc0_ram_data = "/lmb_ddrmc@0/ddrmc0_ram_data@0x1c000";
ddrmc0_ram_instr = "/lmb_ddrmc@0/ddrmc0_ram_instr@0x20000";
ddrmc0_ram_exchange = "/lmb_ddrmc@0/ddrmc0_ram_exchange@0x08000";
ddrmc_0_io_module = "/lmb_ddrmc@0/io-module@00";
ddrmc0_io_intc = "/lmb_ddrmc@0/io-module@00/ddrmc0_intc@0C";
ddrmc0_io_gpo1 = "/lmb_ddrmc@0/io-module@00/ddrmc0_gpo@10";
ddrmc0_io_pit1 = "/lmb_ddrmc@0/io-module@00/ddrmc0_pit@40";
ddrmc0_io_pit2 = "/lmb_ddrmc@0/io-module@00/ddrmc0_pit@50";
ddrmc0_io_pit3 = "/lmb_ddrmc@0/io-module@00/ddrmc0_pit@60";
ddrmc0_io_pit4 = "/lmb_ddrmc@0/io-module@00/ddrmc0_pit@70";
ddrmc_uart0 = "/lmb_ddrmc@0/ddrmc_uart0@0";
lmb_ddrmc1 = "/lmb_ddrmc@1";
ddrmc1_ram_data = "/lmb_ddrmc@1/ddrmc1_ram_data@0x1c000";
ddrmc1_ram_instr = "/lmb_ddrmc@1/ddrmc1_ram_instr@0x20000";
ddrmc1_ram_exchange = "/lmb_ddrmc@1/ddrmc1_ram_exchange@0x08000";
amba_rpu = "/amba_rpu@0";
amba_r5_0 = "/amba_r5@0";
amba_r5_1 = "/amba_r5@1";
dummy1 = "/dummy1@0";
smmu_tbu0 = "/tbu0_slave@0";
smmu_tbu1 = "/tbu1_slave@0";
smmu_tbu2 = "/tbu2_slave@0";
smmu_tbu3 = "/tbu3_slave@0";
smmu_tbu4 = "/tbu4_slave@0";
smmu_tbu5 = "/tbu5_slave@0";
smmu_tbu6 = "/tbu6_slave@0";
ddr_mem = "/memory@00000000";
ddr_2_mem = "/memory@8_0000_0000";
ddr_3_mem = "/memory@0x50000000000ULL";
ocm_mem_bank_0 = "/ocm_mem_bank_0@";
ocm_mem_bank_1 = "/ocm_mem_bank_1@";
ocm_mem_bank_2 = "/ocm_mem_bank_2@";
ocm_mem_bank_3 = "/ocm_mem_bank_3@";
xram_mem = "/xram_mem@0xbbe00000";
ipi_msgbuf = "/ipi_msgbuf@0";
pmc_ram = "/pmc_ram@0xf2000000";
pmc_ram_bank_0 = "/pmc_ram_bank_0@0x0";
pmc_ppu1_insn_ram = "/pmc_ppu1_ram@0xf0200000";
pmc_ppu1_data_ram = "/pmc_ppu1_ram@0xf0280000";
lqspi_mr = "/lqspi_mr@0";
lospi_mr = "/lospi_mr@0";
cpu0 = "/cpus/apu_cpu@0";
cpu1 = "/cpus/apu_cpu@1";
cpu2 = "/cpus/apu_cpu@2";
cpu3 = "/cpus/apu_cpu@3";
cpu4 = "/cpus/apu_cpu@4";
cpu5 = "/cpus/apu_cpu@5";
cpu6 = "/cpus/apu_cpu@6";
cpu7 = "/cpus/apu_cpu@7";
rpu_a = "/cpus/rpu_a@0";
rpu_cpu0 = "/cpus/rpu_a@0/rpu_cpu_a@0";
rpu_cpu1 = "/cpus/rpu_a@0/rpu_cpu_a@1";
rpu_b = "/cpus/rpu_b@0";
rpu_cpu2 = "/cpus/rpu_b@0/rpu_cpu_b@0";
rpu_cpu3 = "/cpus/rpu_b@0/rpu_cpu_b@1";
rpu_c = "/cpus/rpu_c@0";
rpu_cpu4 = "/cpus/rpu_c@0/rpu_cpu_c@0";
rpu_cpu5 = "/cpus/rpu_c@0/rpu_cpu_c@1";
rpu_d = "/cpus/rpu_d@0";
rpu_cpu6 = "/cpus/rpu_d@0/rpu_cpu_d@0";
rpu_cpu7 = "/cpus/rpu_d@0/rpu_cpu_d@1";
rpu_e = "/cpus/rpu_e@0";
rpu_cpu8 = "/cpus/rpu_e@0/rpu_cpu_e@0";
rpu_cpu9 = "/cpus/rpu_e@0/rpu_cpu_e@1";
amba_apu = "/amba_apu@0";
timer = "/amba_apu@0/timer";
amba_apu_gic = "/amba_apu_gic@0";
gic = "/amba_apu_gic@0/interrupt-controller@0xe2000000";
amba_alias = "/amba_alias@0";
qemu_sysmem = "/qemu_sysmem@0";
psm0 = "/dummy_ppu0@0";
pmc_ppu0 = "/dummy_ppu0@0";
pmc_ppu1 = "/dummy_ppu1@0";
ddrmc_ub0 = "/dummy_ddrmc0@0";
ddrmc_ub1 = "/dummy_ddrmc1@0";
ddr = "/ddr@0x00000000";
ddr_2 = "/ddr_2@0x800000000ULL";
mdio0 = "/mdio";
phy0 = "/mdio/phy@1";
phy1 = "/mdio/phy@2";
cpunone = "/cpu_dummy";
smmu_tbu7 = "/tbu7_slave@0";
smmu_tbu8 = "/tbu8_slave@0";
smmu_tbu9 = "/tbu9_slave@0";
smmu_tbu10 = "/tbu10_slave@0";
smmu_tbu11 = "/tbu11_slave@0";
smmu_tbu12 = "/tbu12_slave@0";
mr_rpu_gic_a = "/mr_rpu_gic_a@0";
rpu_gic_a = "/mr_rpu_gic_a@0/rpu_gic_a@0x0";
mr_rpu_gic_b = "/mr_rpu_gic_b@0";
rpu_gic_b = "/mr_rpu_gic_b@0/rpu_gic_b@0x0";
mr_rpu_gic_c = "/mr_rpu_gic_c@0";
rpu_gic_c = "/mr_rpu_gic_c@0/rpu_gic_c@0x0";
mr_rpu_gic_d = "/mr_rpu_gic_d@0";
rpu_gic_d = "/mr_rpu_gic_d@0/rpu_gic_d@0x0";
mr_rpu_gic_e = "/mr_rpu_gic_e@0";
rpu_gic_e = "/mr_rpu_gic_e@0/rpu_gic_e@0x0";
tcm_core0 = "/tcm_core@0";
atcm_rpu_core0 = "/tcm_core@0/atcm_rpu_core0@0x00000";
btcm_rpu_core0 = "/tcm_core@0/btcm_rpu_core0@0x00000";
ctcm_rpu_core0 = "/tcm_core@0/ctcm_rpu_core0@0x00000";
tcm_core1 = "/tcm_core@1";
atcm_rpu_core1 = "/tcm_core@1/atcm_rpu_core1@0x00000";
btcm_rpu_core1 = "/tcm_core@1/btcm_rpu_core1@0x00000";
ctcm_rpu_core1 = "/tcm_core@1/ctcm_rpu_core1@0x00000";
tcm_core2 = "/tcm_core@2";
atcm_rpu_core2 = "/tcm_core@2/atcm_rpu_core2@0x00000";
btcm_rpu_core2 = "/tcm_core@2/btcm_rpu_core2@0x00000";
ctcm_rpu_core2 = "/tcm_core@2/ctcm_rpu_core2@0x00000";
tcm_core3 = "/tcm_core@3";
atcm_rpu_core3 = "/tcm_core@3/atcm_rpu_core3@0x00000";
btcm_rpu_core3 = "/tcm_core@3/btcm_rpu_core3@0x00000";
ctcm_rpu_core3 = "/tcm_core@3/ctcm_rpu_core3@0x00000";
tcm_core4 = "/tcm_core@4";
atcm_rpu_core4 = "/tcm_core@4/atcm_rpu_core4@0x00000";
btcm_rpu_core4 = "/tcm_core@4/btcm_rpu_core4@0x00000";
ctcm_rpu_core4 = "/tcm_core@4/ctcm_rpu_core4@0x00000";
tcm_core5 = "/tcm_core@5";
atcm_rpu_core5 = "/tcm_core@5/atcm_rpu_core5@0x00000";
btcm_rpu_core5 = "/tcm_core@5/btcm_rpu_core5@0x00000";
ctcm_rpu_core5 = "/tcm_core@5/ctcm_rpu_core5@0x00000";
tcm_core6 = "/tcm_core@6";
atcm_rpu_core6 = "/tcm_core@6/atcm_rpu_core6@0x00000";
btcm_rpu_core6 = "/tcm_core@6/btcm_rpu_core6@0x00000";
ctcm_rpu_core6 = "/tcm_core@6/ctcm_rpu_core6@0x00000";
tcm_core7 = "/tcm_core@7";
atcm_rpu_core7 = "/tcm_core@7/atcm_rpu_core7@0x00000";
btcm_rpu_core7 = "/tcm_core@7/btcm_rpu_core7@0x00000";
ctcm_rpu_core7 = "/tcm_core@7/ctcm_rpu_core7@0x00000";
tcm_core8 = "/tcm_core@8";
atcm_rpu_core8 = "/tcm_core@8/atcm_rpu_core8@0x00000";
btcm_rpu_core8 = "/tcm_core@8/btcm_rpu_core8@0x00000";
ctcm_rpu_core8 = "/tcm_core@8/ctcm_rpu_core8@0x00000";
tcm_core9 = "/tcm_core@9";
atcm_rpu_core9 = "/tcm_core@9/atcm_rpu_core9@0x00000";
btcm_rpu_core9 = "/tcm_core@9/btcm_rpu_core9@0x00000";
ctcm_rpu_core9 = "/tcm_core@9/ctcm_rpu_core9@0x00000";
tcm_cluster_a = "/tcm_cluster_a@0";
tcm_cluster_b = "/tcm_cluster_b@0";
tcm_cluster_c = "/tcm_cluster_c@0";
tcm_cluster_d = "/tcm_cluster_d@0";
tcm_cluster_e = "/tcm_cluster_e@0";
amba_r5_2 = "/amba_r5@2";
amba_r5_3 = "/amba_r5@3";
amba_r5_4 = "/amba_r5@4";
amba_r5_5 = "/amba_r5@5";
amba_r5_6 = "/amba_r5@6";
amba_r5_7 = "/amba_r5@7";
amba_r5_8 = "/amba_r5@8";
amba_r5_9 = "/amba_r5@9";
rpu2_s_memattr = "/rpu2_s_ma";
rpu3_s_memattr = "/rpu3_s_ma";
rpu4_s_memattr = "/rpu4_s_ma";
rpu5_s_memattr = "/rpu5_s_ma";
rpu6_s_memattr = "/rpu6_s_ma";
rpu7_s_memattr = "/rpu7_s_ma";
rpu8_s_memattr = "/rpu8_s_ma";
rpu9_s_memattr = "/rpu9_s_ma";
usb1_memattr = "/usb1_ma";
apu2_s_memattr = "/apu2_s_ma";
apu2_ns_memattr = "/apu2_ns_ma";
apu3_s_memattr = "/apu3_s_ma";
apu3_ns_memattr = "/apu3_ns_ma";
apu4_s_memattr = "/apu4_s_ma";
apu4_ns_memattr = "/apu4_ns_ma";
apu5_s_memattr = "/apu5_s_ma";
apu5_ns_memattr = "/apu5_ns_ma";
apu6_s_memattr = "/apu6_s_ma";
apu6_ns_memattr = "/apu6_ns_ma";
apu7_s_memattr = "/apu7_s_ma";
apu7_ns_memattr = "/apu7_ns_ma";
apu8_s_memattr = "/apu8_s_ma";
apu8_ns_memattr = "/apu8_ns_ma";
apu9_s_memattr = "/apu9_s_ma";
apu9_ns_memattr = "/apu9_ns_ma";
apu10_s_memattr = "/apu10_s_ma";
apu10_ns_memattr = "/apu10_ns_ma";
apu11_s_memattr = "/apu11_s_ma";
apu11_ns_memattr = "/apu11_ns_ma";
apu12_s_memattr = "/apu12_s_ma";
apu12_ns_memattr = "/apu12_ns_ma";
apu13_s_memattr = "/apu13_s_ma";
apu13_ns_memattr = "/apu13_ns_ma";
apu14_s_memattr = "/apu14_s_ma";
apu14_ns_memattr = "/apu14_ns_ma";
apu15_s_memattr = "/apu15_s_ma";
apu15_ns_memattr = "/apu15_ns_ma";
apu16_s_memattr = "/apu16_s_ma";
apu16_ns_memattr = "/apu16_ns_ma";
apu17_s_memattr = "/apu17_s_ma";
apu17_ns_memattr = "/apu17_ns_ma";
apu18_s_memattr = "/apu18_s_ma";
apu18_ns_memattr = "/apu18_ns_ma";
apu19_s_memattr = "/apu19_s_ma";
apu19_ns_memattr = "/apu19_ns_ma";
apu20_s_memattr = "/apu20_s_ma";
apu20_ns_memattr = "/apu20_ns_ma";
apu21_s_memattr = "/apu21_s_ma";
apu21_ns_memattr = "/apu21_ns_ma";
apu22_s_memattr = "/apu22_s_ma";
apu22_ns_memattr = "/apu22_ns_ma";
apu23_s_memattr = "/apu23_s_ma";
apu23_ns_memattr = "/apu23_ns_ma";
apu24_s_memattr = "/apu24_s_ma";
apu24_ns_memattr = "/apu24_ns_ma";
apu25_s_memattr = "/apu25_s_ma";
apu25_ns_memattr = "/apu25_ns_ma";
apu26_s_memattr = "/apu26_s_ma";
apu26_ns_memattr = "/apu26_ns_ma";
apu27_s_memattr = "/apu27_s_ma";
apu27_ns_memattr = "/apu27_ns_ma";
apu28_s_memattr = "/apu28_s_ma";
apu28_ns_memattr = "/apu28_ns_ma";
apu29_s_memattr = "/apu29_s_ma";
apu29_ns_memattr = "/apu29_ns_ma";
apu30_s_memattr = "/apu30_s_ma";
apu30_ns_memattr = "/apu30_ns_ma";
apu31_s_memattr = "/apu31_s_ma";
apu31_ns_memattr = "/apu31_ns_ma";
asu_cpu_memattr = "/asu_cpu_ma";
lmb_amba_asu = "/lmb_amba_asu@0";
ocm_mem = "/ocm_mem@0xbbe00000";
asu_dram = "/asu_data_ram_wrapper@0xebe40000";
psm_gic_proxy = "/psm_gic_proxy@0";
asu_cpu = "/asu_cpu@0";
};
};