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106 lines
3.8 KiB
106 lines
3.8 KiB
/* |
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* Copyright (c) 2017 Intel Corporation. |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#include <zephyr/toolchain.h> |
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#include <zephyr/linker/sections.h> |
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#include <zephyr/sw_isr_table.h> |
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#include <zephyr/arch/cpu.h> |
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/* There is an additional member at the end populated by the linker script |
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* which indicates the number of interrupts specified |
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*/ |
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struct int_list_header { |
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uint32_t table_size; |
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uint32_t offset; |
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#if defined(CONFIG_ISR_TABLES_LOCAL_DECLARATION) |
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uint32_t swi_table_entry_size; |
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uint32_t shared_isr_table_entry_size; |
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uint32_t shared_isr_client_num_offset; |
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#endif /* defined(CONFIG_ISR_TABLES_LOCAL_DECLARATION) */ |
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}; |
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/* These values are not included in the resulting binary, but instead form the |
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* header of the initList section, which is used by gen_isr_tables.py to create |
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* the vector and sw isr tables, |
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*/ |
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Z_GENERIC_SECTION(.irq_info) __used struct int_list_header _iheader = { |
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.table_size = IRQ_TABLE_SIZE, |
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.offset = CONFIG_GEN_IRQ_START_VECTOR, |
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#if defined(CONFIG_ISR_TABLES_LOCAL_DECLARATION) |
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.swi_table_entry_size = sizeof(struct _isr_table_entry), |
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#if defined(CONFIG_SHARED_INTERRUPTS) |
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.shared_isr_table_entry_size = sizeof(struct z_shared_isr_table_entry), |
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.shared_isr_client_num_offset = offsetof(struct z_shared_isr_table_entry, client_num), |
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#endif /* defined(CONFIG_SHARED_INTERRUPTS) */ |
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#endif /* defined(CONFIG_ISR_TABLES_LOCAL_DECLARATION) */ |
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}; |
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/* These are placeholder tables. They will be replaced by the real tables |
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* generated by gen_isr_tables.py. |
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* |
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* z_irq_spurious is used as a placeholder value to ensure that it is not |
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* optimized out in the first linker pass. The first linker pass must contain |
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* the same symbols as the second linker pass for the code generation to work. |
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*/ |
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/* Some arches don't use a vector table, they have a common exception entry |
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* point for all interrupts. Don't generate a table in this case. |
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*/ |
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#ifdef CONFIG_GEN_IRQ_VECTOR_TABLE |
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/* When both the IRQ vector table and the software ISR table are used, populate |
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* the IRQ vector table with the common software ISR by default, such that all |
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* indirect interrupt vectors are handled using the software ISR table; |
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* otherwise, populate the IRQ vector table with z_irq_spurious so that all |
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* un-connected IRQ vectors end up in the spurious IRQ handler. |
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*/ |
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#ifdef CONFIG_GEN_SW_ISR_TABLE |
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#define IRQ_VECTOR_TABLE_DEFAULT_ISR _isr_wrapper |
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#else |
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#define IRQ_VECTOR_TABLE_DEFAULT_ISR z_irq_spurious |
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#endif /* CONFIG_GEN_SW_ISR_TABLE */ |
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#ifdef CONFIG_IRQ_VECTOR_TABLE_JUMP_BY_CODE |
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/* Assembly code for a jump instruction. Must be set by the architecture. */ |
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#ifndef ARCH_IRQ_VECTOR_JUMP_CODE |
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#error "ARCH_IRQ_VECTOR_JUMP_CODE not defined" |
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#endif |
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#define BUILD_VECTOR(n, _) __asm(ARCH_IRQ_VECTOR_JUMP_CODE(IRQ_VECTOR_TABLE_DEFAULT_ISR)) |
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/* The IRQ vector table contains the jump opcodes towards the vector routine */ |
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void __irq_vector_table __attribute__((naked)) _irq_vector_table(void) { |
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LISTIFY(CONFIG_NUM_IRQS, BUILD_VECTOR, (;)); |
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}; |
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#else |
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/* The IRQ vector table is an array of vector addresses */ |
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const uintptr_t __irq_vector_table _irq_vector_table[IRQ_TABLE_SIZE] = { |
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[0 ...(IRQ_TABLE_SIZE - 1)] = (uintptr_t)&IRQ_VECTOR_TABLE_DEFAULT_ISR, |
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}; |
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#endif /* CONFIG_IRQ_VECTOR_TABLE_JUMP_BY_CODE */ |
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#endif /* CONFIG_GEN_IRQ_VECTOR_TABLE */ |
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/* If there are no interrupts at all, or all interrupts are of the 'direct' |
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* type and bypass the _sw_isr_table, then do not generate one. |
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*/ |
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#ifdef CONFIG_GEN_SW_ISR_TABLE |
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#ifndef CONFIG_DYNAMIC_INTERRUPTS |
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const |
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#endif |
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struct _isr_table_entry __sw_isr_table _sw_isr_table[IRQ_TABLE_SIZE] = { |
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[0 ...(IRQ_TABLE_SIZE - 1)] = {(const void *)0x42, |
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&z_irq_spurious}, |
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}; |
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#endif |
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#ifdef CONFIG_SHARED_INTERRUPTS |
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#ifndef CONFIG_DYNAMIC_INTERRUPTS |
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const |
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#endif |
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struct z_shared_isr_table_entry __shared_sw_isr_table z_shared_sw_isr_table[IRQ_TABLE_SIZE] = { |
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}; |
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#endif
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