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94 lines
2.5 KiB
94 lines
2.5 KiB
/* |
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* Copyright (c) 2017 Intel Corporation |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#include <zephyr/kernel.h> |
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#include <zephyr/arch/cpu.h> |
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#include <zephyr/init.h> |
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#include <zephyr/drivers/timer/system_timer.h> |
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#include <altera_common.h> |
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#include <zephyr/irq.h> |
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#include "altera_avalon_timer_regs.h" |
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#include "altera_avalon_timer.h" |
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/* The old driver "now" API would return a full uptime value. The new |
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* one only requires the driver to track ticks since the last announce |
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* call. Implement the new call in terms of the old one on legacy |
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* drivers by keeping (yet another) uptime value locally. |
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*/ |
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static uint32_t driver_uptime; |
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static uint32_t accumulated_cycle_count; |
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static int32_t _sys_idle_elapsed_ticks = 1; |
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#if defined(CONFIG_TEST) |
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const int32_t z_sys_timer_irq_for_test = TIMER_0_IRQ; |
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#endif |
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static void wrapped_announce(int32_t ticks) |
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{ |
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driver_uptime += ticks; |
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sys_clock_announce(ticks); |
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} |
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static void timer_irq_handler(const void *unused) |
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{ |
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ARG_UNUSED(unused); |
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accumulated_cycle_count += k_ticks_to_cyc_floor32(1); |
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/* Clear the interrupt */ |
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alt_handle_irq((void *)TIMER_0_BASE, TIMER_0_IRQ); |
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wrapped_announce(_sys_idle_elapsed_ticks); |
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} |
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uint32_t sys_clock_cycle_get_32(void) |
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{ |
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/* Per the Altera Embedded IP Peripherals guide, you cannot |
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* use a timer instance for both the system clock and timestamps |
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* at the same time. |
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* |
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* Having this function return accumulated_cycle_count + get_snapshot() |
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* does not work reliably. It's possible for the current countdown |
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* to reset to the next interval before the timer interrupt is |
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* delivered (and accumulated cycle count gets updated). The result |
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* is an unlucky call to this function will appear to jump backward |
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* in time. |
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* |
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* To properly obtain timestamps, the CPU must be configured with |
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* a second timer peripheral instance that is configured to |
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* count down from some large initial 64-bit value. This |
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* is currently unimplemented. |
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*/ |
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return accumulated_cycle_count; |
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} |
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uint32_t sys_clock_elapsed(void) |
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{ |
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return 0; |
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} |
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static int sys_clock_driver_init(void) |
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{ |
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IOWR_ALTERA_AVALON_TIMER_PERIODL(TIMER_0_BASE, |
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k_ticks_to_cyc_floor32(1) & 0xFFFF); |
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IOWR_ALTERA_AVALON_TIMER_PERIODH(TIMER_0_BASE, |
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(k_ticks_to_cyc_floor32(1) >> 16) & 0xFFFF); |
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IRQ_CONNECT(TIMER_0_IRQ, 0, timer_irq_handler, NULL, 0); |
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irq_enable(TIMER_0_IRQ); |
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alt_avalon_timer_sc_init((void *)TIMER_0_BASE, 0, |
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TIMER_0_IRQ, k_ticks_to_cyc_floor32(1)); |
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return 0; |
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} |
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SYS_INIT(sys_clock_driver_init, PRE_KERNEL_2, |
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CONFIG_SYSTEM_CLOCK_INIT_PRIORITY);
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