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227 lines
7.8 KiB
227 lines
7.8 KiB
/* |
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* Copyright (c) 2023 ENE Technology Inc. |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#define DT_DRV_COMPAT ene_kb1200_gpio |
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#include <zephyr/drivers/gpio.h> |
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#include <zephyr/kernel.h> |
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#include <zephyr/drivers/gpio/gpio_utils.h> |
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#include <zephyr/sys/util_macro.h> |
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#include <zephyr/dt-bindings/gpio/ene-kb1200-gpio.h> |
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#include <reg/gpio.h> |
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#include <reg/gptd.h> |
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struct gpio_kb1200_data { |
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/* gpio_driver_data needs to be first */ |
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struct gpio_driver_data common; |
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sys_slist_t cb; |
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}; |
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struct gpio_kb1200_config { |
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/* gpio_driver_config needs to be first */ |
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struct gpio_driver_config common; |
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/* base address of GPIO port */ |
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struct gpio_regs *gpio_regs; |
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struct gptd_regs *gptd_regs; |
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}; |
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static void gpio_kb1200_isr(const struct device *dev) |
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{ |
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const struct gpio_kb1200_config *config = dev->config; |
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struct gpio_kb1200_data *context = dev->data; |
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uint32_t pending_flag = config->gptd_regs->GPTDPF; |
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gpio_fire_callbacks(&context->cb, dev, pending_flag); |
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config->gptd_regs->GPTDPF |= pending_flag; |
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} |
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static int kb1200_gpio_pin_configure(const struct device *dev, gpio_pin_t pin, gpio_flags_t flags) |
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{ |
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const struct gpio_kb1200_config *config = dev->config; |
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WRITE_BIT(config->gpio_regs->GPIOFS, pin, 0); |
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/* ene specific flags. low voltage mode,input voltage threshold (ViH & ViL) support 1.8V */ |
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if (flags & KB1200_GPIO_VOLTAGE_POS) { |
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WRITE_BIT(config->gpio_regs->GPIOLV, pin, 1); |
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} else { |
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WRITE_BIT(config->gpio_regs->GPIOLV, pin, 0); |
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} |
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/* ene specific flags. max current driving ability, max support 16 mA */ |
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if (flags & KB1200_GPIO_DRIVING_16MA) { |
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WRITE_BIT(config->gpio_regs->GPIODC, pin, 1); |
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} else { |
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WRITE_BIT(config->gpio_regs->GPIODC, pin, 0); |
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} |
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/* pull-up function */ |
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if (flags & GPIO_PULL_UP) { |
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WRITE_BIT(config->gpio_regs->GPIOPU, pin, 1); |
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} else { |
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WRITE_BIT(config->gpio_regs->GPIOPU, pin, 0); |
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} |
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/* output data high/low */ |
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if (flags & GPIO_OUTPUT_INIT_HIGH) { |
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WRITE_BIT(config->gpio_regs->GPIOD, pin, 1); |
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} else if (flags & GPIO_OUTPUT_INIT_LOW) { |
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WRITE_BIT(config->gpio_regs->GPIOD, pin, 0); |
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} |
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/* output enable function */ |
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if (flags & GPIO_OUTPUT) { |
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/* setting open-drain only when output is enabled */ |
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/* output type push-pull/open-drain */ |
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if (flags & GPIO_SINGLE_ENDED) { |
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if (flags & GPIO_LINE_OPEN_DRAIN) { |
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WRITE_BIT(config->gpio_regs->GPIOOD, pin, 1); |
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} else { |
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WRITE_BIT(config->gpio_regs->GPIOOD, pin, 0); |
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} |
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} else { |
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WRITE_BIT(config->gpio_regs->GPIOOD, pin, 0); |
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} |
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WRITE_BIT(config->gpio_regs->GPIOOE, pin, 1); |
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} else { |
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WRITE_BIT(config->gpio_regs->GPIOOE, pin, 0); |
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/* disable open-drain when output is disabled */ |
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WRITE_BIT(config->gpio_regs->GPIOOD, pin, 0); |
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} |
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/* input function always enable */ |
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WRITE_BIT(config->gpio_regs->GPIOIE, pin, 1); |
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return 0; |
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} |
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static int kb1200_gpio_port_get_raw(const struct device *dev, gpio_port_value_t *value) |
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{ |
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const struct gpio_kb1200_config *config = dev->config; |
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*value = config->gpio_regs->GPIOIN; |
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return 0; |
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} |
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static int kb1200_gpio_port_set_masked_raw(const struct device *dev, gpio_port_pins_t mask, |
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gpio_port_value_t value) |
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{ |
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const struct gpio_kb1200_config *config = dev->config; |
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config->gpio_regs->GPIOD |= (value & mask); |
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return 0; |
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} |
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static int kb1200_gpio_port_set_bits_raw(const struct device *dev, gpio_port_pins_t pins) |
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{ |
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const struct gpio_kb1200_config *config = dev->config; |
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config->gpio_regs->GPIOD |= pins; |
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return 0; |
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} |
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static int kb1200_gpio_port_clear_bits_raw(const struct device *dev, gpio_port_pins_t pins) |
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{ |
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const struct gpio_kb1200_config *config = dev->config; |
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config->gpio_regs->GPIOD &= ~pins; |
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return 0; |
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} |
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static int kb1200_gpio_port_toggle_bits(const struct device *dev, gpio_port_pins_t pins) |
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{ |
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const struct gpio_kb1200_config *config = dev->config; |
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config->gpio_regs->GPIOD ^= pins; |
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return 0; |
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} |
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static int kb1200_gpio_pin_interrupt_configure(const struct device *dev, gpio_pin_t pin, |
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enum gpio_int_mode mode, enum gpio_int_trig trig) |
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{ |
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const struct gpio_kb1200_config *config = dev->config; |
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/* Check if GPIO port needs interrupt support */ |
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if ((mode & GPIO_INT_DISABLE) || (mode & GPIO_INT_ENABLE) == 0) { |
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/* Set the mask to disable the interrupt */ |
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WRITE_BIT(config->gptd_regs->GPTDIE, pin, 0); |
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} else { |
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if (mode & GPIO_INT_EDGE) { |
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WRITE_BIT(config->gptd_regs->GPTDEL, pin, 0); |
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if (trig & GPIO_INT_HIGH_1) { |
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if (trig & GPIO_INT_LOW_0) { /* Falling & Rising edge trigger */ |
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/* Enable toggle trigger */ |
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WRITE_BIT(config->gptd_regs->GPTDCHG, pin, 1); |
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} else { /* Rising edge */ |
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/* Disable toggle trigger */ |
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WRITE_BIT(config->gptd_regs->GPTDCHG, pin, 0); |
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WRITE_BIT(config->gptd_regs->GPTDPS, pin, 1); |
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} |
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} else { /* Falling edge */ |
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/* Disable Toggle trigger */ |
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WRITE_BIT(config->gptd_regs->GPTDCHG, pin, 0); |
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WRITE_BIT(config->gptd_regs->GPTDPS, pin, 0); |
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} |
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} else { |
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WRITE_BIT(config->gptd_regs->GPTDEL, pin, 1); |
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/* Disable Toggle trigger */ |
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WRITE_BIT(config->gptd_regs->GPTDCHG, pin, 0); |
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if (trig & GPIO_INT_HIGH_1) { |
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WRITE_BIT(config->gptd_regs->GPTDPS, pin, 1); |
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} else { |
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WRITE_BIT(config->gptd_regs->GPTDPS, pin, 0); |
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} |
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} |
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/* clear pending flag */ |
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WRITE_BIT(config->gptd_regs->GPTDPF, pin, 1); |
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/* Enable the interrupt */ |
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WRITE_BIT(config->gptd_regs->GPTDIE, pin, 1); |
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} |
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return 0; |
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} |
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static int kb1200_gpio_manage_callback(const struct device *dev, struct gpio_callback *cb, bool set) |
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{ |
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struct gpio_kb1200_data *context = dev->data; |
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gpio_manage_callback(&context->cb, cb, set); |
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return 0; |
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} |
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static uint32_t kb1200_gpio_get_pending_int(const struct device *dev) |
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{ |
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const struct gpio_kb1200_config *const config = dev->config; |
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return config->gptd_regs->GPTDPF; |
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} |
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static DEVICE_API(gpio, kb1200_gpio_api) = { |
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.pin_configure = kb1200_gpio_pin_configure, |
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.port_get_raw = kb1200_gpio_port_get_raw, |
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.port_set_masked_raw = kb1200_gpio_port_set_masked_raw, |
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.port_set_bits_raw = kb1200_gpio_port_set_bits_raw, |
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.port_clear_bits_raw = kb1200_gpio_port_clear_bits_raw, |
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.port_toggle_bits = kb1200_gpio_port_toggle_bits, |
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.pin_interrupt_configure = kb1200_gpio_pin_interrupt_configure, |
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.manage_callback = kb1200_gpio_manage_callback, |
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.get_pending_int = kb1200_gpio_get_pending_int, |
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}; |
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#define KB1200_GPIO_INIT(n) \ |
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static int kb1200_gpio_##n##_init(const struct device *dev) \ |
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{ \ |
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IRQ_CONNECT(DT_INST_IRQ_BY_IDX(n, 0, irq), DT_INST_IRQ_BY_IDX(n, 0, priority), \ |
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gpio_kb1200_isr, DEVICE_DT_INST_GET(n), 0); \ |
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irq_enable(DT_INST_IRQ_BY_IDX(n, 0, irq)); \ |
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IRQ_CONNECT(DT_INST_IRQ_BY_IDX(n, 1, irq), DT_INST_IRQ_BY_IDX(n, 1, priority), \ |
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gpio_kb1200_isr, DEVICE_DT_INST_GET(n), 0); \ |
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irq_enable(DT_INST_IRQ_BY_IDX(n, 1, irq)); \ |
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return 0; \ |
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}; \ |
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static const struct gpio_kb1200_config port_##n##_kb1200_config = { \ |
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.common = {.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(n)}, \ |
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.gpio_regs = (struct gpio_regs *)DT_INST_REG_ADDR_BY_IDX(n, 0), \ |
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.gptd_regs = (struct gptd_regs *)DT_INST_REG_ADDR_BY_IDX(n, 1), \ |
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}; \ |
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static struct gpio_kb1200_data gpio_kb1200_##n##_data; \ |
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DEVICE_DT_INST_DEFINE(n, kb1200_gpio_##n##_init, NULL, &gpio_kb1200_##n##_data, \ |
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&port_##n##_kb1200_config, PRE_KERNEL_1, CONFIG_GPIO_INIT_PRIORITY, \ |
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&kb1200_gpio_api); |
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DT_INST_FOREACH_STATUS_OKAY(KB1200_GPIO_INIT)
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