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105 lines
3.4 KiB
105 lines
3.4 KiB
/* |
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* Copyright 2023-2024 NXP |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#include <zephyr/devicetree.h> |
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#include <soc.h> |
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#define FLEXRAM_DT_NODE DT_INST(0, nxp_flexram) |
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#define IOMUXC_GPR_DT_NODE DT_NODELABEL(iomuxcgpr) |
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#if defined(CONFIG_MEMC_NXP_FLEXRAM_MAGIC_ADDR_API) || \ |
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defined(CONFIG_MEMC_NXP_FLEXRAM_ERROR_INTERRUPT) |
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#define FLEXRAM_INTERRUPTS_USED |
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#endif |
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#if DT_PROP_HAS_IDX(FLEXRAM_DT_NODE, flexram_bank_spec, 0) |
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#define FLEXRAM_RUNTIME_BANKS_USED 1 |
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#endif |
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#ifdef FLEXRAM_INTERRUPTS_USED |
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enum memc_flexram_interrupt_cause { |
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#ifdef CONFIG_MEMC_NXP_FLEXRAM_ERROR_INTERRUPT |
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flexram_ocram_access_error, |
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flexram_itcm_access_error, |
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flexram_dtcm_access_error, |
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#endif |
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#ifdef CONFIG_MEMC_NXP_FLEXRAM_MAGIC_ADDR_API |
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flexram_ocram_magic_addr, |
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flexram_itcm_magic_addr, |
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flexram_dtcm_magic_addr, |
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#endif /* CONFIG_MEMC_NXP_FLEXRAM_MAGIC_ADDR_API */ |
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}; |
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typedef void (*flexram_callback_t)(enum memc_flexram_interrupt_cause, void *user_data); |
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void memc_flexram_register_callback(flexram_callback_t callback, void *user_data); |
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#endif /* FLEXRAM_INTERRUPTS_USED */ |
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#ifdef FLEXRAM_RUNTIME_BANKS_USED |
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/* |
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* call from platform_init to set up flexram if using runtime map |
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* must be inlined because cannot use stack |
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*/ |
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#define GPR_FLEXRAM_REG_FILL(node_id, prop, idx) \ |
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(((uint32_t)DT_PROP_BY_IDX(node_id, prop, idx)) << (2 * idx)) |
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static inline void memc_flexram_dt_partition(void) |
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{ |
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/* iomuxc_gpr must be const (in ROM region) because used in reconfiguring ram */ |
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static IOMUXC_GPR_Type *const iomuxc_gpr = |
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(IOMUXC_GPR_Type *)DT_REG_ADDR(IOMUXC_GPR_DT_NODE); |
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/* do not create stack variables or use any data from ram in this function */ |
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#if defined(CONFIG_SOC_SERIES_IMXRT11XX) |
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iomuxc_gpr->GPR17 = (DT_FOREACH_PROP_ELEM_SEP(FLEXRAM_DT_NODE, flexram_bank_spec, |
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GPR_FLEXRAM_REG_FILL, (+))) & 0xFFFF; |
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iomuxc_gpr->GPR18 = (((DT_FOREACH_PROP_ELEM_SEP(FLEXRAM_DT_NODE, flexram_bank_spec, |
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GPR_FLEXRAM_REG_FILL, (+)))) >> 16) & 0xFFFF; |
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#elif defined(CONFIG_SOC_SERIES_IMXRT10XX) |
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iomuxc_gpr->GPR17 = DT_FOREACH_PROP_ELEM_SEP(FLEXRAM_DT_NODE, flexram_bank_spec, |
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GPR_FLEXRAM_REG_FILL, (+)); |
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#endif |
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iomuxc_gpr->GPR16 |= IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL_MASK; |
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} |
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#endif /* FLEXRAM_RUNTIME_BANKS_USED */ |
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#ifdef CONFIG_MEMC_NXP_FLEXRAM_MAGIC_ADDR_API |
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/** @brief Sets magic address for OCRAM |
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* |
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* Magic address allows core interrupt from FlexRAM when address |
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* is accessed. |
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* |
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* @param ocram_addr: An address in OCRAM to set magic function on. |
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* @retval 0 on success |
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* @retval -EINVAL if ocram_addr is not in OCRAM |
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* @retval -ENODEV if there is no OCRAM allocation in flexram |
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*/ |
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int memc_flexram_set_ocram_magic_addr(uint32_t ocram_addr); |
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/** @brief Sets magic address for ITCM |
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* |
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* Magic address allows core interrupt from FlexRAM when address |
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* is accessed. |
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* |
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* @param itcm_addr: An address in ITCM to set magic function on. |
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* @retval 0 on success |
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* @retval -EINVAL if itcm_addr is not in ITCM |
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* @retval -ENODEV if there is no ITCM allocation in flexram |
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*/ |
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int memc_flexram_set_itcm_magic_addr(uint32_t itcm_addr); |
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/** @brief Sets magic address for DTCM |
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* |
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* Magic address allows core interrupt from FlexRAM when address |
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* is accessed. |
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* |
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* @param dtcm_addr: An address in DTCM to set magic function on. |
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* @retval 0 on success |
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* @retval -EINVAL if dtcm_addr is not in DTCM |
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* @retval -ENODEV if there is no DTCM allocation in flexram |
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*/ |
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int memc_flexram_set_dtcm_magic_addr(uint32_t dtcm_addr); |
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#endif /* CONFIG_MEMC_NXP_FLEXRAM_MAGIC_ADDR_API */
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