/*
 * Copyright (c) 2025 Nordic Semiconductor ASA
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/* Test requires loopback between P1.23 and P1.24.
 * For best performance, PDM_CLK shall be on 'Clock pin'.
 */

/ {
	aliases {
		dmic-dev = &pdm20;
	};
};

&pinctrl {
	pdm20_default_alt: pdm20_default_alt {
		group1 {
			psels = <NRF_PSEL(PDM_CLK, 1, 23)>,
				<NRF_PSEL(PDM_DIN, 1, 24)>;
		};
	};
};

dmic_dev: &pdm20 {
	status = "okay";
	pinctrl-0 = <&pdm20_default_alt>;
	pinctrl-names = "default";
	clock-source = "PCLK32M";
};