Tree:
fdc20fdff6
backport-73945-to-v2.7-branch
backport-78976-to-v3.7-branch
backport-80768-to-v3.7-branch
backport-81533-to-v4.0-branch
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backport-86218-to-v4.1-branch
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backport-86662-to-v4.0-branch
backport-86662-to-v4.1-branch
backport-87066-to-v4.0-branch
backport-87080-to-v4.1-branch
backport-87152-to-v4.1-branch
backport-87235-to-v4.0-branch
backport-87871-to-v3.7-branch
backport-88082-to-v4.0-branch
backport-88082-to-v4.1-branch
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backport-88406-to-v4.0-branch
backport-88560-to-v4.0-branch
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backport-88635-to-v4.1-branch
backport-89385-to-v4.1-branch
backport-89525-to-v4.1-branch
backport-89534-to-v4.1-branch
backport-89982-to-v4.0-branch
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backport-90990-to-v4.1-branch
backport-91294-to-v4.1-branch
backport-91430-to-v4.1-branch
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backport-92569-to-v4.1-branch
collab-hwm
collab-init
collab-mesh-subnet
collab-rust
collab-safety
collab-sdk-0.18-dev
collab-sdk-dev
main
v1.10-branch
v1.11-branch
v1.12-branch
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${ noResults }
1 Commits (fdc20fdff6266462875d62d2c3632fda5b4aa8e8)
Author | SHA1 | Message | Date |
---|---|---|---|
|
fdc20fdff6 |
soc: xtensa: intel_adsp: move and convert to HWMv2
Move and convert soc/xtensa/intel_adsp SoC family configurations to HWMv2 with its SoC series: `ace` (INTEL_ACE) and `cavs` (INTEL_ADSP_CAVS). Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com> |
1 year ago |
|
22c53e97b5 |
hwmv2: move all non-ported legacy boards and socs to legacy folders
To un-block continuing of soc and board porting then move all socs and boards which have not yet been ported to boards_legacy / soc_legacy folders. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no> Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no> |
1 year ago |
|
cd97eae73b |
soc: xtensa: intel_adsp: common: s/device.h/init.h
soc.c was not using any device.h API, but init.h (SYS_INIT). Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com> |
2 years ago |
|
6cdabb4dff |
soc: xtensa: intel_adsp: common: add missing section_tags.h
Needed by the `__imr` section tag. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com> |
2 years ago |
|
a5fd0d184a |
init: remove the need for a dummy device pointer in SYS_INIT functions
The init infrastructure, found in `init.h`, is currently used by: - `SYS_INIT`: to call functions before `main` - `DEVICE_*`: to initialize devices They are all sorted according to an initialization level + a priority. `SYS_INIT` calls are really orthogonal to devices, however, the required function signature requires a `const struct device *dev` as a first argument. The only reason for that is because the same init machinery is used by devices, so we have something like: ```c struct init_entry { int (*init)(const struct device *dev); /* only set by DEVICE_*, otherwise NULL */ const struct device *dev; } ``` As a result, we end up with such weird/ugly pattern: ```c static int my_init(const struct device *dev) { /* always NULL! add ARG_UNUSED to avoid compiler warning */ ARG_UNUSED(dev); ... } ``` This is really a result of poor internals isolation. This patch proposes a to make init entries more flexible so that they can accept sytem initialization calls like this: ```c static int my_init(void) { ... } ``` This is achieved using a union: ```c union init_function { /* for SYS_INIT, used when init_entry.dev == NULL */ int (*sys)(void); /* for DEVICE*, used when init_entry.dev != NULL */ int (*dev)(const struct device *dev); }; struct init_entry { /* stores init function (either for SYS_INIT or DEVICE*) union init_function init_fn; /* stores device pointer for DEVICE*, NULL for SYS_INIT. Allows * to know which union entry to call. */ const struct device *dev; } ``` This solution **does not increase ROM usage**, and allows to offer clean public APIs for both SYS_INIT and DEVICE*. Note that however, init machinery keeps a coupling with devices. **NOTE**: This is a breaking change! All `SYS_INIT` functions will need to be converted to the new signature. See the script offered in the following commit. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no> init: convert SYS_INIT functions to the new signature Conversion scripted using scripts/utils/migrate_sys_init.py. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no> manifest: update projects for SYS_INIT changes Update modules with updated SYS_INIT calls: - hal_ti - lvgl - sof - TraceRecorderSource Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no> tests: devicetree: devices: adjust test Adjust test according to the recently introduced SYS_INIT infrastructure. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no> tests: kernel: threads: adjust SYS_INIT call Adjust to the new signature: int (*init_fn)(void); Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no> |
2 years ago |
|
3659c2db4b |
intel_common: clean up & rename cavs_* to adsp_*
ADSP common definitions has been fixed and changed from CAVS_* to ADSP_* Signed-off-by: Arsen Eloglian <ArsenX.Eloglian@intel.com> |
3 years ago |
|
fc95ec98dd |
smp: Convert #if to use CONFIG_MP_MAX_NUM_CPUS
Convert CONFIG_MP_NUM_CPUS to CONFIG_MP_MAX_NUM_CPUS as we work on phasing out CONFIG_MP_NUM_CPUS. Signed-off-by: Kumar Gala <kumar.gala@intel.com> |
3 years ago |
|
1983a4c50c |
boards, dts: fix namespace for intel adsp cavs, ace
Fixes namespace for Intel ADSP CAVS and ACE boards. Signed-off-by: Lauren Murphy <lauren.murphy@intel.com> |
3 years ago |
|
fc97a71c4d |
intel_adsp: use one soc_init for all series
initializing the SoC is the same across series, so put everything in one place in the common code base. Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
3 years ago |
|
24f2fa96dc |
intel_adsp: Move cavs common files to a subdir
Inside the common directory there were files that are CAVS specific and are not used by ACE_V1X. Lets create a subdir called cavs inside the common to put files that are common for only cavs plaftorms. Note that there are still remaining code that in the common folder that are using cavs namespace like "cavs_ipc_*" that may need some additional work. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com> |
3 years ago |
|
43371d0414 |
intel_adsp: move cavs to be a series
Intel ADSP CAVS is now a proper series with all CAVS SoCs running under it. This will give us to Intel ADSP series: - CAVS - ACE v1.x Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
3 years ago |
|
1f1b10eb26 |
intel_adsp: move register definition from soc.c to shim header
Declare those register in the adsp_shim header instead of the code applying ifdefs that limit the scope to only specific SoCs. Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
3 years ago |
|
453f37c3d9 |
intel_adsp: shim: cleanup shim header
Remove conditional code and SOC specific defines. Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
3 years ago |
|
423264b96b |
intel_adsp: make shim header soc specific
using once single header to support multiple socs and product generations is error prone and not easily maintained. Over time we have been adding conditional code in headers and extending structs to support new HW features which becomes a problem. Goal is to keep platform headers in sync with hardware specification and allow of introduction of new platforms and hardware features by just introducing a new SoC with its own set of headers. This is now just a copy of existing cavs-shim.h with slight changes, goal is to clean this up long term and sync with hardware datasheets and align on naming as well. Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
3 years ago |
|
f72cdeb896 |
intel_adsp: common: remove unnecessary ifndefs
cavs15 has its own boot path, so no need to check for it in code it does not run. Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
3 years ago |
|
2f83adae93 |
intel_adsp: common: build soc.c only for CAVS
build soc.c only for platforms that can use it. Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
3 years ago |
|
0ce9446978 |
soc/xtensa/intel_adsp: Add cAVS clock driver
Simple driver that allows one to choose the clock speed of xtensa cores. Signed-off-by: Ederson de Souza <ederson.desouza@intel.com> |
3 years ago |
|
0e69129fb3 |
soc: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all soc code to the new prefix <zephyr/...>. Note that the conversion has been scripted, refer to zephyrproject-rtos#45388 for more details. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no> |
3 years ago |
|
b22d8bfc46 |
soc/intel_asdp: take ownership of i2s and dmic registers
Take ownership of i2s and dmic registers as otherwise they are not accessible. Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com> |
3 years ago |
|
6e10011f9b |
intel_adsp: init soc only for SoCs marked as ADSP_CAVS
Skip the soc init for not CAVS SoCs. This will be done in the non-CAVS SoC soc.c. Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
3 years ago |
|
985085ab00 |
intel_adsp: cavs: build multiprocessing code conditionally
Build code conditionally and depend on CONFIG_INTEL_ADSP_CAVS. Signed-off-by: Anas Nashif <anas.nashif@intel.com> |
3 years ago |
|
b246de1ba2 |
intel_adsp: Remove unused soc_idc_init reference
Unused as it was renamed to soc_mp_init, this is a stray left over. Signed-off-by: Tom Burdick <thomas.burdick@intel.com> |
4 years ago |
|
32c492cc0c |
soc: xtensa/intel_adsp: don't call soc_mp_init if MP_NUM_CPUS==1
There is no need to call soc_mp_init() if CONFIG_MP_NUM_CPUS indicates only 1 CPU is being used. This also fixes an undefined reference to soc_mp_init() since mp_cavs.c is not compiled unless the build is targeting more than 1 CPU. Signed-off-by: Daniel Leung <daniel.leung@intel.com> |
4 years ago |
|
9e524d8305 |
soc/intel_adsp: Refactor mp code to separate hardware from OS details
Clean up soc_mp.c a bit. Put all cAVS register use in functions dedicated to hardware details (e.g. "soc_start_core()"), leave the Zephyr OS tracking (e.g. the CPU start record, the active cores array, etc...) in generic code. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
4 years ago |
|
064b73a730 |
soc/intel_adsp: Don't build soc_mp.c if you don't have to
Single-core instantiations of this hardware and single-core builds of firmware still exist, so we should support that without needless bloat. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
4 years ago |
|
422c2ec0f3 |
soc/intel_adsp: Move irq handling to separate file
Most of soc.c is actually interrupt handling glue for the intc_cavs driver. Give it its own file so that SOC initialization and bringup can live separately. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
4 years ago |
|
184b795cde |
soc/intel_adsp: Move initialization code to IMR
Now that we have access to IMR memory for non-bootloader tasks, let's pick the low hanging fruit. SOC code that is only used at initialization time (or things like core halt/restart which happen only in non-realtime contexts) are now flagged __imr. This is good for 808 bytes of code moved out of the main Zephyr image on cavs_v25. In the medium term, it would be good to define a system define for this purpose (a-la Linux __init/__initdata) and start moving core Zephyr init code too. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
4 years ago |
|
3d654df137 |
soc/intel_adsp: Replace Zephyr assembly entry stub
The Zephyr symbols are now part of the same link as the bootloader, so no need to have an assembly entry stub or fixed address at all. Just call z_cstart() as a normally-relocated function. Interestingly Zephyr never put a declaration for it in public headers, because this appears to be the first platform calling it from C. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
4 years ago |
|
1a2fecec6d |
soc/intel_adsp: Unify Xtensa CPU reset between cores
Startup on these devices was sort of a mess, with multiple variants of Xtensa and platform initialization code from multiple ancestries being invoked at different places for different purposes. Just use one code path for everyone. Bootloader entry starts with a minimal assembly stub that simply sets WINDOW{START,BASE}, PS and a stack pointer and then jumps to C code. That then uses the cpu_early_init() implementation from cAVS 2.5's secondary cores to finish Xtensa initialization, and then flows directly into the pre-existing bootloader C code to initialize cache and memory and copy the HP-SRAM image, then it invokes Zephyr via a simple C function call to z_cstart(). Likewise, remove the "reset vector" from Zephyr. This was never a reset vector, reset on these devices goes to a fixed address in a ROM. CPU initialization is handled explicitly and completely in the bootloader now, in a way that can be unified between the main and secondary cores. Entry from the bootloader now goes directly into z_cstart() via a C call (via a single jump instruction placed at the entry point address -- that's going away soon too once we're using a unified link). Now that vector table initialization happens in a uniform way, there's no need to copy the VECBASE value during arch_start_cpu(). Finally note that this also reverts the CONFIG_RESET_VECTOR_IN_BOOTLOADER kconfig variable added for these platforms, because it's no longer a tunable and true always. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
4 years ago |
|
7319bd3425 |
soc/intel_adsp: Clean up cavs PWRCTL/PWRSTS/CLKCTL usage
These registers were defined in the new interface, but still being used with bare bits (and in one spot a legacy field access macro). Clean things up and use macros pervasively. To be fair: in this particular case the field names aren't particularly descriptive... Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
4 years ago |
|
430cbf430a |
soc/intel_adsp: Eliminate platform configuration headers
All the in-use contents of these files have now been moved to the intel_adsp core, and they are configured via devicetree and kconfig. Remove the legacy headers. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
4 years ago |
|
9cba8501df |
soc/intel_asdp: Unify misc. initialization registers
These two register blocks are defined in the platform layers, but never change (except on 1.5 where they don't exist). I don't want to write a full devicetree interface for them as I can't find good docs currently. They are used only at system initialization, so move the definitions to the single file where they're used. In the longer term we will want to move at least the GPDMA setup into a driver anyway. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
4 years ago |
|
ed9434c812 |
soc: intel_adsp: Clean up shim driver
Each platform was defining its own shim.h header, with slightly variant field definitions, for a register block that is almost completely compatible between versions. This is made worse by the fact that these represent an API imported fairly early from SOF, the upstream version of which has since diverged. Move the existing shim struct into a header ("cavs-shim.h") of its own, remove a bunch of unused symbols, fill in definitions for some registers that were left out, correct naming to match the hardware docs in a few places, make sure all hardware dependencies are source from devicetree only, and modify existing usage to use the new API exclusively. Interestingly this leaves the older shim.h header in place, as it turns out to contain definitions for a bunch of things that were never part of the shim register block. Those will be unified in separate patches. Finally: note that the existing IPM_CAVS_IDC driver (soon to be removed from all the intel_adsp soc's) is still using the old API, so redeclare the minimal subset that it needs for the benefit of the platforms in transition. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
4 years ago |
|
12df8fca4e |
soc: intel_asdp: Clean up soc_init() code
Reorganize the initialization code to cleanly separate the platforms and clarify which code is common. The #if'ery was sort of a mess. This is in preparation for an incoming patch that unifies the shim register definitions across platform variants. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
4 years ago |
|
0228c05681 |
soc: intel_adsp: New IDC driver
The original interface for the intra-DSP communication hardware on these devices was buried inside a Zephyr IPM implementation. Unfortunately IPM is a two-endpoint point-to-point communication layer, it can't represent the idea of devices with more than 2 cores. And our usage (to push a no-argument/no-response scheduler IPI) was sort of an abuse of that metaphor anyway. Add a new IDC interface at the SOC layer, borrowing the C struct convention already used for the DSP shim registers. Augment with extensive documentation, extracted via a ton of experimentation on cAVS 2.5 hardware. Note that this leaves the previous driver in place for the cavs_v15 and intel_s1000 devices. In principle they should use it too (the hardware registers are identical), but this hasn't been validated yet. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
4 years ago |
|
8a21dc8245 |
xtensa: intel_adsp: align SoC initialization with SOF
This aligns the SoC initialization with the one in SOF, especially the manipulation of clock control and power control registers. These registers are not entirely the same across CAVS versions, so we need to deal with them according to which version we are building for. This also consolidates the macros for these registers to the one provided by SOF (soc/shim.h) to avoid duplication. Another note is that the usage of clock gating bit was not correct. In SOF, clock gating of SoC cores should be allowed but the old code in Zephyr prevented clock gating, which has the potential to prevent the whole DSP from going into low power mode. Signed-off-by: Daniel Leung <daniel.leung@intel.com> |
4 years ago |
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a0a9a67e58 |
soc/intel_adsp: Fix timing/clock register ownership on cAVS 1.8+
The wall clock timer is not (per documentation) part of the "timestamping" register set on the DSP. And its counter and comparator registers work fine always. But if the DSP isn't set as the "owner" of the timestamp hardware, wall clock interrupts never arrive. Also grab the PLL ownership too, because SOF already does anyway. While we don't have a dynamic clock driver yet, we will surely want one soon and will needt this. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
4 years ago |
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88c0063a3f |
xtensa: Intel ADSP: fix a typo
Fix a copy-paste typo. Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com> |
4 years ago |
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eb1ef50b6b |
arch/xtensa: General cleanup, remove dead code
There was a bunch of dead historical cruft floating around in the arch/xtensa tree, left over from older code versions. It's time to do a cleanup pass. This is entirely refactoring and size optimization, no behavior changes on any in-tree devices should be present. Among the more notable changes: + xtensa_context.h offered an elaborate API to deal with a stack frame and context layout that we no longer use. + xtensa_rtos.h was entirely dead code + xtensa_timer.h was a parallel abstraction layer implementing in the architecture layer what we're already doing in our timer driver. + The architecture thread structs (_callee_saved and _thread_arch) aren't used by current code, and had dead fields that were removed. Unfortunately for standards compliance and C++ compatibility it's not possible to leave an empty struct here, so they have a single byte field. + xtensa_api.h was really just some interrupt management inlines used by irq.h, so fold that code into the outer header. + Remove the stale assembly offsets. This architecture doesn't use that facility. All told, more than a thousand lines have been removed. Not bad. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
4 years ago |
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544a38ee62 |
soc/xtensa/intel_adsp: Upstream updates
Significant rework of the Intel Audio DSP SoC/board layers. Includes code from the following upstream commits: Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Thu Jun 25 16:34:36 2020 +0100 xtesna: adsp: use 50k ticks per sec for audio Audio needs high resolution scheduling so schedule to nearest 20uS. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Andy Ross <andrew.j.ross@intel.com> Date: Wed Jun 24 13:59:01 2020 -0700 soc/xtensa/intel_adsp: Remove sof-config.h includes This header isn't used any more, and in any case shouldn't be included by SoC-layer Zephyr headers that need to be able to build without SOF. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> Author: Andy Ross <andrew.j.ross@intel.com> Date: Sat Jun 20 15:42:58 2020 -0700 soc/intel_adsp: Leave interrupts disabled at MP startup This had some code that was pasted in from esp32 that was inexplicably enabling interrupts when starting an auxiliary CPU. The original intent was that the resulting key would be passed down to the OS, but that's a legacy SMP mechanism and unused. What it actually did was SET the resulting value in PS.INTLEVEL, enabling interrupts globally before the CPU is ready to handle them. Just remove. The system doesn't need to enable interrupts until the entrance to the first user thread on this CPU, which will do it automatically as part of the context switch. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue Jun 23 13:57:54 2020 +0300 dts: intel_cavs: Add required label Add required label fixing build for CAVS15, 20, 25. Fixes following errors: ... devicetree error: 'label' is marked as required in 'properties:' in bindings/interrupt-controller/intel,cavs-intc.yaml, but does not appear in ... Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue Jun 23 15:19:56 2020 +0300 soc: cavs_v18: Remove dts_fixup and fix build Remove unused now dts_fixup.h and fix build with the recent code base. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue Jun 23 15:12:25 2020 +0300 soc: cavs_v20: Remove dts_fixup and fix build Remove unused now dts_fixup.h and fix build with the recent code base. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue Jun 23 14:59:23 2020 +0300 soc: cavs_v25: Remove dts_fixup fix build Remove unused now dts_fixup and fix build with the latest code base. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Fri Jun 12 12:29:06 2020 +0300 soc: intel_adsp: Remove unused functions Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Wed Jun 10 17:53:58 2020 +0300 soc: intel_adsp: Clean up soc.h Remove unused or duplicated definitions. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Wed Jun 10 17:02:23 2020 +0300 soc: intel_adsp: De-duplicate soc.h Move soc.h to common SOC area. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Wed Jun 10 15:54:19 2020 +0300 soc: intel_adsp: Remove duplicated io.h Move duplicated io.h to common SOC area. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Fri Jun 12 12:39:46 2020 +0300 cmake: Correct SOC_SERIES name for byt and bdw Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Fri Jun 12 12:39:02 2020 +0300 soc: intel_adsp: Build bootloader only for specific SOCs Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Thu Jun 11 13:46:25 2020 +0100 boards: xtensa: adsp: add byt and bdw boards WIP Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Andy Ross <andrew.j.ross@intel.com> Date: Wed Jun 10 10:01:29 2020 -0700 soc/intel_adsp: Make the HDA timer the default always The CAVS_TIMER was originally written because the CCOUNT values are skewed between SMP CPUs, so it's the default when SMP=y. But really it should be the default always, the 19.2 MHz timer is plenty fast enough to be the Zephyr cycle timer, and it's rate is synchronized across the whole system (including the host CPU), making it a better choice for timing-sensitive applications. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Wed Jun 10 15:21:43 2020 +0300 soc: cavs_v25: Enable general samples build Enables general samples build for SOC cavs_v25. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Wed Jun 10 15:13:53 2020 +0300 soc: cavs_v20: Enable general samples build Enable general sample build. Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Wed Jun 10 14:35:13 2020 +0300 soc: cavs_v18: Fix build general samples Fix building general samples for CAVS18. Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Wed Jun 10 14:22:40 2020 +0300 soc: intel_adsp: Add support for other SOCs Support other SOCs in the "ready" message to the Host. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Wed Jun 10 13:25:39 2020 +0300 soc: intel_adsp: Move adsp.c to common SOC area Move adsp.c to common and clean makefiles. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue Jun 9 17:18:18 2020 +0300 boards: intel_adsp: Remove dependency on SOF Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Tue Jun 9 14:29:44 2020 +0100 soc: xtensa: cavs: build now good for cavs20 + 25 Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue Jun 9 15:57:01 2020 +0300 soc: cavs_v15: Fix build for hello_world Fix build for other then audio/sof targets. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue Jun 9 14:50:12 2020 +0300 sample: audio/sof: Remove old overlays Removing old overlays used to switch logging backend. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Mon Jun 8 15:02:01 2020 +0300 soc: intel_adsp: Correct TEXT area Correct HEADER_SPACE and put TEXT to: (HP_SRAM_WIN0_BASE + HP_SRAM_WIN0_SIZE + VECTOR_TBL_SIZE) Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue Jun 9 14:44:47 2020 +0300 soc: intel_adsp: Trivial syntax cleanup Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue Jun 9 14:41:07 2020 +0300 soc: intel_adsp: Fix bootloader script path Make it possible to find linker script if build is done not inside ZEPHYR_BASE. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Tue Jun 9 12:10:17 2020 +0100 soc: xtensa: cavs20/25: fix build with new headers - WIP Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue Jun 9 13:35:38 2020 +0300 soc: intel_adsp: Fix include headers Fixes include headers Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Tue Jun 9 10:38:50 2020 +0100 soc: xtensa: cav18: updated headers- WIP Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Andy Ross <andrew.j.ross@intel.com> Date: Fri May 1 15:29:26 2020 -0700 soc/xtensa/intel_adsp: Clean up MP config logic CONFIG_MP_NUM_CPUS is a platform value, indicating the number of CPUs for which the Zephyr image is built. This is the value kernel and device code should use to predicate questions like "is there more than one CPU?" CONFIG_SMP is an application tunable, controlling whether or not the kernel schedules threads on CPUs other than the first one. This is orthogonal to MP_NUM_CPUS: it's possible to build a "SMP" kernel on a uniprocessor system or have a UP kernel on a MP system if the other cores are used for non-thread application code. CONFIG_SCHED_IPI_SUPPORTED is a platform flag telling an SMP kernel whether or not it can synchronously signal other CPUs of scheduler state changes. It should be inspected only inside the scheduler (or other code that uses the API). This should be selected in kconfig by soc layer code, or by a driver that implements the feature. CONFIG_IPM_CAVS_IDC is a driver required to implement IPI on this platform. This is what we should use as a predicate if we have dependence on the IPM driver for a platform feature. These were all being sort of borged together in code. Split them up correctly, allowing the platform MP layer to be unit tested in the absence of SMP (c.f. tests/kernel/mp), and SMP kernels with only one CPU (which is pathlogical in practice, but also a very good unit test) to be built. Also removes some dead linker code for SMP-related sections that don't exist in Zephyr. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon Jun 8 16:41:55 2020 +0100 soc: xtensa: bootloader - use linker script Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon Jun 8 16:26:18 2020 +0100 soc: xtensa: further fix headers - WIP Simplify the directory structure, WIP for cavs20 and cavs25 Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Mon Jun 8 12:59:30 2020 +0300 soc: cavs_v15: Remove unneeded include Remove include fixing build. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Sun Jun 7 12:37:35 2020 +0100 soc:xtensa: adsp: remove sof specific code from soc headers TODO: v1.8+ Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Marc Herbert <marc.herbert@intel.com> Date: Thu Jun 4 23:19:37 2020 -0700 intel_adsp_*/doc: fix duplicate .rst labels Quick fix purely to make the build green again. Signed-off-by: Marc Herbert <marc.herbert@intel.com> Author: Marc Herbert <marc.herbert@intel.com> Date: Thu Jun 4 22:34:40 2020 -0700 samples/audio/sof: use OVERLAY_CONFIG to import apollolake_defconfig This reverts commit 21f16b5b1d29fca83d1b62b1b75683b5a1bc2935 that copied it here instead. Signed-off-by: Marc Herbert <marc.herbert@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Fri Jun 5 12:34:48 2020 +0300 soc: intel_adsp: Move soc_mp to common Moving soc_mp to common SOC area, it still needs fixes for taking number of cores from Zephyr Kconfig, etc. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Thu Jun 4 16:05:06 2020 +0300 soc: intel_adsp: Move memory.h from lib/ For those files from SOF referencing platform/lib/memory.h we have include. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Thu Jun 4 15:20:09 2020 +0300 soc: intel_adsp: Rename platform.h to soc.h Rename to prevent including it from SOF. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Thu Jun 4 11:47:55 2020 +0300 soc: intel_adsp: Move headers Move headers to more convenient place Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Thu Jun 4 11:21:51 2020 +0300 soc: intel_adsp: More SOC cleaning Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Marc Herbert <marc.herbert@intel.com> Date: Mon Jun 1 15:31:34 2020 -0700 samples/audio/sof: import sof/src/arch/xtensa/ apollolake_defconfig Import modules/audio/sof/src/arch/xtensa/configs/apollolake_defconfig into prj.conf and new boards/up_squared_adsp.conf Signed-off-by: Marc Herbert <marc.herbert@intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Wed Jun 3 15:07:40 2020 +0100 soc:xtensa: adsp: let SOF configure the DSP for audio Let SOF do this for the moment. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Wed Jun 3 15:06:20 2020 +0100 soc: xtensa: cavs: remove headers similar to cavs15 Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Wed Jun 3 15:58:38 2020 +0300 soc: intel_adsp: Move ipc header to common Remove duplicated headers from CAVS to common SOC part Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Wed Jun 3 13:02:09 2020 +0300 soc: cavs_v15: Remove unneeded headers Remove also from CAVS15. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue Jun 2 18:34:11 2020 +0300 Remove more headers Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Wed Jun 3 14:12:09 2020 +0100 soc: xtensa: remove cavs sod headers for drivers and trace. Duplicate cavs15 headers. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Wed Jun 3 14:05:12 2020 +0100 samples: move sof dai, dma and clk configs to SOF Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue Jun 2 17:38:45 2020 +0300 soc: intel_adsp: Remove more duplicated headers Remove more headers Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Tue Jun 2 15:50:03 2020 +0100 samples: sof: remove pm realted files. Use the SOF versions. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue Jun 2 16:55:40 2020 +0300 WIP: Strip lib from include path WIP, pushed for sync Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue Jun 2 14:44:33 2020 +0300 soc: intel_adsp: Remove more headers Remove even more common headers Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue Jun 2 14:00:47 2020 +0300 soc: intel_adsp: Remove SOF headers The headers would be used by audio/sof app directly from SOF module. Author: Andy Ross <andrew.j.ross@intel.com> Date: Sat May 30 11:01:26 2020 -0700 soc/intel_adsp: Alternative log reading script This script speaks the same protocol and works with the same firmware, but: * Is a single file with no dependencies outside the python3 standard library and can be run out-of-tree (i.e. with setups where the firmware is not built on the device under test) * Operates in "tail" mode, where it will continue polling for more output, making it easier to watch a running process and acting more like a conventional console device. * Has no dependence on the diag_driver kernel module (it reads the DSP SRAM memory directly from the BAR mapping in the PCI device) * Is MUCH smaller than the existing tool. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Thu May 28 16:17:51 2020 +0300 Decrease HEP pool size to 192000 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Fri May 29 10:27:00 2020 +0100 soc: xtensa: cavs25: complete support for cavs25 Builds, not tested on qmeu due to missing SOF ROM (TODO) Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Fri May 29 10:24:26 2020 +0100 soc: xtensa: cavs20: complete cavs20 support Now boots on qemu. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Fri May 29 10:22:13 2020 +0100 soc: xtensa: cavs18: complete boot support Now boots on qemu. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Fri May 29 10:19:23 2020 +0100 soc: xtensa: cavs15: use cavs15 instead of apl as linker soc name Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Fri May 29 10:16:06 2020 +0100 TODO: samples: sof: work around missing trace symbols. Disable local trace. Needs trace updates finished before this can be removed. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Wed May 27 15:57:19 2020 +0100 dts: xtensa: rename apl to cavs15 DTS This DTS is used by more than APL SOC. i.e. all CAVS15 SOCs Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Wed May 27 15:52:20 2020 +0100 west: commands: sign: Add signing support for other CAVS targets Sign for CAVS15, CAVS18, CAVS20 and CAVS25 SOCs Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Wed May 27 15:50:07 2020 +0100 boards: xtensa: cavs: used Zephyr mask macro Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Wed May 27 15:49:46 2020 +0100 soc: xtensa: move code to SOF Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Tue May 26 11:40:36 2020 +0100 soc: xtensa: use SOF versions of clk Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Mon May 25 18:38:45 2020 +0300 soc: intel_adsp: Send FW ready for non SOF configuration Configure windows and send FW ready when used without SOF, should be loaded with fw_loader script. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Mon May 25 18:02:22 2020 +0300 soc: intel_adsp: Use SOF version of the file Use exact copy from SOF module. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Mon May 25 17:47:27 2020 +0300 soc: intel_adsp: Clean up include headers Remove SOF mentions from the SOC headers. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Mon May 25 17:43:05 2020 +0300 soc: intel_adsp: Move SOF specific code to samples/audio/sof Move SOF specific code to the SOF sample. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Mon May 25 17:39:42 2020 +0300 soc: intel_adsp: Use SOF module's version of mem_window.c Use exact copy from SOF module. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Mon May 25 17:36:41 2020 +0300 soc: intel_adsp: Use exact copy from SOF module Use SOF module verion of the clk.c Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Mon May 25 14:03:35 2020 +0300 soc: xtensa: Add {SOC_FAMILY}/common/include path Add ${SOC_DIR}/${ARCH}/${SOC_FAMILY}/common/include path if exist. Fixes issues for xtensa SOCs. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon May 25 16:18:50 2020 +0100 soc: xtensa: cavs common: fix headers for build Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon May 25 16:10:57 2020 +0100 soc: xtensa: adsp: add so_inthandlers.h for Intel platforms Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon May 25 16:08:26 2020 +0100 cmake: xtensa: select correct compiler per CAVS target. TODO: what about XCC ? Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue May 19 14:59:26 2020 +0300 boards: up_squared_adsp: Move SOF configuration to samples Move SOF-specific configuration to samples/audio/sof prj. Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Fri May 15 15:29:50 2020 +0300 soc: intel_adsp: Move SOF code to modules/audio/sof Move SOF dependent code out of SOC area. Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Thu May 14 17:30:38 2020 +0300 Move task_main_start() to audio/sof sample Start task_main_start() from main of audio/sof sample. Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Wed May 13 15:37:20 2020 +0300 Rename up_xtreme_adsp to intel_adsp_cavs18 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Mon Apr 27 14:12:59 2020 +0300 Add sample audio/sof for SOF initialization Add dedicated sample where we put SOF specific initialization. Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Mon May 11 18:49:36 2020 +0300 WIP: soc: cavs_v18: Cleanup Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Mon May 11 15:44:06 2020 +0300 soc: cavs_v15: Move soc init to common part Moving SOC init to the right place. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Mon May 11 15:02:28 2020 +0300 soc: intel_adsp: Move common part to special dir Moving common part to common/adsp.c Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Fri May 8 14:37:50 2020 +0300 boards: up_xtreme_adsp: Add initial up_xtreme_adsp board Add initial board copying existing up_squared_adsp board and using CAVS1.8 SOC family. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Thu May 7 15:30:51 2020 +0300 soc: intel_adsp: Generalize bootloader Move bootloader to soc/xtensa/intel_adsp making it available for other boards. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Tue May 5 21:31:00 2020 +0100 boards: xtensa: up_squared: Add support for all CAVS Add boot support for all CAVS versions. TODO: needs to be made common Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Tue May 5 21:25:34 2020 +0100 soc: xtensa: intel_adsp: Manage cache for DMA descriptors Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon May 4 21:10:50 2020 +0100 soc: xtensa: adsp: use 24M567 clock Use audio clock Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon May 4 10:04:01 2020 +0100 xtensa: soc: adsp: enable system agent Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Sun May 3 15:03:07 2020 +0100 soc: xtensa: intel_adsp: increase mem pool to 192k Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Sun May 3 15:02:31 2020 +0100 soc: xtensa: intel_adsp: re-enable DMA trace Buffer will be empty (as trace items sent to Zephyr LOG) but logic is running. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Sun May 3 11:18:55 2020 +0100 soc: xtensa: intel: dont use uncache region yet. Some code was still using this region. Use later. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Sun May 3 10:07:28 2020 +0100 soc: xtensa: intel_adsp: fix notifier init Topology now loads. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Fri May 1 21:18:38 2020 +0100 boards: up2: Need to use sof config for bootloader This will need uncoupled at some point. For testing today. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Fri May 1 21:16:38 2020 +0100 boards: up2: increase heap to 128k Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Thu Apr 30 11:35:19 2020 +0300 boards: up_squared_adsp: Use bigger HEAP Use HEAP from old demo. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Fri May 1 16:06:32 2020 +0100 soc: xtensa: intel_adsp: Fix config.h naming collisions Rename sof version to sof-config.h Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Thu Apr 30 11:22:42 2020 +0300 Small cleanups Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Wed Apr 29 22:00:44 2020 +0300 tests: sof/audio: Test ll scheduler Add more tests for scheduler. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Wed Apr 29 18:38:35 2020 +0300 tests: Add first schedule test Add initial test for testing scheduling. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Wed Apr 29 13:36:23 2020 +0100 soc: xtensa: rmeove build warnings Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue Apr 28 18:04:33 2020 +0300 soc/intel_adsp: Register sof logging Register sof logging for tracing Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue Apr 28 14:16:55 2020 +0300 boards: up_squared_adsp: Define HEAP_MEM_POOL_SIZE Define HEAP_MEM_POOL_SIZE when SOF enabled. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue Apr 28 10:09:20 2020 +0300 tests: audio/sof: Add interrupt API for testing Add initial interrupt API for testing. Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon Apr 27 15:54:28 2020 +0100 soc: xtensa: adsp: Update linker script for SOF sections. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon Apr 27 11:20:01 2020 +0100 soc: xtensa: adsp: send SOF FW metadata as boot message Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Sun Apr 26 21:47:20 2020 +0100 soc: xtensa: adsp: re-enable all SOF IP init. Do all SOF IP init. TODO: ATOMCTL, WFI on LX6 Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Sat Apr 25 15:30:40 2020 +0100 soc: xtensa: irq: Make sure IPC IRQ is registered. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Wed Apr 22 20:56:09 2020 +0300 tests: sof: Enable console Enable console for the test. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Wed Apr 22 17:57:22 2020 +0300 soc: cavs_v15: Fix XTENSA_KERNEL_CPU_PTR_SR Use correct value for XTENSA_KERNEL_CPU_PTR_SR. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Wed Apr 22 14:48:31 2020 +0300 tests: audio/sof: Add tests for alloc API testing Add initial tests for allocation API testing. Can be extended for other later. Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue Apr 21 17:49:32 2020 +0300 logging: Enable xtensa simulator backend for ADSP Enable xtensa simulator backend for SOC_FAMILY_INTEL_ADSP. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon Apr 20 20:58:30 2020 +0100 soc: xtensa: add common cpu logic Support for additional cores. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Date: Tue Apr 21 10:11:07 2020 +0300 Update west.yaml to point to the latest repo Update west.yaml Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon Apr 20 16:17:01 2020 +0100 soc: xtensa: cavs: Fix build for clk.c on cavs18+ Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon Apr 20 16:05:31 2020 +0100 soc: xtensa: cavs15: removed unused headers. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon Apr 20 16:05:09 2020 +0100 soc: xtensa: cavs25: align with SOF headers Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon Apr 20 16:03:52 2020 +0100 soc: xtensa: cavs20: align with SOF headers Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon Apr 20 16:03:09 2020 +0100 soc: xtensa: cavs18: Align with SOF headers. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon Apr 20 11:42:39 2020 +0100 west: sof: Updated to latest version. Now builds, links and runs SOF code (but not to FW ready). Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Sun Apr 19 13:28:53 2020 +0100 xtensa: intel adsp: build in SOF symbols if CONFIG_SOF Code now fully links against SOF. Needs to be run tested. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Daniel Leung <daniel.leung@intel.com> Date: Wed Apr 15 10:19:28 2020 -0700 DO NOT MERGE: temporarily add thesoftproject as remote for sof module Signed-off-by: Daniel Leung <daniel.leung@intel.com> Author: Daniel Leung <daniel.leung@intel.com> Date: Wed Apr 15 10:33:40 2020 -0700 ipm: cavs_idc: use the IPC/IDC definitions in SoC The SoC definitions have the necessary IPC/IDC bits so there is no need to define them separately. Signed-off-by: Daniel Leung <daniel.leung@intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Wed Apr 15 14:30:20 2020 +0100 TODO: config: Use static config for SOF module. TODO: needs to be generated as part of SOF kconfig Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Fri Apr 10 21:56:07 2020 +0100 HACK: Add SOF into build Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Wed Apr 15 13:55:15 2020 +0100 west: modules: Add SOF audio module. Add support for building SOF as a Zephyr module. This is the starting point for add SOF audio into Zephyr. Currently builds but does not use any symbols yet. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Wed Apr 15 13:48:48 2020 +0100 WIP soc: adsp-cavs15: Use same include directory structure as SOF Use the same directory structure as SOF to simplify porting and allow SOF to build without Zephyr until porting work is complete. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Wed Apr 15 13:43:44 2020 +0100 WIP soc: adsp-common: Use same include directory structure as SOF Use the same directory structure as SOF to simplify porting and allow SOF to build without Zephyr until porting work is complete. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon Mar 16 14:36:32 2020 +0000 WIP: soc: adsp-common: cache is common across all Intel ADSP platforms De-duplicate soc.h cache definitions. TODO: this needs done for other common functions. TODO: need to fix include path Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon Mar 30 11:07:43 2020 -0700 WIP: soc: cavs25: Import SOF SoC support SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4 Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon Mar 30 11:07:12 2020 -0700 WIP: soc: cavs20: Import SOF SoC support SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4 Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon Mar 30 11:06:40 2020 -0700 WIP: soc: cavs18: Import SOF SoC support SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4 Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Daniel Leung <daniel.leung@intel.com> Date: Mon Mar 30 12:37:17 2020 -0700 soc: intel_adsp: use main_entry.S in common for cavs_v15 The files are identical anyway. Signed-off-by: Daniel Leung <daniel.leung@intel.com> Author: Daniel Leung <daniel.leung@intel.com> Date: Mon Mar 30 11:38:14 2020 -0700 soc: intel_adsp/cavs_v15: link common code Let cavs_v15 link against the code compiled under common/. Signed-off-by: Daniel Leung <daniel.leung@intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon Mar 16 13:08:28 2020 +0000 WIP: soc: common: Import SOF SoC support SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4 Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon Mar 16 14:37:32 2020 +0000 WIP soc: adsp-cavs15: build power down support Build the power down support for CAVS1.5 Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon Mar 16 12:40:17 2020 +0000 WIP: soc: cavs15: Import SOF SoC support SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4 Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon Mar 16 14:30:08 2020 +0000 soc: cavs15: Add missing SHIM registers. SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4 Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Mon Mar 9 15:43:01 2020 +0000 xtensa: intel_adsp/cavs_v15: fix usage of LP SRAM power gating Remove LSPGCTL as it can cause confusion, use SHIM_LSPGCTL instead. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> Date: Wed Feb 26 15:28:48 2020 +0000 boards: up_squared_adsp: Use local xtensa HAL instead of SDK HAL SDK HAL is deprecated for Intel ADSP SoCs so fix and use local HAL module. Signed-off-by: Daniel Leung <daniel.leung@intel.com> Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Author: Daniel Leung <daniel.leung@intel.com> Date: Mon Mar 30 10:45:15 2020 -0700 soc: add Intel Audio DSP SoC family This creates a SoC family for the audio DSPs on various Intel CPUs. The intel_apl_adsp is being moved into this family as well, since it is part of the CAVS v1.5 series of DSPs. Signed-off-by: Daniel Leung <daniel.leung@intel.com> Author: Daniel Leung <daniel.leung@intel.com> Date: Mon Mar 30 11:29:02 2020 -0700 soc: xtensa: add CMakeLists.txt Add CMakeLists.txt under soc/xtensa so that CMakeLists.txt inside each SoC directory will be included, similar to what ARM and RISCV have. Signed-off-by: Daniel Leung <daniel.leung@intel.com> Author: Andy Ross <andrew.j.ross@intel.com> Date: Wed Jun 17 12:30:43 2020 -0700 Revert "boards: up_squared_adsp: Add flasher script" This reverts commit |
5 years ago |
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93cd336204 |
arch: Apply dynamic IRQ API change
Switching to constant parameter. Fixes #27399 Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com> |
5 years ago |
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e18fcbba5a |
device: Const-ify all device driver instance pointers
Now that device_api attribute is unmodified at runtime, as well as all the other attributes, it is possible to switch all device driver instance to be constant. A coccinelle rule is used for this: @r_const_dev_1 disable optional_qualifier @ @@ -struct device * +const struct device * @r_const_dev_2 disable optional_qualifier @ @@ -struct device * const +const struct device * Fixes #27399 Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com> |
5 years ago |
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a1b77fd589 |
zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \ xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g" git grep -l 's\(8\|16\|32\|64\)_t' | \ xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g" Signed-off-by: Kumar Gala <kumar.gala@linaro.org> |
5 years ago |
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492fbf7bba |
intc: intc_cavs: Use DTS labels for device names
Replace Kconfig device names with one's that come from device tree like most all other devices do. Signed-off-by: Kumar Gala <kumar.gala@linaro.org> |
5 years ago |
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31706c874e |
soc: xtensa: Add SoC definition for Audio DSP on Intel Apollolake
Create an SoC definition for the Audio DSP on Intel Apollolake Signed-off-by: Daniel Leung <daniel.leung@intel.com> Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com> Signed-off-by: Johan Hedberg <johan.hedberg@intel.com> |
6 years ago |