Some flags are common between in tree extensions and out of tree
supported by the EDK. Instead of duplicating those flags, the EDK reuses
the llext ones.
However, as the EDK has its own needs, two new lists,
`LLEXT_EDK_APPEND_FLAGS` and `LLEXT_EDK_REMOVE_FLAGS` are defined to
allow EDK to append or remove flags as needed.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Loadable extensions need access to Zephyr (and Zephyr application)
includes and some CFLAGS to be properly built. This patch adds a new
target, `llext-edk`, which generates a tar file with those includes and
flags that can be loaded from cmake and make files.
A Zephyr application willing to expose some API to extensions it loads
only need to add the include directories describing such APIs to the
Zephyr ones via zephyr_include_directories() CMake call.
A new Kconfig option, CONFIG_LLEXT_EDK_NAME allows one to control some
aspects of the generated file, which enables some customization - think
of an application called ACME, willing to have a ACME_EXTENSION_KIT or
something.
All EDK Kconfig options are behind CONFIG_LLEXT_EDK, which doesn't
depend on LLEXT directly - so that EDK features can be leveraged by
downstream variations of loadable extensions.
Also, each arch may need different compiler flags for extensions: those
are handled by the `LLEXT_CFLAGS` cmake flag. An example is set for GCC
ARM.
Finally, EDK throughout this patch means Extension Development Kit,
which is a bad name, but at least doesn't conflict with SDK.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
The simple test is there to test the API and simple extensions in
unison. Hello world was intended to be the first not the only extension
being tested.
Also refactors the entry thread to allow for usermode potentially by
passing the pointer to the function symbol rather than having it look it
up directly.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Minimize the amount of flags that are hardcoded in the llext.cmake
module by moving them to the compiler specific cmake files.
The llext.cmake module will now use the new LLEXT_REMOVE_FLAGS and
LLEXT_APPEND_FLAGS global variables to adjust the set of flags used
to compile the llext code. This will make it easier to add support
for new architectures and compilers.
Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
Replace the TLS base address pointer from TPIDRURO to TPIDRURW.
The difference between them is that TPIDRURO is read-only in user mode
but TPIDRURW isn't. So TPIDRURO is much more suitable for store
the address of _kernel.CPU[n]. For this reason, this commit replaces
the base pointer of the TLS area.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
The whole set of architecture flags must be specified together as
they might not make sense in isolation, e.g. -mfloat-abi=hard requires
a -mcpu value that might have an FPU. Use the NO_SPLIT feature to
bind all of the linker options together so that the linker can
compute the correct linker paths for toolchain-provided libraries like
libc and libgcc.
Signed-off-by: Keith Packard <keithp@keithp.com>
Some processors support Dual-redundant Core Lock-step
DCLS) topology but the processor still can be ran in
split-lock mode (by default or changed at flash time).
So, introduce config DCLS that is enabled by default if
config CPU_HAS_DCLS is set, it should be disabled if
processor is used in split-lock mode.
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
When Dual-redundant Core Lock-step (DCLS) topology is used, the VFP
registers across the two redundant cores must be manually initialised
and synchronised, and this requires the `-mfloat-abi=hard` option to
be specified.
This commit forces the use of FP "hard" ABI on the VFP-equipped cores
that are configured in DCLS topology.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the Zephyr build system to support specifying
advanced floating-point compilation options derived from the newly
introduced unified floating-point configurations.
The following changes are introduced by this commit:
1. Specify architecture floating-point option to the `-mcpu` flag.
2. Specify floating-point unit (FPU) type using the `-mfpu` flag.
Note that the `-march` flag is not specified separately because the
`-mcpu` flag provides more detailed architecture options and this
makes the `-march` flag redundant.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds the half-precision (16-bit) floating-point
configurations to the ARM AArch32 architectures.
Enabling CONFIG_FP16 has the effect of specifying `-mfp16-format`
option (in case of GCC) which allows using the half-precision floating
point types such as `__fp16` and `_Float16`.
Note that this configuration can be used regardless of whether a
hardware FPU is available or supports half-precision operations.
When an FP16-capable FPU is not available, the compiler will
automatically provide the software emulations.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds the ARMv8.1-M M-Profile Vector Extension (MVE)
configurations as well as the compiler flags to enable it.
The M-Profile Vector Extension consists of the MVE-I and MVE-F
instruction sets which are integer and floating-point vector
instruction sets, respectively.
The MVE-I instruction set is a superset of the ARM DSP instruction
set (ARMv7E-M) and therefore depends on ARMV8_M_DSP, and the MVE-F
instruction set is a superset of the ARM MVE-I instruction set and
therefore depends on ARMV8_1_M_MVEI.
The SoCs that implement the MVE instruction set should select the
following configurations:
select ARMV8_M_DSP
select ARMV8_1_M_MVEI
select ARMV8_1_M_MVEF (if floating-point MVE is supported)
The GCC compiler flags for the MVE instruction set are specified
through the `-mcpu` flag.
In case of the Cortex-M55 (the only supported processor type for
ARMv8.1-M at the time of writing), the `-mcpu=cortex-m55` flag, by
default, enables all the supported extensions which are DSP, MVE-I and
MVE-F.
The extensions that are not supported can be specified by appending
`+no(ext)` to the `-mcpu=cortex-m55` flag:
-mcpu=cortex-m55 Cortex-M55 with DSP + MVE-I + MVE-F
-mcpu=cortex-m55+nomve.fp Cortex-M55 with DSP + MVE-I
-mcpu=cortex-m55+nomve Cortex-M55 with DSP
-mcpu=cortex-m55+nodsp Cortex-M55 without any extensions
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
With respect to the mapping between the CPU variant
and the FPU we add an entry for Cortex-M v8-M CPU
variants without DSP. This should cover the case
of a Mainline Cortex-M which implements the Floating
Point extension but not the DSP extension.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Split ARM and ARM64 architectures.
Details:
- CONFIG_ARM64 is decoupled from CONFIG_ARM (not a subset anymore)
- Arch and include AArch64 files are in a dedicated directory
(arch/arm64 and include/arch/arm64)
- AArch64 boards and SoC are moved to soc/arm64 and boards/arm64
- AArch64-specific DTS files are moved to dts/arm64
- The A72 support for the bcm_vk/viper board is moved in the
boards/bcm_vk/viper directory
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This commit renames the Kconfig `FLOAT` symbol to `FPU`, since this
symbol only indicates that the hardware Floating Point Unit (FPU) is
used and does not imply and/or indicate the general availability of
toolchain-level floating point support (i.e. this symbol is not
selected when building for an FPU-less platform that supports floating
point operations through the toolchain-provided software floating point
library).
Moreover, given that the symbol that indicates the availability of FPU
is named `CPU_HAS_FPU`, it only makes sense to use "FPU" in the name of
the symbol that enables the FPU.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The ARM GCC `-march` compiler flag is completely redundant when the
`-mcpu` flag is specified, since the `-mcpu` selects the target ARM
architecture as well as CPU-specific optimisations.
In fact, it is disadvantageous to specify both `-march` and `-mcpu`
flags because the `-march` flag overrides and disables any CPU-specific
optimisations enabled by the `-mcpu` flag.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds the GCC `-mabi=lp64` flag to force the LP64 (64-bit
long and pointer) ABI, which is mandatory for running the Zephyr
AArch64 architecture port.
Note that this flag is, strictly speaking, not necessary in most cases
because the AArch64 GCC defaults to using the LP64 ABI. This flag is
required, however, if compiling Zephyr with a GCC that is configured
with `--with-abi=ilp32`, which makes ILP32 the default ABI.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The ARM architecture root directory contains `aarch32.cmake` and
`aarch64.cmake` files whose contents are better suited to go into other
more purpose-specific files.
This commit removes the aforementioned files and moves their contents
to other files following the convention used by other architectures.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit introduces the `COMPILER_ISA_THUMB2` symbol to allow
choosing either the ARM or Thumb instruction set for C code
compilation.
In addition, this commit introduces the `ASSEMBLER_ISA_THUMB2` helper
symbol to specify the default target instruction set for the assembler.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
To be able to successfully compile the kernel for the ARM64 architecture
we have to tweak the compiler-related files to be able to use the
AArch64 GCC compiler.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Ederson de Souza
Tom Burdick
Luca Burelli
Huifeng Zhang
Keith Packard
Dat Nguyen Duy
Stephanos Ioannidis
Ioannis Glaropoulos
Carlo Caione
Kumar Gala