Add support in arm_cortex_m python script to read thread
registers off of a thread's stack when switching context.
When CONFIG_ARM_STORE_EXC_RETURN is enabled, check the exc_return value
in thread's arch struct to determine accurately where the stack pointer
is. Also, set r7 (the frame pointer register) in case the frame pointer
is not omitted.
Only 8 registers are read from the top of the stack
for other threads present in the dump. So update the
script to reflect that.
Signed-off-by: Mark Holden <mholden@meta.com>
When working with coredumps, it is useful to be able to modify base
registers. Adding this capability allows implementing scripts to
inspect backtrace of threads other than current the current thread.
Signed-off-by: Félix Turgeon <felixturgeon@meta.com>
This adds support for using coredump with Xtensa DC233C core,
which are being used by qemu_xtensa and qemu_xtensa_mmu.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
* Add support for coredump on ARM64 architectures.
* Add the script used for post-processing coredump output.
Signed-off-by: Marcelo Ruaro <marcelo.ruaro@huawei.com>
Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Signed-off-by: Roberto Medina <roberto.medina@huawei.com>
The current toolchain version for espressif SoCs does not
have the same limitation on registers indexing as the previous
one, enabling sending the correct A0-A15 register values directly
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Adds compatibility with Intel ADSP GDB from Zephyr SDK and
from Cadence toolchain to coredump_gdbserver.py.
Adds CAVS 15-25 (APL) register definitions. Implements
handle_register_single_read_packet to serve ADSP GDB
p packets.
Prevents BSA from changing between stack dump printout
and coredump by taking lock. Observed to be necessary for
accurate results on slower simulated platforms.
Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
GDB server dummies WINDOWBASE to 0 and WINDOWSTART to 1
for both arches and sends An as corresponding ARn for ESP32
to get around packet size limitation. Fixes backtrace and
other issues causing GDB client to crash.
Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
This adds the necessary bits in arch code, and Python scripts
to enable coredump support for ARM Cortex-M.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a very primitive coredump mechanism under subsys/debug
where during fatal error, register and memory content can be
dumped to coredump backend. One such backend utilizing log
module for output is included. Once the coredump log is converted
to a binary file, it can be used with the ELF output file as
inputs to an overly simplified implementation of a GDB server.
This GDB server can be attached via the target remote command of
GDB and will be serving register and memory content. This allows
using GDB to examine stack and memory where the fatal error
occurred.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Mark Holden
Félix Turgeon
Yong Cong Sin
Aleksandar Cecaric
Daniel Leung
Roberto Medina
Lucas Tamborrino
Lauren Murphy
Mark Holden