CS hold time parameter is not correct which may cause bus fault
randomly.
System hang during status register reading after flash progromming which
is caused by parameter accessing in XIP mode.
Add dummy delay for READ command according the flash datasheet which is
required for SDR mode.
Use FlexSPI internal divider for clock updating instead of register in
CCM to avoid potential risk caused by flash access during clock updating
procedure.
Signed-off-by: Raymond Lei <raymond.lei@nxp.com>
Parameter checking of flash read API expects checking for len == 0
before checking dest buffer validation.
Fixes#87021
Signed-off-by: David Leach <david.leach@nxp.com>
Commit 857e5793f1 fix
the flash_mcux_flexspi_nor.c driver to wait for the
FlexSPI to be idle before performing write/erase
operations. Add a similar check to these drivers that
also use the FlexSPI NOR block.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Add support for reclocking the FlexSPI on NXP iMX RT10XX. This
functionality requires an SOC specific clock function to set
the clock rate, since the FlexSPI must be reset directly
before applying the new clock frequency.
Note that all clock constants are defined in this commit, since the
memc flexspi driver now depends on a clock node being present.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Update interface of memc flexspi driver to better handle multiple
devices. Previously, using multiple devices on one FlexSPI bus would
require the user to configure each device to install its command table
(referred to as a LUT table by the driver) at an offset, so that it did
not overlap with other devices on the bus.
This commit changes the interface of the memc flexspi driver to instead
configure the LUT and flash device in one call. This allows the memc
driver to record the port each LUT sequence is used with, so that
future FlexSPI transfer requests can have their LUT offsets adjusted
based on the target port (which will correspond to a target device)
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Copy the LUT to SRAM before updating it. This avoids the application
reading LUT entries from FlexSPI while trying to write them to FlexSPI
configuration registers, which could result in invalid LUT entries being
added.
This update is applied to all in tree flash FlexSPI drivers, although
the failure has only been observed with the flash_mcux_flexspi_nor
driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Replace memcpy usage in write since it is not linked to non-external
flash which might cause read-while-write issues.
Move the function that invalidated the data cache inside the critical
section to avoid context switch before it is invalidated.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Check memc_flexspi_is_running_xip before calling
memc_flexspi_set_device_config in hyperflash init.
This aligns with the nor flash driver.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Hyperflash write operations resulted in invalid writes. This commit
fixes the issue by temporarily lowering the clock during writes.
This aligns with the mcux-sdk-examples.
Fixes https://github.com/zephyrproject-rtos/zephyr/issues/53855
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.
The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.
NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use correct printf format specifier for LOG_DBG calls using offsets, as
these offsets are long int and thus require the %lx format specifier rather
than %x.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
since the flexspi driver interacts with the flash device, storing
device data in flash can cause RWW hazards when running in XIP mode.
Move all device data to RAM to limit these RWW hazards.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
flexspi driver should not interact with flash whenever possible, and
should never use flash while in a critical write or erase section. Move
device data to RAM to prevent this read-while-write hazard.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The controller device instance can be obtained at compile time using
DEVICE_DT_GET, so do that.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Refactors all of the on-chip flash drivers to use a shared driver class
initialization priority configuration, CONFIG_FLASH_INIT_PRIORITY, to
allow configuring flash drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers.
Driver-specific options for SPI-based flash drivers are left intact
because they need to be initialized at a different priority than on-chip
flash drivers.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Program flow will behave incorrectly (memory and instruction fetches
return invalid data) if Flexspi is accessed by the Flexspi driver while
being used as XIP memory by the Cortex M7.
Set logging to disabled by when XIP mode is used in the memc and
flexspi drivers, and warn the user if they attempt to enable it.
Fixes#40133
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This enables accessing the hyperflash through the flash api.
Added a feature to memc_mcux_flexspi that waits for flexspi bus to be
quiet.
Signed-off-by: Nicolai Glud <nicolai.glud@prevas.dk>
Raymond Lei
David Leach
Mahesh Mahadevan
Pieter De Gendt
Daniel DeGrasse
Jeppe Odgaard
Gerard Marull-Paretas
Maureen Helm
Nicolai Glud