To un-block continuing of soc and board porting then move all socs and
boards which have not yet been ported to boards_legacy / soc_legacy
folders.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Updates Ethernet PHY devicetree bindings to be more consistent with
Linux by using the standard `reg` property for the PHY address instead
of a custom `address` property. As a result, MDIO controller bindings
now require standard `#address-cells` and `#size-cells` properties.
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Some Ethernet PHYs used the devicetree node name `phy`, while others
used `ethernet-phy`. Be consistent and use `ethernet-phy` throughout.
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Now that all in-tree phys are declared under their mdio bus, drop the
`mdio` property and use DT_INST_BUS to find the bus.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Change the eth-phy definition so that the phy is pointed by a phandle
rather than a child node, make the phy device a child of mdio. This
makes more sense from a devicetree hirearchy where the phandles have to
be initialized before the device itself, allows keeping the priorities
in check with CHECK_INIT_PRIORITIES.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Introduce dtsi files representing the
current portfolio of chips and modules
based on the followint criteria:
- flash size
- psram size
- gpio count
- certification status
Update the boards dts files according
to which SOC/SIP they are using.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Adds support for the esp32_ethernet_kit board.
esp32_ethernet_kit board is useful for testing ESP32 Ethernet
Signed-off-by: Grant Ramsay <grant.ramsay@hotmail.com>
For the !SOC_I2C_SUPPORT_HW_CLR_BUS in which we implement bus
reset via GPIOs, change the devicetree properties to be actual
gpio properties and update the code to reflect this.
Signed-off-by: Kumar Gala <galak@kernel.org>
Add alias to boards with watchdog enabled to facilitate the
move of samples/drivers/watchdog to use DT_ALIAS.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
- update device tree pin states definitions and node
descriptions to group pins sharing common properties.
- update ESP32's in-tree overlays.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Through the inclusion of pinctrl-[0/name] properties to
ESP32's board I2C nodes.
Also removes the i2c1 node, which currently is not being
used by any sample code or test case.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
through the inclusion of pinctrl-[0/name] properties to
ESP32's board SPI nodes.
It also removes dts properties related to pinmux.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
through the inclusion of pinctrl-[0/name] properties to
ESP32's board UART nodes.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Use i2c_hal functions to enable support for
multiple SoCs.
Use DT compat to enable I2C from device
tree configuration
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
This PR updates GPIO driver to use DTS information
regarding gpio availability.
This also fixes interrupt handling and
also removes kconfig definition for GPIO port.
A few configuration checks were also added to
improve code usage.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
- Change default CPU Clock to 240MHz
(PLL is activated)
- I2C, UART will use sysclk from clock driver
- esp32_enable_peripheral replaced by
clock_control_on
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
- Support PLL for Higher Frequencies 80,160,240 MHz
- Support XTAL Frequencies 26MHz, 40MHz
- Clock Driver can't be disabled, because all of the other drivers
will depend on it to get their operating Frequency based on chosen
clock source (XTAL/PLL).
- Add needed references to BBPLL i2c bus ROM functions.
- Add `rtc` node to Device Tree.
- Since All Peripherals Frequency is depending on CPU_CLK Source,
`clock-source` property added to CPU node
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
- dts updated for UART1/2
- Additional check added to _INIT macro to configure flow control mode
- Additional check added to _INIT macro to set CTS/RTS gpios values
- Additional check added for gpio config
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
- Fixes#3981
- Implement UART Polling functions
- Implement UART Interrupt APIs
- Remove dependency on esp32_rom_uart_xxx functions
- Update Device tree with UART addresses and pin config
- Update ESP32 UART KConfig
Notes about implementation:
- Interrupts now defined as a local macros, and should be removed
later on, when interrupts for esp32 are supported in dts
- Threshold interrupts are used for TX/RX
- Reseting FIFOs using _RST bit will corrupt FIFO of UART2 when used for
UART1 and vice-versa, so a generic way is used for all three UARTs
- Old Silicon rev is not supported
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
This commit adds 'clock-frequency' property to the cpu nodes.
The clock frequency specified in the added property is used
during platform configuration. Examples:
- The SWO logger uses clock frequency to configure SWO output.
- Plenty of platforms need CPU clock specified for their HAL.
- Most of devices with USB needs information about CPU clock
in order to configure USB clock source.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The DT spec. only has "okay" and not "ok". The Linux kernel has around
12k "okay"s and 300 "ok"s.
The scripts/dts scripts only check for "disabled", so should be safe re.
those at least.
The replacement was done with
git ls-files | xargs sed -i 's/status\s*=\s*"ok"/status = "okay"/'
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Sylvio Alves
Jamie McCrae
Marcio Ribeiro
Maureen Helm
Fabio Baltieri
Marek Matej
Grant Ramsay
Kumar Gala
Benjamin Björnsson
Glauber Maroto Ferreira
Shubham Kulkarni
Mohamed ElShahawi
Piotr Zięcik
Yannis Damigos
Ulf Magnusson
Savinay Dharmappa