zephyr

115285 Commits

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1.7 GiB

Tree: 405ab182a9

Commit Graph

Author	SHA1	Message	Date
Pisit Sawangvonganan	a378440116	drivers: intc: stm32: correct inconsistent parameter names Correct several inconsistent parameter names in the following functions: - stm32_gpio_intc_select_line_trigger: rename `trigger` to `trg` to match the header file. - stm32_gpio_intc_set_irq_callback: rename the callback argument to `user` to match the `stm32_gpio_irq_cb_t` type. - stm32_exti_get_line_src_port: rename `pin` to `line` to align with the Doxygen comment and implementation. Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>	9 months ago
Mathieu Choplain	32a1b0cc54	drivers: intc: add STM32WB0 GPIO interrupt controller Adds a driver for the STM32WB0 series GPIO interrupt controller. This driver implements the STM32 GPIO INTC API, along with an extension function used to check if a specific line is available on current board. This also extends the GPIO INTC API to support level-sensitive interrupts, as this feature is available on STM32WB0. Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>	10 months ago

Author

SHA1

Message

Date

Pisit Sawangvonganan

a378440116

drivers: intc: stm32: correct inconsistent parameter names

Correct several inconsistent parameter names in the following functions:
- stm32_gpio_intc_select_line_trigger: rename `trigger` to `trg`
  to match the header file.
- stm32_gpio_intc_set_irq_callback: rename the callback argument to `user`
  to match the `stm32_gpio_irq_cb_t` type.
- stm32_exti_get_line_src_port: rename `pin` to `line` to align with
  the Doxygen comment and implementation.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>

9 months ago

Mathieu Choplain

32a1b0cc54

drivers: intc: add STM32WB0 GPIO interrupt controller

Adds a driver for the STM32WB0 series GPIO interrupt controller.
This driver implements the STM32 GPIO INTC API, along with an extension
function used to check if a specific line is available on current board.

This also extends the GPIO INTC API to support level-sensitive interrupts,
as this feature is available on STM32WB0.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>

10 months ago

2 Commits (405ab182a9749501f22df4455f9f2fbc1189adc1)