Fix STM32 WBA and H7 clock drivers to release the reference counter
added to access LSE configuration controllers once the clock is
configured. Keeping such an unbalanced access request is no more
needed since SoC functions manage reference counting of access requests.
Fixes issue 90942.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Use recently added SoCs functions to request access to SoC backup
domain resources These function use a reference counter to track these
request and ensure the resources are accessible as long as at least a
consumer requires access.
By the way, correct stm32_hsem.h header file inclusion that requires
brackets (<>) delimiters, not double quotes, as per convention on header
location.
Fixes issue 90942.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Remove the inline attribute from stm32 clock drivers functions
especially for functions that are only referenced in the clock API
operation structure and therefore cannot be inline. As a generic
comment, today compiler are smart enough to optimize embedded software
without needing inline function attributes in the source files.
This change hopes that next stm32 clock driver will no more replicate
this bad habit when using existing source files as implementation
examples.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
IN_RANGE() macro from zephyr/sys/util.h returns a boolean value
so it should be treated as such and not compared to a decimal value.
Fix stm32 clock drivers accordingly and simplify places where the
value is compared to true.
No functional change.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Factorize STM32_CLOCK_*_GET() and STM32_MCO_CFGR_*_GET() macros
into a single series of STM32_DT_CLKSEL_*_GET() macros based on
recently introduced new common macros STM32_DT_CLKSEL_*_SHIFT and
STM32_DT_CLKSEL_*_MASK.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Support specifying divided clock buses by introduction of
STM32_CLOCK_DIV(div) macro. This macro can be used in devicetree to define
clock source of peripherals.
HSE is selected in devicetree using:
<&rcc STM32_SRC_HSE ...>;
HSE/2 can now be selected with:
<&rcc (STM32_SRC_HSE | STM32_CLOCK_DIV(2)) ...>;
This allows to use clock_control_get_rate() API in peripherals in order to
get desired clock rate.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Remove address-of operator ('&') when assigning `clock_control_xxx_init`
function pointer in `DEVICE_DT_INST_DEFINE` macro.
This change aims to maintain consistency among the drivers in
`drivers/clock_control`, ensuring that all function pointer assignments
follow the same pattern.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
This commit removes unnecessary initialization of the local variable
where its value is guaranteed to be overwritten by subsequent operations.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Use a code spell-checking tool to scan and correct spelling errors in
the following files:
- clock_stm32_ll_common.c
- clock_stm32_ll_h5.c
- clock_stm32_ll_h7.c
- clock_stm32_ll_u5.c
- clock_stm32_ll_wba.c
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Cf Errata sheet, 2.2.4: With HSE active, switching the system clock source
from any other source to HSI, spuriously deactivates HSE.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
In case of chain loaded application with PLL set as the sysclk source,
directly exit the init function.
This also applies to exit from stop mode and was tested successfully.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Make clock_control_on for STM32 behave the same as the HAL,
delaying after enabling peripheral clocks. Otherwise it may return
before the clock is actually enabled, causing subsequent writes to
peripheral registers to be silently ignored.
Signed-off-by: Kevin ORourke <kevin.orourke@ferroamp.se>
LSI clock configuration for STM32WBA is located in backup domain.
The backup domain needs to be enabled before the LSI can be enabled.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>