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After enabling the ADC, the peripheral has a certain delay (about 1ms) to set its ADC Ready flag in the ADC ISR register. In between, the ADRDY is still 0 and the ADEN is 1 in the CR. The ADC can be used for conversion, only when the ADRDY bit is set Signed-off-by: Francois Ramu <francois.ramu@st.com>pull/56275/head
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