From f5792b05e7a4ff74421c9ae4a98df15ab07aceb5 Mon Sep 17 00:00:00 2001 From: Jamie McCrae Date: Tue, 6 Feb 2024 14:45:37 +0000 Subject: [PATCH] boards: arm: fvp_baser_aemv8r_aarch32: Convert to v2 Converts the board to hwmv2 Signed-off-by: Jamie McCrae --- .../fvp_baser_aemv8r/Kconfig.fvp_baser_aemv8r | 4 +- boards/arm/fvp_baser_aemv8r/board.cmake | 97 +++++++++++++------ boards/arm/fvp_baser_aemv8r/board.yml | 3 + .../fvp_baser_aemv8r/doc/aarch32.rst} | 0 .../doc/{index.rst => aarch64.rst} | 0 .../fvp_baser_aemv8r_fvp_aemv8r_aarch32.dts} | 0 .../fvp_baser_aemv8r_fvp_aemv8r_aarch32.yaml} | 2 +- ...baser_aemv8r_fvp_aemv8r_aarch32_defconfig} | 3 - ...p_baser_aemv8r_fvp_aemv8r_aarch32_smp.dts} | 2 +- ..._baser_aemv8r_fvp_aemv8r_aarch32_smp.yaml} | 2 +- ...er_aemv8r_fvp_aemv8r_aarch32_smp_defconfig | 6 ++ ...> fvp_baser_aemv8r_fvp_aemv8r_aarch64.dts} | 0 ... fvp_baser_aemv8r_fvp_aemv8r_aarch64.yaml} | 2 +- ...baser_aemv8r_fvp_aemv8r_aarch64_defconfig} | 0 ...vp_baser_aemv8r_fvp_aemv8r_aarch64_smp.dts | 2 +- ...p_baser_aemv8r_fvp_aemv8r_aarch64_smp.yaml | 2 +- ...er_aemv8r_fvp_aemv8r_aarch64_smp_defconfig | 21 +--- .../fvp_baser_aemv8r_aarch32/Kconfig.board | 7 -- .../Kconfig.defconfig | 13 --- .../arm/fvp_baser_aemv8r_aarch32/board.cmake | 39 -------- .../fvp_baser_aemv8r_aarch32_smp_defconfig | 32 ------ 21 files changed, 84 insertions(+), 153 deletions(-) rename boards/{boards_legacy/arm/fvp_baser_aemv8r_aarch32/doc/index.rst => arm/fvp_baser_aemv8r/doc/aarch32.rst} (100%) rename boards/arm/fvp_baser_aemv8r/doc/{index.rst => aarch64.rst} (100%) rename boards/{boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32.dts => arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32.dts} (100%) rename boards/{boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32.yaml => arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32.yaml} (86%) rename boards/{boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32_defconfig => arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_defconfig} (81%) rename boards/{boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32_smp.dts => arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_smp.dts} (72%) rename boards/{boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32_smp.yaml => arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_smp.yaml} (84%) create mode 100644 boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_smp_defconfig rename boards/arm/fvp_baser_aemv8r/{fvp_baser_aemv8r.dts => fvp_baser_aemv8r_fvp_aemv8r_aarch64.dts} (100%) rename boards/arm/fvp_baser_aemv8r/{fvp_baser_aemv8r.yaml => fvp_baser_aemv8r_fvp_aemv8r_aarch64.yaml} (85%) rename boards/arm/fvp_baser_aemv8r/{fvp_baser_aemv8r_defconfig => fvp_baser_aemv8r_fvp_aemv8r_aarch64_defconfig} (100%) delete mode 100644 boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/Kconfig.board delete mode 100644 boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/Kconfig.defconfig delete mode 100644 boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/board.cmake delete mode 100644 boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32_smp_defconfig diff --git a/boards/arm/fvp_baser_aemv8r/Kconfig.fvp_baser_aemv8r b/boards/arm/fvp_baser_aemv8r/Kconfig.fvp_baser_aemv8r index 678939217eb..059a4ba6948 100644 --- a/boards/arm/fvp_baser_aemv8r/Kconfig.fvp_baser_aemv8r +++ b/boards/arm/fvp_baser_aemv8r/Kconfig.fvp_baser_aemv8r @@ -2,5 +2,5 @@ # SPDX-License-Identifier: Apache-2.0 config BOARD_FVP_BASER_AEMV8R - select SOC_SERIES_FVP_AEMV8R - select SOC_FVP_AEMV8R_AARCH64 + select SOC_FVP_AEMV8R_AARCH64 if BOARD_FVP_BASER_AEMV8R_FVP_AEMV8R_AARCH64 || BOARD_FVP_BASER_AEMV8R_FVP_AEMV8R_AARCH64_SMP + select SOC_FVP_AEMV8R_AARCH32 if BOARD_FVP_BASER_AEMV8R_FVP_AEMV8R_AARCH32 || BOARD_FVP_BASER_AEMV8R_FVP_AEMV8R_AARCH32_SMP diff --git a/boards/arm/fvp_baser_aemv8r/board.cmake b/boards/arm/fvp_baser_aemv8r/board.cmake index 410431bdcbf..f7753bc5099 100644 --- a/boards/arm/fvp_baser_aemv8r/board.cmake +++ b/boards/arm/fvp_baser_aemv8r/board.cmake @@ -5,35 +5,70 @@ set(SUPPORTED_EMU_PLATFORMS armfvp) set(ARMFVP_BIN_NAME FVP_BaseR_AEMv8R) set(ARMFVP_MIN_VERSION 11.16.16) -set(ARMFVP_FLAGS - -C cluster0.has_aarch64=1 - -C cluster0.VMSA_supported=0 - -C cluster0.NUM_CORES=${CONFIG_MP_MAX_NUM_CPUS} - -C cluster0.gicv3.cpuintf-mmap-access-level=2 - -C cluster0.gicv3.SRE-enable-action-on-mmap=2 - -C cluster0.gicv3.SRE-EL2-enable-RAO=1 - -C cluster0.gicv3.extended-interrupt-range-support=1 - -C gic_distributor.GICD_CTLR-DS-1-means-secure-only=1 - -C gic_distributor.has-two-security-states=0 - -C bp.refcounter.non_arch_start_at_default=1 - # UART0 config - -C bp.pl011_uart0.out_file=- - -C bp.pl011_uart0.unbuffered_output=1 - -C bp.terminal_0.start_telnet=0 - # UART1 config - -C bp.pl011_uart1.out_file=- - -C bp.pl011_uart1.unbuffered_output=1 - -C bp.terminal_1.start_telnet=0 - # UART2 config - -C bp.pl011_uart2.out_file=- - -C bp.pl011_uart2.unbuffered_output=1 - -C bp.terminal_2.start_telnet=0 - # UART3 config - -C bp.pl011_uart3.out_file=- - -C bp.pl011_uart3.unbuffered_output=1 - -C bp.terminal_3.start_telnet=0 +if(CONFIG_BOARD_FVP_BASER_AEMV8R_FVP_AEMV8R_AARCH64) + set(ARMFVP_FLAGS + -C cluster0.has_aarch64=1 + -C cluster0.VMSA_supported=0 + -C cluster0.NUM_CORES=${CONFIG_MP_MAX_NUM_CPUS} + -C cluster0.gicv3.cpuintf-mmap-access-level=2 + -C cluster0.gicv3.SRE-enable-action-on-mmap=2 + -C cluster0.gicv3.SRE-EL2-enable-RAO=1 + -C cluster0.gicv3.extended-interrupt-range-support=1 + -C gic_distributor.GICD_CTLR-DS-1-means-secure-only=1 + -C gic_distributor.has-two-security-states=0 + -C bp.refcounter.non_arch_start_at_default=1 + # UART0 config + -C bp.pl011_uart0.out_file=- + -C bp.pl011_uart0.unbuffered_output=1 + -C bp.terminal_0.start_telnet=0 + # UART1 config + -C bp.pl011_uart1.out_file=- + -C bp.pl011_uart1.unbuffered_output=1 + -C bp.terminal_1.start_telnet=0 + # UART2 config + -C bp.pl011_uart2.out_file=- + -C bp.pl011_uart2.unbuffered_output=1 + -C bp.terminal_2.start_telnet=0 + # UART3 config + -C bp.pl011_uart3.out_file=- + -C bp.pl011_uart3.unbuffered_output=1 + -C bp.terminal_3.start_telnet=0 - -C bp.vis.disable_visualisation=1 - -C bp.vis.rate_limit-enable=0 - -C cache_state_modelled=1 - ) + -C bp.vis.disable_visualisation=1 + -C bp.vis.rate_limit-enable=0 + -C cache_state_modelled=1 + ) +elseif(CONFIG_BOARD_FVP_BASER_AEMV8R_FVP_AEMV8R_AARCH32) + set(ARMFVP_FLAGS + -C cluster0.has_aarch64=0 + -C cluster0.VMSA_supported=0 + -C cluster0.NUM_CORES=${CONFIG_MP_MAX_NUM_CPUS} + -C cluster0.gicv3.cpuintf-mmap-access-level=2 + -C cluster0.gicv3.SRE-enable-action-on-mmap=2 + -C cluster0.gicv3.SRE-EL2-enable-RAO=1 + -C cluster0.gicv3.extended-interrupt-range-support=1 + -C gic_distributor.GICD_CTLR-DS-1-means-secure-only=1 + -C gic_distributor.has-two-security-states=0 + -C bp.refcounter.non_arch_start_at_default=1 + # UART0 config + -C bp.pl011_uart0.out_file=- + -C bp.pl011_uart0.unbuffered_output=1 + -C bp.terminal_0.start_telnet=0 + # UART1 config + -C bp.pl011_uart1.out_file=- + -C bp.pl011_uart1.unbuffered_output=1 + -C bp.terminal_1.start_telnet=0 + # UART2 config + -C bp.pl011_uart2.out_file=- + -C bp.pl011_uart2.unbuffered_output=1 + -C bp.terminal_2.start_telnet=0 + # UART3 config + -C bp.pl011_uart3.out_file=- + -C bp.pl011_uart3.unbuffered_output=1 + -C bp.terminal_3.start_telnet=0 + + -C bp.vis.disable_visualisation=1 + -C bp.vis.rate_limit-enable=0 + -C cache_state_modelled=0 + ) +endif() diff --git a/boards/arm/fvp_baser_aemv8r/board.yml b/boards/arm/fvp_baser_aemv8r/board.yml index b6c979371ae..2c0c82dd7a2 100644 --- a/boards/arm/fvp_baser_aemv8r/board.yml +++ b/boards/arm/fvp_baser_aemv8r/board.yml @@ -5,3 +5,6 @@ board: - name: fvp_aemv8r_aarch64 variants: - name: 'smp' + - name: fvp_aemv8r_aarch32 + variants: + - name: 'smp' diff --git a/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/doc/index.rst b/boards/arm/fvp_baser_aemv8r/doc/aarch32.rst similarity index 100% rename from boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/doc/index.rst rename to boards/arm/fvp_baser_aemv8r/doc/aarch32.rst diff --git a/boards/arm/fvp_baser_aemv8r/doc/index.rst b/boards/arm/fvp_baser_aemv8r/doc/aarch64.rst similarity index 100% rename from boards/arm/fvp_baser_aemv8r/doc/index.rst rename to boards/arm/fvp_baser_aemv8r/doc/aarch64.rst diff --git a/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32.dts b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32.dts similarity index 100% rename from boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32.dts rename to boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32.dts diff --git a/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32.yaml b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32.yaml similarity index 86% rename from boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32.yaml rename to boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32.yaml index 23fc5a434c2..0f7b38d648c 100644 --- a/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32.yaml +++ b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32.yaml @@ -2,7 +2,7 @@ # Copyright (c) 2022 IoT.bzh # SPDX-License-Identifier: Apache-2.0 -identifier: fvp_baser_aemv8r_aarch32 +identifier: fvp_baser_aemv8r/fvp_aemv8r_aarch32 name: FVP Emulation FVP_BaseR_AEMv8R AArch32 arch: arm type: sim diff --git a/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32_defconfig b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_defconfig similarity index 81% rename from boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32_defconfig rename to boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_defconfig index 034a1ed5014..bf9d919c6a3 100644 --- a/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32_defconfig +++ b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_defconfig @@ -2,9 +2,6 @@ # Copyright (c) 2022 IoT.bzh # SPDX-License-Identifier: Apache-2.0 -CONFIG_SOC_SERIES_FVP_AEMV8R_AARCH32=y -CONFIG_SOC_FVP_AEMV8R_AARCH32=y -CONFIG_BOARD_FVP_BASER_AEMV8R_AARCH32=y CONFIG_ARM_MPU=y CONFIG_ISR_STACK_SIZE=1024 diff --git a/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32_smp.dts b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_smp.dts similarity index 72% rename from boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32_smp.dts rename to boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_smp.dts index cdc0a933ba3..b33ad9ca128 100644 --- a/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32_smp.dts +++ b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_smp.dts @@ -5,4 +5,4 @@ /dts-v1/; -#include "fvp_baser_aemv8r_aarch32.dts" +#include "fvp_baser_aemv8r_fvp_aemv8r_aarch32.dts" diff --git a/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32_smp.yaml b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_smp.yaml similarity index 84% rename from boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32_smp.yaml rename to boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_smp.yaml index 0ecd14f9076..d056a315af6 100644 --- a/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32_smp.yaml +++ b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_smp.yaml @@ -1,7 +1,7 @@ # Copyright (c) 2023 Arm Limited (or its affiliates). All rights reserved. # SPDX-License-Identifier: Apache-2.0 -identifier: fvp_baser_aemv8r_aarch32_smp +identifier: fvp_baser_aemv8r/fvp_aemv8r_aarch32/smp name: FVP Emulation FVP_BaseR_AEMv8R AArch32 (SMP) arch: arm type: sim diff --git a/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_smp_defconfig b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_smp_defconfig new file mode 100644 index 00000000000..a320c3486f7 --- /dev/null +++ b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_smp_defconfig @@ -0,0 +1,6 @@ +# Copyright (c) 2023 Arm Limited (or its affiliates). All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_USE_SWITCH=y +CONFIG_SMP=y +CONFIG_MP_MAX_NUM_CPUS=4 diff --git a/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r.dts b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64.dts similarity index 100% rename from boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r.dts rename to boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64.dts diff --git a/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r.yaml b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64.yaml similarity index 85% rename from boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r.yaml rename to boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64.yaml index 840fa70e5c9..501a6b89374 100644 --- a/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r.yaml +++ b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64.yaml @@ -1,7 +1,7 @@ # Copyright (c) 2021 Arm Limited (or its affiliates). All rights reserved. # SPDX-License-Identifier: Apache-2.0 -identifier: fvp_baser_aemv8r +identifier: fvp_baser_aemv8r/fvp_aemv8r_aarch64 name: FVP Emulation FVP_BaseR_AEMv8R arch: arm64 type: sim diff --git a/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_defconfig b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64_defconfig similarity index 100% rename from boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_defconfig rename to boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64_defconfig diff --git a/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64_smp.dts b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64_smp.dts index 13c39522ca1..6e57c4d83bc 100644 --- a/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64_smp.dts +++ b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64_smp.dts @@ -3,4 +3,4 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "fvp_baser_aemv8r.dts" +#include "fvp_baser_aemv8r_fvp_aemv8r_aarch64.dts" diff --git a/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64_smp.yaml b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64_smp.yaml index c9032f91f1e..fa1baf892d9 100644 --- a/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64_smp.yaml +++ b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64_smp.yaml @@ -1,7 +1,7 @@ # Copyright (c) 2021 Arm Limited (or its affiliates). All rights reserved. # SPDX-License-Identifier: Apache-2.0 -identifier: fvp_baser_aemv8r//smp +identifier: fvp_baser_aemv8r/fvp_aemv8r_aarch64/smp name: FVP Emulation FVP_BaseR_AEMv8R (SMP) arch: arm64 type: sim diff --git a/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64_smp_defconfig b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64_smp_defconfig index f4d84e08113..286fc28d189 100644 --- a/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64_smp_defconfig +++ b/boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64_smp_defconfig @@ -1,26 +1,7 @@ # Copyright (c) 2021 Arm Limited (or its affiliates). All rights reserved. # SPDX-License-Identifier: Apache-2.0 -# Cache management -CONFIG_CACHE_MANAGEMENT=y - -CONFIG_THREAD_STACK_INFO=y - -# Enable Timer and Sys clock -CONFIG_SYS_CLOCK_TICKS_PER_SEC=100 -CONFIG_ARM_ARCH_TIMER=y - -# Enable UART driver -CONFIG_SERIAL=y - -# Enable serial port -CONFIG_UART_INTERRUPT_DRIVEN=y - -# Enable console -CONFIG_CONSOLE=y -CONFIG_UART_CONSOLE=y - -# Enable simulate cpu power management +# Enable simulated CPU power management CONFIG_SOC_FVP_AEMV8R_SIMULATE_CPU_PM=y CONFIG_PM_CPU_OPS=y CONFIG_PM_CPU_OPS_PSCI=n diff --git a/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/Kconfig.board b/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/Kconfig.board deleted file mode 100644 index da1b202a128..00000000000 --- a/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/Kconfig.board +++ /dev/null @@ -1,7 +0,0 @@ -# Copyright (c) 2021 Arm Limited (or its affiliates). All rights reserved. -# Copyright (c) 2022 IoT.bzh -# SPDX-License-Identifier: Apache-2.0 - -config BOARD_FVP_BASER_AEMV8R_AARCH32 - bool "FVP BaseR AEMv8R AArch32 simulation board" - depends on SOC_FVP_AEMV8R_AARCH32 diff --git a/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/Kconfig.defconfig b/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/Kconfig.defconfig deleted file mode 100644 index 26231365882..00000000000 --- a/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/Kconfig.defconfig +++ /dev/null @@ -1,13 +0,0 @@ -# Copyright (c) 2021 Arm Limited (or its affiliates). All rights reserved. -# Copyright (c) 2022 IoT.bzh -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_FVP_BASER_AEMV8R_AARCH32 - -config BUILD_OUTPUT_BIN - default y - -config BOARD - default "fvp_baser_aemv8r_aarch32" - -endif # BOARD_FVP_BASER_AEMV8R_AARCH32 diff --git a/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/board.cmake b/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/board.cmake deleted file mode 100644 index 2007c20e5ca..00000000000 --- a/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/board.cmake +++ /dev/null @@ -1,39 +0,0 @@ -# Copyright (c) 2021 Arm Limited (or its affiliates). All rights reserved. -# Copyright (c) 2022 IoT.bzh -# SPDX-License-Identifier: Apache-2.0 - -set(SUPPORTED_EMU_PLATFORMS armfvp) -set(ARMFVP_BIN_NAME FVP_BaseR_AEMv8R) - -set(ARMFVP_FLAGS - -C cluster0.has_aarch64=0 - -C cluster0.VMSA_supported=0 - -C cluster0.NUM_CORES=${CONFIG_MP_MAX_NUM_CPUS} - -C cluster0.gicv3.cpuintf-mmap-access-level=2 - -C cluster0.gicv3.SRE-enable-action-on-mmap=2 - -C cluster0.gicv3.SRE-EL2-enable-RAO=1 - -C cluster0.gicv3.extended-interrupt-range-support=1 - -C gic_distributor.GICD_CTLR-DS-1-means-secure-only=1 - -C gic_distributor.has-two-security-states=0 - -C bp.refcounter.non_arch_start_at_default=1 - # UART0 config - -C bp.pl011_uart0.out_file=- - -C bp.pl011_uart0.unbuffered_output=1 - -C bp.terminal_0.start_telnet=0 - # UART1 config - -C bp.pl011_uart1.out_file=- - -C bp.pl011_uart1.unbuffered_output=1 - -C bp.terminal_1.start_telnet=0 - # UART2 config - -C bp.pl011_uart2.out_file=- - -C bp.pl011_uart2.unbuffered_output=1 - -C bp.terminal_2.start_telnet=0 - # UART3 config - -C bp.pl011_uart3.out_file=- - -C bp.pl011_uart3.unbuffered_output=1 - -C bp.terminal_3.start_telnet=0 - - -C bp.vis.disable_visualisation=1 - -C bp.vis.rate_limit-enable=0 - -C cache_state_modelled=0 - ) diff --git a/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32_smp_defconfig b/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32_smp_defconfig deleted file mode 100644 index 3f7f981b46e..00000000000 --- a/boards/boards_legacy/arm/fvp_baser_aemv8r_aarch32/fvp_baser_aemv8r_aarch32_smp_defconfig +++ /dev/null @@ -1,32 +0,0 @@ -# Copyright (c) 2023 Arm Limited (or its affiliates). All rights reserved. -# SPDX-License-Identifier: Apache-2.0 - -CONFIG_SOC_SERIES_FVP_AEMV8R_AARCH32=y -CONFIG_SOC_FVP_AEMV8R_AARCH32=y -CONFIG_BOARD_FVP_BASER_AEMV8R_AARCH32=y -CONFIG_ARM_MPU=y - -CONFIG_ISR_STACK_SIZE=1024 -CONFIG_THREAD_STACK_INFO=y - -# Enable Timer and Sys clock -CONFIG_SYS_CLOCK_TICKS_PER_SEC=100 -CONFIG_ARM_ARCH_TIMER=y - -# Enable UART driver -CONFIG_SERIAL=y - -# Enable serial port -CONFIG_UART_INTERRUPT_DRIVEN=y - -# Enable console -CONFIG_CONSOLE=y -CONFIG_UART_CONSOLE=y - -CONFIG_CACHE_MANAGEMENT=y - -CONFIG_USE_SWITCH=y -CONFIG_SMP=y -CONFIG_MP_MAX_NUM_CPUS=4 - -CONFIG_DCACHE=n