diff --git a/drivers/serial/uart_mcux_flexcomm.c b/drivers/serial/uart_mcux_flexcomm.c index 69b2df6204c..a15ba82873a 100644 --- a/drivers/serial/uart_mcux_flexcomm.c +++ b/drivers/serial/uart_mcux_flexcomm.c @@ -813,7 +813,7 @@ static void mcux_flexcomm_uart_dma_rx_callback(const struct device *dma_device, data->rx_data.offset = 0; } -#if defined(CONFIG_SOC_SERIES_IMX_RT5XX) || defined(CONFIG_SOC_SERIES_IMXRT6XX) +#if defined(CONFIG_SOC_SERIES_IMXRT5XX) || defined(CONFIG_SOC_SERIES_IMXRT6XX) /* * This functions calculates the inputmux connection value * needed by INPUTMUX_EnableSignal to allow the UART's DMA @@ -825,7 +825,7 @@ static uint32_t fc_uart_calc_inmux_connection(uint8_t channel, DMA_Type *base) uint32_t chmux_sel = 0; uint32_t chmux_val = 0; -#if defined(CONFIG_SOC_SERIES_IMX_RT5XX) +#if defined(CONFIG_SOC_SERIES_IMXRT5XX) uint32_t chmux_sel_id = 0; if (base == (DMA_Type *)DMA0_BASE) { @@ -902,7 +902,7 @@ static int flexcomm_uart_async_init(const struct device *dev) USART_EnableRxDMA(config->base, false); /* Route DMA requests */ -#if defined(CONFIG_SOC_SERIES_IMX_RT5XX) || defined(CONFIG_SOC_SERIES_IMXRT6XX) +#if defined(CONFIG_SOC_SERIES_IMXRT5XX) || defined(CONFIG_SOC_SERIES_IMXRT6XX) /* RT 3 digit uses input mux to route DMA requests from * the UART peripheral to a hardware designated DMA channel */ diff --git a/drivers/usb/device/usb_dc_mcux.c b/drivers/usb/device/usb_dc_mcux.c index c590449ba3b..a4e979d206b 100644 --- a/drivers/usb/device/usb_dc_mcux.c +++ b/drivers/usb/device/usb_dc_mcux.c @@ -76,7 +76,7 @@ static void usb_isr_handler(void); BUILD_ASSERT(NUM_INSTS <= 1, "Only one USB device supported"); /* Controller ID is for HAL usage */ -#if defined(CONFIG_SOC_SERIES_IMX_RT5XX) || \ +#if defined(CONFIG_SOC_SERIES_IMXRT5XX) || \ defined(CONFIG_SOC_SERIES_IMXRT6XX) || \ defined(CONFIG_SOC_LPC55S28) || \ defined(CONFIG_SOC_LPC55S16) diff --git a/soc/nxp/imxrt/CMakeLists.txt b/soc/nxp/imxrt/CMakeLists.txt index 4a4b22cf987..25cd1b81554 100644 --- a/soc/nxp/imxrt/CMakeLists.txt +++ b/soc/nxp/imxrt/CMakeLists.txt @@ -33,7 +33,7 @@ if(CONFIG_SOC_SERIES_IMXRT10XX OR CONFIG_SOC_SERIES_IMXRT11XX) zephyr_compile_definitions(XIP_EXTERNAL_FLASH) endif() -if(CONFIG_SOC_SERIES_IMXRT6XX OR CONFIG_SOC_SERIES_IMX_RT5XX) +if(CONFIG_SOC_SERIES_IMXRT6XX OR CONFIG_SOC_SERIES_IMXRT5XX) zephyr_linker_sources_ifdef(CONFIG_USB_DEVICE_DRIVER SECTIONS usb.ld) endif() diff --git a/soc/nxp/imxrt/Kconfig b/soc/nxp/imxrt/Kconfig index c0049fc3cd3..7be3ce7e00a 100644 --- a/soc/nxp/imxrt/Kconfig +++ b/soc/nxp/imxrt/Kconfig @@ -63,7 +63,7 @@ endchoice # BOOT_DEVICE config FLEXSPI_CONFIG_BLOCK_OFFSET hex "FlexSPI config block offset" - default 0x400 if SOC_SERIES_IMX_RT5XX || SOC_SERIES_IMXRT6XX + default 0x400 if SOC_SERIES_IMXRT5XX || SOC_SERIES_IMXRT6XX default 0x0 if BOOT_FLEXSPI_NOR help FlexSPI configuration block consists of parameters regarding specific diff --git a/soc/nxp/imxrt/boot_header.ld b/soc/nxp/imxrt/boot_header.ld index 7fb692e6eb9..e46fa5789e3 100644 --- a/soc/nxp/imxrt/boot_header.ld +++ b/soc/nxp/imxrt/boot_header.ld @@ -8,7 +8,7 @@ #if defined(CONFIG_SOC_SERIES_IMXRT11XX) || defined(CONFIG_SOC_SERIES_IMXRT10XX) KEEP(*(.boot_hdr.conf)) #endif -#if defined(CONFIG_SOC_SERIES_IMXRT6XX) || defined(CONFIG_SOC_SERIES_IMX_RT5XX) +#if defined(CONFIG_SOC_SERIES_IMXRT6XX) || defined(CONFIG_SOC_SERIES_IMXRT5XX) KEEP(*(.flash_conf)) #endif . = CONFIG_IMAGE_VECTOR_TABLE_OFFSET; diff --git a/soc/nxp/imxrt/imxrt5xx/CMakeLists.txt b/soc/nxp/imxrt/imxrt5xx/CMakeLists.txt new file mode 100644 index 00000000000..36e3874a8dc --- /dev/null +++ b/soc/nxp/imxrt/imxrt5xx/CMakeLists.txt @@ -0,0 +1,11 @@ +# +# Copyright 2024 NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +if(CONFIG_SOC_MIMXRT595S_CM33) + add_subdirectory(cm33) +elseif(CONFIG_SOC_MIMXRT595S_F1) + add_subdirectory(f1) +endif() diff --git a/soc/nxp/imxrt/imxrt5xx/Kconfig b/soc/nxp/imxrt/imxrt5xx/Kconfig new file mode 100644 index 00000000000..75f695d5cc5 --- /dev/null +++ b/soc/nxp/imxrt/imxrt5xx/Kconfig @@ -0,0 +1,85 @@ +# Copyright 2024 NXP +# Copyright (c) 2023 Google LLC. +# SPDX-License-Identifier: Apache-2.0 + +config SOC_MIMXRT595S_CM33 + select CPU_CORTEX_M33 + select CLOCK_CONTROL + select CPU_CORTEX_M_HAS_DWT + select ARM + select HAS_PM + select HAS_POWEROFF + select CPU_HAS_ARM_SAU + select CPU_HAS_ARM_MPU + select CPU_HAS_FPU + select PLATFORM_SPECIFIC_INIT + select ARMV8_M_DSP + select ARM_TRUSTZONE_M + select CPU_CORTEX_M_HAS_SYSTICK + select HAS_MCUX + select HAS_MCUX_SYSCON + select HAS_MCUX_FLEXCOMM + select HAS_MCUX_FLEXSPI + select HAS_MCUX_CACHE + select HAS_MCUX_LPC_DMA + select HAS_MCUX_LPADC + select HAS_MCUX_OS_TIMER + select HAS_MCUX_LPC_RTC + select HAS_MCUX_TRNG + select HAS_MCUX_SCTIMER + select HAS_MCUX_USDHC1 + select HAS_MCUX_USDHC2 + select HAS_MCUX_USB_LPCIP3511 + select HAS_MCUX_CTIMER + +config SOC_MIMXRT595S_F1 + select XTENSA + select XTENSA_HAL if ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" && "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang") + select XTENSA_RESET_VECTOR + select XTENSA_USE_CORE_CRT1 + +if SOC_SERIES_IMXRT5XX + +if NXP_IMXRT_BOOT_HEADER + +config IMAGE_VECTOR_TABLE_OFFSET + default 0x1000 + +endif # NXP_IMXRT_BOOT_HEADER + +config IMXRT5XX_CODE_CACHE + bool "Code cache" + default y + help + Enable code cache for FlexSPI region at boot. If this Kconfig is + cleared, the CACHE64 controller will be disabled during SOC init + +choice FLEXCOMM0_CLK_SRC + prompt "Clock source for Flexcomm0" + default FLEXCOMM0_CLK_SRC_FRG + +config FLEXCOMM0_CLK_SRC_FRG + bool "FRG is source of Flexcomm0 clock" + +config FLEXCOMM0_CLK_SRC_FRO + bool "FRO_DIV4 is source of Flexcomm0 clock" + +endchoice + +choice MIPI_DPHY_CLK_SRC + prompt "Clock source for MIPI DPHY" + default MIPI_DPHY_CLK_SRC_AUX1_PLL + +config MIPI_DPHY_CLK_SRC_AUX1_PLL + bool "AUX1_PLL is source of MIPI_DPHY clock" + +config MIPI_DPHY_CLK_SRC_FRO + bool "FRO 192/96M is source of MIPI_DPHY clock" + +endchoice + +config MCUX_CORE_SUFFIX + default "_cm33" if SOC_MIMXRT595S_CM33 + default "_dsp" if SOC_MIMXRT595S_F1 + +endif # SOC_SERIES_IMXRT5XX diff --git a/soc/nxp/imxrt/imxrt5xx/Kconfig.defconfig b/soc/nxp/imxrt/imxrt5xx/Kconfig.defconfig new file mode 100644 index 00000000000..e99289a1320 --- /dev/null +++ b/soc/nxp/imxrt/imxrt5xx/Kconfig.defconfig @@ -0,0 +1,119 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +if SOC_MIMXRT595S_CM33 + +config ROM_START_OFFSET + default 0x1200 if NXP_IMXRT_BOOT_HEADER + +# The PVT Sensor uses IRQ #75. For more details, see +# https://www.nxp.com/design/design-center/software/embedded-software/application-software-packs/application-software-pack-dynamic-voltage-scaling-using-pvt-sensor:APP-SW-PACK-DVS-PVT-SENSOR +config NUM_IRQS + default 76 + +config ZTEST_NO_YIELD + default y if (PM && ZTEST) + +# Code relocation is needed for flash clock setup +config CODE_DATA_RELOCATION_SRAM + default y + +# +# MBEDTLS is larger but much faster than TinyCrypt so choose wisely +# +config MBEDTLS +#config TINYCRYPT + default y if CSPRNG_ENABLED + depends on ENTROPY_GENERATOR + +if MBEDTLS +# +# MBEDTLS CTR_DRBG code path needs extra stack space for initialization than +# what the ztest_thread_stack defaults to. +# +config TEST_EXTRA_STACK_SIZE + int + default 1024 +endif # MBEDTLS + +if MCUX_OS_TIMER + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 1000000 + +endif # MCUX_OS_TIMER + +if CORTEX_M_SYSTICK + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 250105263 + +endif # CORTEX_M_SYSTICK + +choice USB_MCUX_CONTROLLER_TYPE + default USB_DC_NXP_LPCIP3511 +endchoice + +if PM_DEVICE +# Enable the MEMC FlexSPI driver when using device power +# management so we can reconfigure the FlexSPI pins to +# save power. The MEMC FlexSPI driver is enabled when we +# enable the Flash subsystem, however we would like to +# reconfigure the FlexSPI pins even when the Flash driver +# is disabled, hence MEMC is selected when PM_DEVICE +# is turned on. +config MEMC + default y + select MEMC_MCUX_FLEXSPI + +endif + +endif # SOC_MIMXRT595S_CM33 + +if SOC_MIMXRT595S_F1 + +config SMP + default n + +config XTENSA_TIMER + default y + +config KERNEL_ENTRY + default "__start" + +config MULTI_LEVEL_INTERRUPTS + default n + +config 2ND_LEVEL_INTERRUPTS + default n + +# To prevent test uses TEST_LOGGING_MINIMAL +config TEST_LOGGING_DEFAULTS + default n + depends on TEST + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 198000000 + +config XTENSA_CCOUNT_HZ + default SYS_CLOCK_HW_CYCLES_PER_SEC + +config SYS_CLOCK_TICKS_PER_SEC + default 1000 + +config DYNAMIC_INTERRUPTS + default n + +config CACHE + default n + +config DCACHE + default n + +config CACHE_MANAGEMENT + default n + +config LOG + default n + +endif # SOC_MIMXRT595S_F1 diff --git a/soc/nxp/imxrt/imxrt5xx/Kconfig.soc b/soc/nxp/imxrt/imxrt5xx/Kconfig.soc new file mode 100644 index 00000000000..6b2c58f5753 --- /dev/null +++ b/soc/nxp/imxrt/imxrt5xx/Kconfig.soc @@ -0,0 +1,60 @@ +# i.MX RT5XX Series + +# Copyright 2022-2024, NXP +# SPDX-License-Identifier: Apache-2.0 + +config SOC_SERIES_IMXRT5XX + bool + select SOC_FAMILY_NXP_IMXRT + +config SOC_MIMXRT595S + bool + select SOC_SERIES_IMXRT5XX + +config SOC_MIMXRT595S_CM33 + bool + select SOC_MIMXRT595S + help + NXP RT5xx CM33 core + +config SOC_MIMXRT595S_F1 + bool + select SOC_MIMXRT595S + help + NXP RT5xx ADSP Series + +config SOC_SERIES + default "imxrt5xx" if SOC_SERIES_IMXRT5XX + +config SOC + default "mimxrt595s" if SOC_MIMXRT595S + +config SOC_TOOLCHAIN_NAME + string + default "nxp_rt500_adsp" if SOC_MIMXRT595S_F1 + +config SOC_PART_NUMBER_MIMXRT533SFFOC + bool + +config SOC_PART_NUMBER_MIMXRT555SFFOC + bool + +config SOC_PART_NUMBER_MIMXRT595SFFOC + bool + +config SOC_PART_NUMBER_MIMXRT533SFAWC + bool + +config SOC_PART_NUMBER_MIMXRT555SFAWC + bool + +config SOC_PART_NUMBER_MIMXRT595SFAWC + bool + +config SOC_PART_NUMBER + default "MIMXRT533SFAWC" if SOC_PART_NUMBER_MIMXRT533SFAWC + default "MIMXRT555SFAWC" if SOC_PART_NUMBER_MIMXRT555SFAWC + default "MIMXRT595SFAWC" if SOC_PART_NUMBER_MIMXRT595SFAWC + default "MIMXRT533SFFOC" if SOC_PART_NUMBER_MIMXRT533SFFOC + default "MIMXRT555SFFOC" if SOC_PART_NUMBER_MIMXRT555SFFOC + default "MIMXRT595SFFOC" if SOC_PART_NUMBER_MIMXRT595SFFOC diff --git a/soc/soc_legacy/arm/nxp_imx/rt5xx/CMakeLists.txt b/soc/nxp/imxrt/imxrt5xx/cm33/CMakeLists.txt similarity index 74% rename from soc/soc_legacy/arm/nxp_imx/rt5xx/CMakeLists.txt rename to soc/nxp/imxrt/imxrt5xx/cm33/CMakeLists.txt index e12f2e9ae18..c47971c8ccc 100644 --- a/soc/soc_legacy/arm/nxp_imx/rt5xx/CMakeLists.txt +++ b/soc/nxp/imxrt/imxrt5xx/cm33/CMakeLists.txt @@ -1,5 +1,5 @@ # -# Copyright (c) 2022, NXP +# Copyright 2022,2024 NXP # # SPDX-License-Identifier: Apache-2.0 # @@ -8,6 +8,8 @@ zephyr_compile_definitions(FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE) zephyr_compile_definitions_ifdef(CONFIG_USB_DEVICE_DRIVER USB_STACK_USE_DEDICATED_RAM=1) +zephyr_include_directories(.) + zephyr_sources( soc.c flash_clock_setup.c @@ -22,12 +24,6 @@ zephyr_library_include_directories( ${ZEPHYR_BASE}/arch/${ARCH}/include ) -zephyr_linker_sources_ifdef(CONFIG_NXP_IMX_RT5XX_BOOT_HEADER - ROM_START SORT_KEY 0 boot_header.ld) - -zephyr_linker_sources_ifdef(CONFIG_USB_DEVICE_DRIVER - SECTIONS usb.ld) - zephyr_code_relocate(FILES flash_clock_setup.c LOCATION RAM) set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/linker.ld CACHE INTERNAL "") diff --git a/soc/soc_legacy/arm/nxp_imx/rt5xx/flash_clock_setup.c b/soc/nxp/imxrt/imxrt5xx/cm33/flash_clock_setup.c similarity index 100% rename from soc/soc_legacy/arm/nxp_imx/rt5xx/flash_clock_setup.c rename to soc/nxp/imxrt/imxrt5xx/cm33/flash_clock_setup.c diff --git a/soc/soc_legacy/arm/nxp_imx/rt5xx/flash_clock_setup.h b/soc/nxp/imxrt/imxrt5xx/cm33/flash_clock_setup.h similarity index 100% rename from soc/soc_legacy/arm/nxp_imx/rt5xx/flash_clock_setup.h rename to soc/nxp/imxrt/imxrt5xx/cm33/flash_clock_setup.h diff --git a/soc/soc_legacy/arm/nxp_imx/rt5xx/linker.ld b/soc/nxp/imxrt/imxrt5xx/cm33/linker.ld similarity index 100% rename from soc/soc_legacy/arm/nxp_imx/rt5xx/linker.ld rename to soc/nxp/imxrt/imxrt5xx/cm33/linker.ld diff --git a/soc/soc_legacy/arm/nxp_imx/rt5xx/pinctrl_soc.h b/soc/nxp/imxrt/imxrt5xx/cm33/pinctrl_soc.h similarity index 100% rename from soc/soc_legacy/arm/nxp_imx/rt5xx/pinctrl_soc.h rename to soc/nxp/imxrt/imxrt5xx/cm33/pinctrl_soc.h diff --git a/soc/soc_legacy/arm/nxp_imx/rt5xx/power.c b/soc/nxp/imxrt/imxrt5xx/cm33/power.c similarity index 100% rename from soc/soc_legacy/arm/nxp_imx/rt5xx/power.c rename to soc/nxp/imxrt/imxrt5xx/cm33/power.c diff --git a/soc/soc_legacy/arm/nxp_imx/rt5xx/poweroff.c b/soc/nxp/imxrt/imxrt5xx/cm33/poweroff.c similarity index 100% rename from soc/soc_legacy/arm/nxp_imx/rt5xx/poweroff.c rename to soc/nxp/imxrt/imxrt5xx/cm33/poweroff.c diff --git a/soc/soc_legacy/arm/nxp_imx/rt5xx/soc.c b/soc/nxp/imxrt/imxrt5xx/cm33/soc.c similarity index 99% rename from soc/soc_legacy/arm/nxp_imx/rt5xx/soc.c rename to soc/nxp/imxrt/imxrt5xx/cm33/soc.c index ca2a89cd553..4b420ea46d4 100644 --- a/soc/soc_legacy/arm/nxp_imx/rt5xx/soc.c +++ b/soc/nxp/imxrt/imxrt5xx/cm33/soc.c @@ -90,7 +90,7 @@ extern uint32_t SystemCoreClock; /* Main stack pointer */ extern char z_main_stack[]; -#ifdef CONFIG_NXP_IMX_RT5XX_BOOT_HEADER +#ifdef CONFIG_NXP_IMXRT_BOOT_HEADER extern char _flash_used[]; extern void z_arm_reset(void); @@ -133,7 +133,7 @@ __imx_boot_ivt_section void (* const image_vector_table[])(void) = { z_arm_exc_spurious, #endif }; -#endif /* CONFIG_NXP_IMX_RT5XX_BOOT_HEADER */ +#endif /* CONFIG_NXP_IMXRT_BOOT_HEADER */ #if CONFIG_USB_DC_NXP_LPCIP3511 @@ -197,7 +197,7 @@ static void usb_device_clock_init(void) void z_arm_platform_init(void) { -#ifndef CONFIG_NXP_IMX_RT5XX_BOOT_HEADER +#ifndef CONFIG_NXP_IMXRT_BOOT_HEADER /* * If boot did not proceed using a boot header, we should not assume * the core is in reset state. Disable the MPU and correctly @@ -211,7 +211,7 @@ void z_arm_platform_init(void) MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; /* Set stack pointer */ __set_MSP((uint32_t)(z_main_stack + CONFIG_MAIN_STACK_SIZE)); -#endif /* !CONFIG_NXP_IMX_RT5XX_BOOT_HEADER */ +#endif /* !CONFIG_NXP_IMXRT_BOOT_HEADER */ /* This is provided by the SDK */ SystemInit(); } diff --git a/soc/soc_legacy/arm/nxp_imx/rt5xx/soc.h b/soc/nxp/imxrt/imxrt5xx/cm33/soc.h similarity index 100% rename from soc/soc_legacy/arm/nxp_imx/rt5xx/soc.h rename to soc/nxp/imxrt/imxrt5xx/cm33/soc.h diff --git a/soc/soc_legacy/arm/nxp_imx/rt5xx/usb.ld b/soc/nxp/imxrt/imxrt5xx/cm33/usb.ld similarity index 100% rename from soc/soc_legacy/arm/nxp_imx/rt5xx/usb.ld rename to soc/nxp/imxrt/imxrt5xx/cm33/usb.ld diff --git a/soc/soc_legacy/xtensa/nxp_adsp/CMakeLists.txt b/soc/nxp/imxrt/imxrt5xx/f1/CMakeLists.txt similarity index 54% rename from soc/soc_legacy/xtensa/nxp_adsp/CMakeLists.txt rename to soc/nxp/imxrt/imxrt5xx/f1/CMakeLists.txt index d9a68b6ae73..f54b5dd53a4 100644 --- a/soc/soc_legacy/xtensa/nxp_adsp/CMakeLists.txt +++ b/soc/nxp/imxrt/imxrt5xx/f1/CMakeLists.txt @@ -1,18 +1,14 @@ -# NXP i.MX8/RT SoC family CMake file +# NXP RT SoC family CMake file # # Copyright (c) 2021 NXP # SPDX-License-Identifier: Apache-2.0 -if(CONFIG_SOC_NXP_RT595) - zephyr_compile_definitions(CPU_MIMXRT595SFFOC_dsp) -endif() +zephyr_compile_definitions(CPU_MIMXRT595SFFOC_dsp) -add_subdirectory(common) -zephyr_include_directories(${SOC_SERIES}/include) +zephyr_include_directories(include) # west sign -# See detailed comments in soc/soc_legacy/xtensa/intel_adsp/common/CMakeLists.txt add_custom_target(zephyr.ri ALL DEPENDS ${CMAKE_BINARY_DIR}/zephyr/zephyr.ri ) @@ -24,4 +20,4 @@ add_custom_command( DEPENDS ${CMAKE_BINARY_DIR}/zephyr/${KERNEL_ELF_NAME} ) -set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/${SOC_SERIES}/linker.ld CACHE INTERNAL "") +set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/linker.ld CACHE INTERNAL "") diff --git a/soc/soc_legacy/xtensa/nxp_adsp/rt5xx/include/_soc_inthandlers.h b/soc/nxp/imxrt/imxrt5xx/f1/include/_soc_inthandlers.h similarity index 100% rename from soc/soc_legacy/xtensa/nxp_adsp/rt5xx/include/_soc_inthandlers.h rename to soc/nxp/imxrt/imxrt5xx/f1/include/_soc_inthandlers.h diff --git a/soc/soc_legacy/xtensa/nxp_adsp/common/include/adsp/cache.h b/soc/nxp/imxrt/imxrt5xx/f1/include/adsp/cache.h similarity index 100% rename from soc/soc_legacy/xtensa/nxp_adsp/common/include/adsp/cache.h rename to soc/nxp/imxrt/imxrt5xx/f1/include/adsp/cache.h diff --git a/soc/soc_legacy/xtensa/nxp_adsp/common/include/adsp/io.h b/soc/nxp/imxrt/imxrt5xx/f1/include/adsp/io.h similarity index 100% rename from soc/soc_legacy/xtensa/nxp_adsp/common/include/adsp/io.h rename to soc/nxp/imxrt/imxrt5xx/f1/include/adsp/io.h diff --git a/soc/soc_legacy/xtensa/nxp_adsp/common/include/soc.h b/soc/nxp/imxrt/imxrt5xx/f1/include/soc.h similarity index 100% rename from soc/soc_legacy/xtensa/nxp_adsp/common/include/soc.h rename to soc/nxp/imxrt/imxrt5xx/f1/include/soc.h diff --git a/soc/soc_legacy/xtensa/nxp_adsp/rt5xx/include/soc/memory.h b/soc/nxp/imxrt/imxrt5xx/f1/include/soc/memory.h similarity index 100% rename from soc/soc_legacy/xtensa/nxp_adsp/rt5xx/include/soc/memory.h rename to soc/nxp/imxrt/imxrt5xx/f1/include/soc/memory.h diff --git a/soc/soc_legacy/xtensa/nxp_adsp/rt5xx/linker.ld b/soc/nxp/imxrt/imxrt5xx/f1/linker.ld similarity index 100% rename from soc/soc_legacy/xtensa/nxp_adsp/rt5xx/linker.ld rename to soc/nxp/imxrt/imxrt5xx/f1/linker.ld diff --git a/soc/nxp/imxrt/soc.yml b/soc/nxp/imxrt/soc.yml index 5ab77d6dd01..319d5b947e2 100644 --- a/soc/nxp/imxrt/soc.yml +++ b/soc/nxp/imxrt/soc.yml @@ -23,6 +23,12 @@ family: cpuclusters: - name: cm7 - name: cm4 + - name: imxrt5xx + socs: + - name: mimxrt595s + cpuclusters: + - name: cm33 + - name: f1 - name: imxrt6xx socs: - name: mimxrt685s diff --git a/soc/soc_legacy/arm/nxp_imx/rt5xx/Kconfig.defconfig.mimxrt595_cm33 b/soc/soc_legacy/arm/nxp_imx/rt5xx/Kconfig.defconfig.mimxrt595_cm33 deleted file mode 100644 index f8419fc3b1a..00000000000 --- a/soc/soc_legacy/arm/nxp_imx/rt5xx/Kconfig.defconfig.mimxrt595_cm33 +++ /dev/null @@ -1,40 +0,0 @@ -# NXP MIMXRT5XX platform configuration options - -# Copyright (c) 2022, NXP -# SPDX-License-Identifier: Apache-2.0 - -if SOC_MIMXRT595S_CM33 - -config SOC - default "mimxrt595s_cm33" - -if MCUX_OS_TIMER - -config SYS_CLOCK_HW_CYCLES_PER_SEC - default 1000000 - -endif # MCUX_OS_TIMER - -if CORTEX_M_SYSTICK - -config SYS_CLOCK_HW_CYCLES_PER_SEC - default 250105263 - -endif # CORTEX_M_SYSTICK - -choice USB_MCUX_CONTROLLER_TYPE - default USB_DC_NXP_LPCIP3511 -endchoice - -# Enable the MEMC FlexSPI driver when using device power -# management so we can reconfigure the FlexSPI pins to -# save power. The MEMC FlexSPI driver is enabled when we -# enable the Flash subsystem, however we would like to -# reconfigure the FlexSPI pins even when the Flash driver -# is disabled, hence MEMC is selected when PM_DEVICE -# is turned on. -config MEMC - default y if PM_DEVICE - select MEMC_MCUX_FLEXSPI - -endif # SOC_MIMXRT685S_CM33 diff --git a/soc/soc_legacy/arm/nxp_imx/rt5xx/Kconfig.defconfig.series b/soc/soc_legacy/arm/nxp_imx/rt5xx/Kconfig.defconfig.series deleted file mode 100644 index 3853a3826e4..00000000000 --- a/soc/soc_legacy/arm/nxp_imx/rt5xx/Kconfig.defconfig.series +++ /dev/null @@ -1,82 +0,0 @@ -# i.MX RT5XX series configuration options - -# Copyright (c) 2022-2024, NXP -# SPDX-License-Identifier: Apache-2.0 - -if SOC_SERIES_IMX_RT5XX - -config SOC_SERIES - default "rt5xx" - -config ROM_START_OFFSET - default 0x1200 if NXP_IMX_RT5XX_BOOT_HEADER - -# The PVT Sensor uses IRQ #75. For more details, see -# https://www.nxp.com/design/design-center/software/embedded-software/application-software-packs/application-software-pack-dynamic-voltage-scaling-using-pvt-sensor:APP-SW-PACK-DVS-PVT-SENSOR -config NUM_IRQS - default 76 - -config ZTEST_NO_YIELD - default y if (PM && ZTEST) - -# The base address is determined from the zephyr,flash node with the following -# precedence: -# FlexSPI base address (if flash node is on a FlexSPI bus) -# node reg property (used for memory regions such as SRAM) - -# Workaround for not being able to have commas in macro arguments - -DT_CHOSEN_Z_FLASH := zephyr,flash -DT_COMPAT_FLEXSPI := nxp,imx-flexspi - -# Macros to shorten Kconfig definitions -DT_CHOSEN_FLASH_NODE := $(dt_chosen_path,$(DT_CHOSEN_Z_FLASH)) -DT_CHOSEN_FLASH_PARENT := $(dt_node_parent,$(DT_CHOSEN_FLASH_NODE)) - -config FLASH_BASE_ADDRESS - default $(dt_node_reg_addr_hex,$(DT_CHOSEN_FLASH_PARENT),1) \ - if $(dt_node_has_compat,$(DT_CHOSEN_FLASH_PARENT),$(DT_COMPAT_FLEXSPI)) - default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH)) - -# The RT5xx has no internal flash. If the flash node has a size property, -# use that over the reg property. This is used for the external flash -# present on the board. Otherwise, fallback to the reg property -config FLASH_SIZE - default $(dt_node_int_prop_int,$(DT_CHOSEN_FLASH_NODE),size,Kb) \ - if $(dt_node_has_prop,$(DT_CHOSEN_FLASH_NODE),size) - default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_FLASH),0,K) - -if FLASH_MCUX_FLEXSPI_XIP - -# Avoid RWW hazards by defaulting logging to disabled -choice FLASH_LOG_LEVEL_CHOICE - default FLASH_LOG_LEVEL_OFF -endchoice - -choice MEMC_LOG_LEVEL_CHOICE - default MEMC_LOG_LEVEL_OFF -endchoice - -endif - -# -# MBEDTLS is larger but much faster than TinyCrypt so choose wisely -# -config MBEDTLS -#config TINYCRYPT - default y if CSPRNG_ENABLED - depends on ENTROPY_GENERATOR - -if MBEDTLS -# -# MBEDTLS CTR_DRBG code path needs extra stack space for initialization than -# what the ztest_thread_stack defaults to. -# -config TEST_EXTRA_STACK_SIZE - int - default 1024 -endif # MBEDTLS - -source "soc/soc_legacy/arm/nxp_imx/rt5xx/Kconfig.defconfig.mimxrt5*" - -endif # SOC_SERIES_MIMXRT5XX diff --git a/soc/soc_legacy/arm/nxp_imx/rt5xx/Kconfig.series b/soc/soc_legacy/arm/nxp_imx/rt5xx/Kconfig.series deleted file mode 100644 index 96568031651..00000000000 --- a/soc/soc_legacy/arm/nxp_imx/rt5xx/Kconfig.series +++ /dev/null @@ -1,16 +0,0 @@ -# i.MX RT5XX Series - -# Copyright (c) 2022, NXP -# SPDX-License-Identifier: Apache-2.0 - -config SOC_SERIES_IMX_RT5XX - bool "i.MX RT5XX Series Family MCU" - select ARM - select CPU_CORTEX_M33 - select CPU_CORTEX_M_HAS_DWT - select SOC_FAMILY_IMX - select CLOCK_CONTROL - select HAS_PM - select HAS_POWEROFF - help - Enable support for i.MX RT5XX Series MCU series diff --git a/soc/soc_legacy/arm/nxp_imx/rt5xx/Kconfig.soc b/soc/soc_legacy/arm/nxp_imx/rt5xx/Kconfig.soc deleted file mode 100644 index 35b86c2e903..00000000000 --- a/soc/soc_legacy/arm/nxp_imx/rt5xx/Kconfig.soc +++ /dev/null @@ -1,156 +0,0 @@ -# i.MX RT5XX Series - -# Copyright 2022-2023, NXP -# SPDX-License-Identifier: Apache-2.0 - -choice - prompt "i.MX RT5XX Series MCU Selection" - depends on SOC_SERIES_IMX_RT5XX - -config SOC_MIMXRT595S_CM33 - bool "SOC_MIMXRT595S M33" - select CPU_HAS_ARM_SAU - select CPU_HAS_ARM_MPU - select CPU_HAS_FPU - select PLATFORM_SPECIFIC_INIT - select ARMV8_M_DSP - select ARM_TRUSTZONE_M - select CPU_CORTEX_M_HAS_SYSTICK - select HAS_MCUX - select HAS_MCUX_SYSCON - select HAS_MCUX_FLEXCOMM - select HAS_MCUX_FLEXSPI - select HAS_MCUX_CACHE - select HAS_MCUX_LPC_DMA - select HAS_MCUX_LPADC - select HAS_MCUX_OS_TIMER - select HAS_MCUX_LPC_RTC - select HAS_MCUX_TRNG - select HAS_MCUX_SCTIMER - select HAS_MCUX_USDHC1 - select HAS_MCUX_USDHC2 - select HAS_MCUX_USB_LPCIP3511 - select HAS_MCUX_CTIMER -endchoice - -if SOC_SERIES_IMX_RT5XX - -config SOC_PART_NUMBER_MIMXRT533SFFOC - bool - -config SOC_PART_NUMBER_MIMXRT555SFFOC - bool - -config SOC_PART_NUMBER_MIMXRT595SFFOC - bool - -config SOC_PART_NUMBER_MIMXRT533SFAWC - bool - -config SOC_PART_NUMBER_MIMXRT555SFAWC - bool - -config SOC_PART_NUMBER_MIMXRT595SFAWC - bool - -config SOC_PART_NUMBER_IMX_RT5XX - string - default "MIMXRT533SFAWC" if SOC_PART_NUMBER_MIMXRT533SFAWC - default "MIMXRT555SFAWC" if SOC_PART_NUMBER_MIMXRT555SFAWC - default "MIMXRT595SFAWC" if SOC_PART_NUMBER_MIMXRT595SFAWC - default "MIMXRT533SFFOC" if SOC_PART_NUMBER_MIMXRT533SFFOC - default "MIMXRT555SFFOC" if SOC_PART_NUMBER_MIMXRT555SFFOC - default "MIMXRT595SFFOC" if SOC_PART_NUMBER_MIMXRT595SFFOC - - help - This string holds the full part number of the SoC. It is a hidden - option that you should not set directly. The part number selection - choice defines the default value for this string. - -menuconfig NXP_IMX_RT5XX_BOOT_HEADER - bool "The boot header" - depends on !BOOTLOADER_MCUBOOT - help - Enable data structures required by the boot ROM to boot the - application from an external flash device. - -if NXP_IMX_RT5XX_BOOT_HEADER - -choice BOOT_DEVICE - prompt "Boot device selection" - default BOOT_FLEXSPI_NOR - -config BOOT_FLEXSPI_NOR - bool "FlexSPI serial NOR" - -endchoice - -config FLASH_CONFIG_OFFSET - hex "Flash config data offset" - default 0x400 - help - The flash config offset provides the boot ROM with the on-board - flash type and parameters. The boot ROM requires a fixed flash config - offset for FlexSPI device. - -config IMAGE_VECTOR_TABLE_OFFSET - hex "Image vector table offset" - default 0x1000 - help - The Image Vector Table (IVT) provides the boot ROM with pointers to - the application entry point and device configuration data. The boot - ROM requires a fixed IVT offset for each type of boot device. - -config NXP_IMX_RT_ROM_RAMLOADER - depends on !FLASH_MCUX_FLEXSPI_XIP - # Required so that debugger will load image to correct offset - select BUILD_OUTPUT_HEX - bool "Create output image that IMX RT ROM can load from FlexSPI to ram" - help - Builds an output image that the IMX RT BootROM can load from the - FlexSPI boot device into RAM region. The image will be loaded - from FLEXSPI0 into the region specified by `zephyr,flash` node. - -# Setup LMA adjustment if using the RAMLOADER feature of ROM -FLASH_CHOSEN := zephyr,flash -FLASH_BASE := $(dt_chosen_reg_addr_hex,$(FLASH_CHOSEN)) -FLEXSPI_BASE := $(dt_node_reg_addr_hex,/soc/spi@134000,1) -config BUILD_OUTPUT_ADJUST_LMA - default "$(FLEXSPI_BASE) - $(FLASH_BASE)" if NXP_IMX_RT_ROM_RAMLOADER - -endif # NXP_IMX_RT5XX_BOOT_HEADER - - - -config IMXRT5XX_CODE_CACHE - bool "Code cache" - default y - help - Enable code cache for FlexSPI region at boot. If this Kconfig is - cleared, the CACHE64 controller will be disabled during SOC init - -choice FLEXCOMM0_CLK_SRC - prompt "Clock source for Flexcomm0" - default FLEXCOMM0_CLK_SRC_FRG - -config FLEXCOMM0_CLK_SRC_FRG - bool "FRG is source of Flexcomm0 clock" - -config FLEXCOMM0_CLK_SRC_FRO - bool "FRO_DIV4 is source of Flexcomm0 clock" - -endchoice - -choice MIPI_DPHY_CLK_SRC - prompt "Clock source for MIPI DPHY" - default MIPI_DPHY_CLK_SRC_AUX1_PLL - -config MIPI_DPHY_CLK_SRC_AUX1_PLL - bool "AUX1_PLL is source of MIPI_DPHY clock" - -config MIPI_DPHY_CLK_SRC_FRO - bool "FRO 192/96M is source of MIPI_DPHY clock" - -endchoice - -endif # SOC_SERIES_IMX_RT5XX diff --git a/soc/soc_legacy/arm/nxp_imx/rt5xx/boot_header.ld b/soc/soc_legacy/arm/nxp_imx/rt5xx/boot_header.ld deleted file mode 100644 index 43683f6c7be..00000000000 --- a/soc/soc_legacy/arm/nxp_imx/rt5xx/boot_header.ld +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (c) 2022 NXP - * - * SPDX-License-Identifier: Apache-2.0 - */ - -. = CONFIG_FLASH_CONFIG_OFFSET; -KEEP(*(.flash_conf)) -. = CONFIG_IMAGE_VECTOR_TABLE_OFFSET; -KEEP(*(.boot_hdr.ivt)) diff --git a/soc/soc_legacy/xtensa/nxp_adsp/Kconfig b/soc/soc_legacy/xtensa/nxp_adsp/Kconfig deleted file mode 100644 index e5e6dd55f0f..00000000000 --- a/soc/soc_legacy/xtensa/nxp_adsp/Kconfig +++ /dev/null @@ -1,20 +0,0 @@ -# NXP i.MX8 SoC family configuration options -# -# Copyright (c) 2021 NXP -# SPDX-License-Identifier: Apache-2.0 - -config SOC_FAMILY_NXP_ADSP - bool - select ARCH_HAS_COHERENCE - select CPU_HAS_DCACHE - -if SOC_FAMILY_NXP_ADSP - -config SOC_FAMILY - string - default "nxp_adsp" - -# Select SoC Part No. and configuration options -source "soc/soc_legacy/xtensa/nxp_adsp/*/Kconfig.soc" - -endif # SOC_FAMILY_NXP_ADSP diff --git a/soc/soc_legacy/xtensa/nxp_adsp/Kconfig.defconfig b/soc/soc_legacy/xtensa/nxp_adsp/Kconfig.defconfig deleted file mode 100644 index 56cd1439046..00000000000 --- a/soc/soc_legacy/xtensa/nxp_adsp/Kconfig.defconfig +++ /dev/null @@ -1,33 +0,0 @@ -# NXP i.MX8/RT SoC family default configuration options -# -# Copyright (c) 2021 NXP -# SPDX-License-Identifier: Apache-2.0 - -if SOC_FAMILY_NXP_ADSP - -source "soc/soc_legacy/xtensa/nxp_adsp/*/Kconfig.defconfig.series" - -config CACHE_MANAGEMENT - default y - -config SMP - default n - -config XTENSA_TIMER - default y - -config KERNEL_ENTRY - default "__start" - -config MULTI_LEVEL_INTERRUPTS - default n - -config 2ND_LEVEL_INTERRUPTS - default n - -# To prevent test uses TEST_LOGGING_MINIMAL -config TEST_LOGGING_DEFAULTS - default n - depends on TEST - -endif diff --git a/soc/soc_legacy/xtensa/nxp_adsp/Kconfig.soc b/soc/soc_legacy/xtensa/nxp_adsp/Kconfig.soc deleted file mode 100644 index 1c080dcd31f..00000000000 --- a/soc/soc_legacy/xtensa/nxp_adsp/Kconfig.soc +++ /dev/null @@ -1,6 +0,0 @@ -# NXP i.MX8 SoC series selection -# -# Copyright (c) 2021 NXP -# SPDX-License-Identifier: Apache-2.0 - -source "soc/soc_legacy/xtensa/nxp_adsp/*/Kconfig.series" diff --git a/soc/soc_legacy/xtensa/nxp_adsp/common/CMakeLists.txt b/soc/soc_legacy/xtensa/nxp_adsp/common/CMakeLists.txt deleted file mode 100644 index 5c53c771f08..00000000000 --- a/soc/soc_legacy/xtensa/nxp_adsp/common/CMakeLists.txt +++ /dev/null @@ -1,6 +0,0 @@ -# NXP SoC family CMake file -# -# Copyright (c) 2021 NXP -# SPDX-License-Identifier: Apache-2.0 - -zephyr_include_directories(include) diff --git a/soc/soc_legacy/xtensa/nxp_adsp/rt5xx/Kconfig.defconfig.series b/soc/soc_legacy/xtensa/nxp_adsp/rt5xx/Kconfig.defconfig.series deleted file mode 100644 index b5a56658c7d..00000000000 --- a/soc/soc_legacy/xtensa/nxp_adsp/rt5xx/Kconfig.defconfig.series +++ /dev/null @@ -1,46 +0,0 @@ -# Copyright (c) 2023 Google LLC. -# SPDX-License-Identifier: Apache-2.0 - -if SOC_SERIES_NXP_RT5XX - -config SOC_SERIES - string - default "rt5xx" - -config SOC_TOOLCHAIN_NAME - string - default "nxp_rt500_adsp" - -config SOC - string - default "nxp_rt5xx" - -config SOC_PART_NUMBER - string - default "MIMXRT595SFFOC_dsp" if SOC_NXP_RT595 - -config SYS_CLOCK_HW_CYCLES_PER_SEC - default 198000000 - -config XTENSA_CCOUNT_HZ - default SYS_CLOCK_HW_CYCLES_PER_SEC - -config SYS_CLOCK_TICKS_PER_SEC - default 1000 - -config DYNAMIC_INTERRUPTS - default n - -config CACHE - default n - -config DCACHE - default n - -config CACHE_MANAGEMENT - default n - -config LOG - default n - -endif # SOC_SERIES_NXP_RT5XX diff --git a/soc/soc_legacy/xtensa/nxp_adsp/rt5xx/Kconfig.series b/soc/soc_legacy/xtensa/nxp_adsp/rt5xx/Kconfig.series deleted file mode 100644 index 5135b881638..00000000000 --- a/soc/soc_legacy/xtensa/nxp_adsp/rt5xx/Kconfig.series +++ /dev/null @@ -1,12 +0,0 @@ -# Copyright (c) 2023 Google LLC. -# SPDX-License-Identifier: Apache-2.0 - -config SOC_SERIES_NXP_RT5XX - bool "NXP RT5xx Series" - select SOC_FAMILY_NXP_ADSP - select XTENSA - select XTENSA_HAL if ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" && "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang") - select XTENSA_RESET_VECTOR - select XTENSA_USE_CORE_CRT1 - help - NXP RT5xx ADSP Series diff --git a/soc/soc_legacy/xtensa/nxp_adsp/rt5xx/Kconfig.soc b/soc/soc_legacy/xtensa/nxp_adsp/rt5xx/Kconfig.soc deleted file mode 100644 index e5b598c4f57..00000000000 --- a/soc/soc_legacy/xtensa/nxp_adsp/rt5xx/Kconfig.soc +++ /dev/null @@ -1,10 +0,0 @@ -# Copyright (c) 2023 Google LLC. -# SPDX-License-Identifier: Apache-2.0 - -choice - prompt "NXP RT5xx ADSP SoC Selection" - - config SOC_NXP_RT595 - bool "NXP RT595" - depends on SOC_SERIES_NXP_RT5XX -endchoice diff --git a/tests/arch/arm/arm_irq_vector_table/src/arm_irq_vector_table.c b/tests/arch/arm/arm_irq_vector_table/src/arm_irq_vector_table.c index 8a1ec89eebe..320c38e5160 100644 --- a/tests/arch/arm/arm_irq_vector_table/src/arm_irq_vector_table.c +++ b/tests/arch/arm/arm_irq_vector_table/src/arm_irq_vector_table.c @@ -184,7 +184,7 @@ vth __irq_vector_table _irq_vector_table[] = { isr0, isr1, isr2, 0, rtc_isr }; -#elif defined(CONFIG_SOC_SERIES_IMXRT6XX) || defined(CONFIG_SOC_SERIES_IMX_RT5XX) && \ +#elif defined(CONFIG_SOC_SERIES_IMXRT6XX) || defined(CONFIG_SOC_SERIES_IMXRT5XX) && \ defined(CONFIG_MCUX_OS_TIMER) /* MXRT685 employs a OS Event timer to implement the Kernel system * timer, instead of the ARM Cortex-M SysTick. Therefore, a pointer to diff --git a/tests/drivers/watchdog/wdt_basic_api/testcase.yaml b/tests/drivers/watchdog/wdt_basic_api/testcase.yaml index de623c6e7b2..8736f0c20eb 100644 --- a/tests/drivers/watchdog/wdt_basic_api/testcase.yaml +++ b/tests/drivers/watchdog/wdt_basic_api/testcase.yaml @@ -8,7 +8,7 @@ tests: filter: > not (CONFIG_WDT_SAM or dt_compat_enabled("st,stm32-window-watchdog") or dt_compat_enabled("st,stm32-watchdog") or CONFIG_SOC_FAMILY_LPC or - CONFIG_SOC_SERIES_IMXRT6XX or CONFIG_SOC_SERIES_IMX_RT5XX or + CONFIG_SOC_SERIES_IMXRT6XX or CONFIG_SOC_SERIES_IMXRT5XX or CONFIG_SOC_FAMILY_GD_GD32 or SOC_SERIES_GD32VF103) platform_exclude: - mec15xxevb_assy6853