diff --git a/README.rst b/README.rst
index 9472db6d5ee..a82f73b6fb0 100644
--- a/README.rst
+++ b/README.rst
@@ -24,7 +24,7 @@ resource-constrained systems: from simple embedded environmental sensors and
LED wearables to sophisticated smart watches and IoT wireless gateways.
The Zephyr kernel supports multiple architectures, including ARM (Cortex-A,
-Cortex-R, Cortex-M), Intel x86, ARC, Nios II, Tensilica Xtensa, and RISC-V,
+Cortex-R, Cortex-M), Intel x86, ARC, Tensilica Xtensa, and RISC-V,
SPARC, MIPS, and a large number of `supported boards`_.
.. below included in doc/introduction/introduction.rst
diff --git a/doc/_extensions/zephyr/domain/templates/board-catalog.html b/doc/_extensions/zephyr/domain/templates/board-catalog.html
index 4436d3ae091..03b0d39f343 100644
--- a/doc/_extensions/zephyr/domain/templates/board-catalog.html
+++ b/doc/_extensions/zephyr/domain/templates/board-catalog.html
@@ -17,7 +17,6 @@
Select an architecture
- Altera Nios II
ARM
ARM 64
MIPS
diff --git a/doc/develop/getting_started/installation_linux.rst b/doc/develop/getting_started/installation_linux.rst
index 6ef50b6d45a..23bc8bd9465 100644
--- a/doc/develop/getting_started/installation_linux.rst
+++ b/doc/develop/getting_started/installation_linux.rst
@@ -219,7 +219,6 @@ The Zephyr SDK supports the following target architectures:
* ARC (32-bit and 64-bit; ARCv1, ARCv2, ARCv3)
* ARM (32-bit and 64-bit; ARMv6, ARMv7, ARMv8; A/R/M Profiles)
* MIPS (32-bit and 64-bit)
-* Nios II
* RISC-V (32-bit and 64-bit; RV32I, RV32E, RV64I)
* x86 (32-bit and 64-bit)
* Xtensa
diff --git a/doc/develop/toolchains/zephyr_sdk.rst b/doc/develop/toolchains/zephyr_sdk.rst
index 3663dd7b85b..f9cb99fac79 100644
--- a/doc/develop/toolchains/zephyr_sdk.rst
+++ b/doc/develop/toolchains/zephyr_sdk.rst
@@ -18,7 +18,6 @@ The Zephyr SDK supports the following target architectures:
* ARC (32-bit and 64-bit; ARCv1, ARCv2, ARCv3)
* ARM (32-bit and 64-bit; ARMv6, ARMv7, ARMv8; A/R/M Profiles)
* MIPS (32-bit and 64-bit)
-* Nios II
* RISC-V (32-bit and 64-bit; RV32I, RV32E, RV64I)
* x86 (32-bit and 64-bit)
* Xtensa
diff --git a/doc/kernel/services/interrupts.rst b/doc/kernel/services/interrupts.rst
index 0053b019618..ad6cf4b5a53 100644
--- a/doc/kernel/services/interrupts.rst
+++ b/doc/kernel/services/interrupts.rst
@@ -548,10 +548,9 @@ for IRQ line n, and the function pointers are:
spurious IRQ handler will be placed here. The spurious IRQ handler
causes a system fatal error if encountered.
-Some architectures (such as the Nios II internal interrupt controller) have a
-common entry point for all interrupts and do not support a vector table, in
-which case the :kconfig:option:`CONFIG_GEN_IRQ_VECTOR_TABLE` option should be
-disabled.
+Some architectures have a common entry point for all interrupts and do not
+support a vector table, in which case the
+:kconfig:option:`CONFIG_GEN_IRQ_VECTOR_TABLE` option should be disabled.
Some architectures may reserve some initial vectors for system exceptions
and declare this in a table elsewhere, in which case
diff --git a/drivers/serial/Kconfig.altera_jtag b/drivers/serial/Kconfig.altera_jtag
index 92f691a4029..141c8477a4d 100644
--- a/drivers/serial/Kconfig.altera_jtag
+++ b/drivers/serial/Kconfig.altera_jtag
@@ -2,12 +2,12 @@
# SPDX-License-Identifier: Apache-2.0
config UART_ALTERA_JTAG
- bool "Nios II/NiosV JTAG UART driver"
+ bool "NiosV JTAG UART driver"
default y
depends on DT_HAS_ALTR_JTAG_UART_ENABLED
select SERIAL_HAS_DRIVER
help
- Enable the Altera JTAG UART driver, built in to many Nios II/NiosV CPU
+ Enable the Altera JTAG UART driver, built in to many NiosV CPU
designs.
config UART_ALTERA_JTAG_SUPPORT_INTERRUPT
diff --git a/subsys/testsuite/include/zephyr/interrupt_util.h b/subsys/testsuite/include/zephyr/interrupt_util.h
index 898326972ec..bbcda92aadf 100644
--- a/subsys/testsuite/include/zephyr/interrupt_util.h
+++ b/subsys/testsuite/include/zephyr/interrupt_util.h
@@ -222,7 +222,6 @@ static inline void trigger_irq(int irq)
}
#else
-/* So far, Nios II does not support this */
#define NO_TRIGGER_FROM_SW
#endif
diff --git a/tests/kernel/context/src/main.c b/tests/kernel/context/src/main.c
index 9d3d04c6350..768af6323fa 100644
--- a/tests/kernel/context/src/main.c
+++ b/tests/kernel/context/src/main.c
@@ -72,7 +72,7 @@ extern const int32_t z_sys_timer_irq_for_test;
#endif
-/* Cortex-M1 and Nios II do have a power saving instruction, so k_cpu_idle()
+/* Cortex-M1 does have a power saving instruction, so k_cpu_idle()
* returns immediately
*/
#if !defined(CONFIG_CPU_CORTEX_M1)
diff --git a/tests/net/npf/src/main.c b/tests/net/npf/src/main.c
index d85b78539f3..04d21992d6a 100644
--- a/tests/net/npf/src/main.c
+++ b/tests/net/npf/src/main.c
@@ -46,7 +46,7 @@ static const char dummy_data[] =
"LED wearables to sophisticated smart watches and IoT wireless gateways.\n"
"\n"
"The Zephyr kernel supports multiple architectures, including ARM Cortex-M,\n"
-"Intel x86, ARC, Nios II, Tensilica Xtensa, and RISC-V, and a large number of\n"
+"Intel x86, ARC, Tensilica Xtensa, and RISC-V, and a large number of\n"
"`supported boards`_.\n";