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boards: st: stm32 boards qspi-nor-flash DTS configuration

This change defines the "st,stm32-qspi-nor" compatible Node
in conformance to the DTS specifications
Includes the size property (in Bits) of the external memory device

Signed-off-by: Francois Ramu <francois.ramu@st.com>
pull/92069/head
Francois Ramu 2 months ago committed by Benjamin Cabé
parent
commit
e35ac8f972
  1. 19
      boards/alientek/pandora_stm32l475/pandora_stm32l475.dts
  2. 5
      boards/arduino/giga_r1/arduino_giga_r1_stm32h747xx_m7.dts
  3. 5
      boards/arduino/nicla_vision/arduino_nicla_vision_stm32h747xx_m7.dts
  4. 5
      boards/arduino/opta/arduino_opta_stm32h747xx_m7.dts
  5. 5
      boards/arduino/portenta_h7/arduino_portenta_h7-common.dtsi
  6. 5
      boards/fanke/fk743m5_xih6/fk743m5_xih6.dts
  7. 5
      boards/fanke/fk750m1_vbt6/fk750m1_vbt6.dts
  8. 6
      boards/st/disco_l475_iot1/disco_l475_iot1.dts
  9. 5
      boards/st/stm32f412g_disco/stm32f412g_disco.dts
  10. 5
      boards/st/stm32f723e_disco/stm32f723e_disco.dts
  11. 5
      boards/st/stm32f746g_disco/stm32f746g_disco.dts
  12. 5
      boards/st/stm32f7508_dk/stm32f7508_dk.dts
  13. 5
      boards/st/stm32f769i_disco/stm32f769i_disco.dts
  14. 10
      boards/st/stm32h745i_disco/stm32h745i_disco_stm32h745xx_m7.dts
  15. 10
      boards/st/stm32h747i_disco/stm32h747i_disco_stm32h747xx_m7.dts
  16. 10
      boards/st/stm32h750b_dk/stm32h750b_dk.dts
  17. 10
      boards/st/stm32h757i_eval/stm32h757i_eval_stm32h757xx_m7.dts
  18. 5
      boards/st/stm32l496g_disco/stm32l496g_disco.dts
  19. 5
      boards/vcc-gnd/yd_stm32h750vb/yd_stm32h750vb.dts
  20. 5
      boards/weact/mini_stm32h743/mini_stm32h743.dts
  21. 5
      samples/subsys/fs/littlefs/boards/nucleo_h743zi.overlay

19
boards/alientek/pandora_stm32l475/pandora_stm32l475.dts

@ -75,16 +75,17 @@ @@ -75,16 +75,17 @@
&quadspi_bk1_io0_pe12 &quadspi_bk1_io1_pe13
&quadspi_bk1_io2_pe14 &quadspi_bk1_io3_pe15>;
pinctrl-names = "default";
status = "okay";
w25q128jv: qspi-nor-flash@90000000 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(16)>; /* 128 Mbits */
qspi-max-frequency = <80000000>;
jedec-id = [ef 40 18];
spi-bus-width = <4>;
writeoc = "PP_1_1_4";
status = "okay";
w25q128jv: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
reg = <0>;
size = <DT_SIZE_M(128)>; /* 128 Mbits */
qspi-max-frequency = <80000000>;
jedec-id = [ef 40 18];
spi-bus-width = <4>;
writeoc = "PP_1_1_4";
status = "okay";
};
};

5
boards/arduino/giga_r1/arduino_giga_r1_stm32h747xx_m7.dts

@ -173,9 +173,10 @@ @@ -173,9 +173,10 @@
pinctrl-names = "default";
status = "okay";
n25q128a1: qspi-nor-flash@90000000 {
n25q128a1: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(16)>; /* 128 Mbits */
reg = <0>;
size = <DT_SIZE_M(128)>; /* 128 Mbits */
qspi-max-frequency = <72000000>;
status = "okay";

5
boards/arduino/nicla_vision/arduino_nicla_vision_stm32h747xx_m7.dts

@ -165,9 +165,10 @@ zephyr_i2c: &i2c1 { @@ -165,9 +165,10 @@ zephyr_i2c: &i2c1 {
pinctrl-names = "default";
status = "okay";
n25q128a1: qspi-nor-flash@90000000 {
n25q128a1: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(16)>; /* 128 Mbits */
reg = <0>;
size = <DT_SIZE_M(128)>; /* 128 Mbits */
qspi-max-frequency = <72000000>;
status = "okay";

5
boards/arduino/opta/arduino_opta_stm32h747xx_m7.dts

@ -133,9 +133,10 @@ zephyr_udc0: &usbotg_fs { @@ -133,9 +133,10 @@ zephyr_udc0: &usbotg_fs {
pinctrl-names = "default";
status = "okay";
at25sf128a: qspi-nor-flash@90000000 {
at25sf128a: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
reg = < 0x90000000 DT_SIZE_M(16) >; /* 128 MBits */
reg = <0>;
size = <DT_SIZE_M(128)>; /* 128 MBits */
qspi-max-frequency = <DT_FREQ_M(70)>;
status = "okay";
spi-bus-width = <2>;

5
boards/arduino/portenta_h7/arduino_portenta_h7-common.dtsi

@ -179,9 +179,10 @@ zephyr_i2c: &i2c1 { @@ -179,9 +179,10 @@ zephyr_i2c: &i2c1 {
pinctrl-names = "default";
status = "okay";
mx25l12833f: qspi-nor-flash@90000000 {
mx25l12833f: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
reg = < 0x90000000 DT_SIZE_M(16) >; /* 128 MBits */
reg = <0>;
size = <DT_SIZE_M(128)>; /* 128 Mbits */
qspi-max-frequency = < 40000000 >;
sfdp-bfp = [ e5 20 f1 ff ff ff ff 07 44 eb 08 6b 08 3b 04 bb
fe ff ff ff ff ff 00 ff ff ff 44 eb 0c 20 0f 52

5
boards/fanke/fk743m5_xih6/fk743m5_xih6.dts

@ -96,9 +96,10 @@ @@ -96,9 +96,10 @@
status = "okay";
/* Winbond external flash */
w25q64_qspi: qspi-nor-flash@90000000 {
w25q64_qspi: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(8)>; /* 64 Mbits */
reg = <0>;
size = <DT_SIZE_M(64)>; /* 64 Mbits */
qspi-max-frequency = <40000000>;
status = "okay";
spi-bus-width = <4>;

5
boards/fanke/fk750m1_vbt6/fk750m1_vbt6.dts

@ -118,9 +118,10 @@ @@ -118,9 +118,10 @@
status = "okay";
/* Winbond external flash */
w25q64_qspi: qspi-nor-flash@90000000 {
w25q64_qspi: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(64)>; /* 64 Mbits */
reg = <0>;
size = <DT_SIZE_M(64)>; /* 64 Mbits */
qspi-max-frequency = <40000000>;
status = "okay";
spi-bus-width = <4>;

6
boards/st/disco_l475_iot1/disco_l475_iot1.dts

@ -323,12 +323,12 @@ zephyr_udc0: &usbotg_fs { @@ -323,12 +323,12 @@ zephyr_udc0: &usbotg_fs {
pinctrl-names = "default";
dmas = <&dma1 5 5 0x0000>;
dma-names = "tx_rx";
status = "okay";
mx25r6435f: qspi-nor-flash@90000000 {
mx25r6435f: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(8)>; /* 64 Mbits */
reg = <0>;
size = <DT_SIZE_M(64)>; /* 64 Mbits */
qspi-max-frequency = <50000000>;
status = "okay";

5
boards/st/stm32f412g_disco/stm32f412g_disco.dts

@ -156,9 +156,10 @@ @@ -156,9 +156,10 @@
pinctrl-names = "default";
status = "okay";
n25q128a1: qspi-nor-flash@90000000 {
n25q128a1: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(16)>; /* 128 Mbits */
reg = <0>;
size = <DT_SIZE_M(128)>; /* 128 Mbits */
qspi-max-frequency = <72000000>;
status = "okay";
};

5
boards/st/stm32f723e_disco/stm32f723e_disco.dts

@ -127,9 +127,10 @@ @@ -127,9 +127,10 @@
flash-id = <1>;
status = "okay";
mx25r512: qspi-nor-flash@90000000 {
mx25r512: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
reg = <0>;
size = <DT_SIZE_M(512)>; /* 512 Mbits */
qspi-max-frequency = <8000000>;
status = "okay";
spi-bus-width = <4>;

5
boards/st/stm32f746g_disco/stm32f746g_disco.dts

@ -210,9 +210,10 @@ zephyr_udc0: &usbotg_fs { @@ -210,9 +210,10 @@ zephyr_udc0: &usbotg_fs {
pinctrl-names = "default";
status = "okay";
n25q128a1: qspi-nor-flash@90000000 {
n25q128a1: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(16)>; /* 128 Mbits */
reg = <0>;
size = <DT_SIZE_M(128)>; /* 128 Mbits */
qspi-max-frequency = <72000000>;
status = "okay";

5
boards/st/stm32f7508_dk/stm32f7508_dk.dts

@ -197,9 +197,10 @@ zephyr_udc0: &usbotg_fs { @@ -197,9 +197,10 @@ zephyr_udc0: &usbotg_fs {
pinctrl-names = "default";
status = "okay";
n25q128a1: qspi-nor-flash@90000000 {
n25q128a1: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(16)>; /* 128 Mbits */
reg = <0>;
size = <DT_SIZE_M(128)>; /* 128 Mbits */
qspi-max-frequency = <72000000>;
status = "okay";

5
boards/st/stm32f769i_disco/stm32f769i_disco.dts

@ -195,9 +195,10 @@ arduino_serial: &usart6 {}; @@ -195,9 +195,10 @@ arduino_serial: &usart6 {};
pinctrl-names = "default";
status = "okay";
mx25l51245g: qspi-nor-flash@90000000 {
mx25l51245g: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
reg = <0>;
size = <DT_SIZE_M(512)>; /* 512 Mbits */
qspi-max-frequency = <DT_FREQ_M(66)>;
status = "okay";

10
boards/st/stm32h745i_disco/stm32h745i_disco_stm32h745xx_m7.dts

@ -180,9 +180,10 @@ @@ -180,9 +180,10 @@
dual-flash;
status = "okay";
mt25ql512ab1: qspi-nor-flash-1@90000000 {
mt25ql512ab1: qspi-nor-flash-1@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
reg = <0>;
size = <DT_SIZE_M(512)>; /* 512 Mbits */
qspi-max-frequency = <72000000>;
spi-bus-width = <4>;
reset-cmd;
@ -199,9 +200,10 @@ @@ -199,9 +200,10 @@
};
};
mt25ql512ab2: qspi-nor-flash-2@90000000 {
mt25ql512ab2: qspi-nor-flash-2@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
reg = <0>;
size = <DT_SIZE_M(512)>; /* 512 Mbits */
qspi-max-frequency = <72000000>;
status = "okay";
};

10
boards/st/stm32h747i_disco/stm32h747i_disco_stm32h747xx_m7.dts

@ -253,9 +253,10 @@ zephyr_udc0: &usbotg_hs { @@ -253,9 +253,10 @@ zephyr_udc0: &usbotg_hs {
dual-flash;
status = "okay";
mt25ql512ab1: qspi-nor-flash-1@90000000 {
mt25ql512ab1: qspi-nor-flash-1@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
reg = <0>;
size = <DT_SIZE_M(512)>; /* 512 Mbits */
qspi-max-frequency = <72000000>;
spi-bus-width = <4>;
reset-cmd;
@ -272,9 +273,10 @@ zephyr_udc0: &usbotg_hs { @@ -272,9 +273,10 @@ zephyr_udc0: &usbotg_hs {
};
};
mt25ql512ab2: qspi-nor-flash-2@90000000 {
mt25ql512ab2: qspi-nor-flash-2@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
reg = <0>;
size = <DT_SIZE_M(512)>; /* 512 Mbits */
qspi-max-frequency = <72000000>;
status = "okay";
};

10
boards/st/stm32h750b_dk/stm32h750b_dk.dts

@ -187,9 +187,10 @@ @@ -187,9 +187,10 @@
/* Sector erase 64KB uniform granularity */
/* Subsector erase 4KB, 32KB granularity */
mt25ql512ab1: qspi-nor-flash-1@90000000 {
mt25ql512ab1: qspi-nor-flash-1@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
reg = <0>;
size = <DT_SIZE_M(512)>; /* 512 Mbits */
qspi-max-frequency = <72000000>;
spi-bus-width = <4>;
reset-cmd;
@ -217,9 +218,10 @@ @@ -217,9 +218,10 @@
};
};
mt25ql512ab2: qspi-nor-flash-2@90000000 {
mt25ql512ab2: qspi-nor-flash-2@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
reg = <0>;
size = <DT_SIZE_M(512)>; /* 512 Mbits */
qspi-max-frequency = <72000000>;
status = "okay";
};

10
boards/st/stm32h757i_eval/stm32h757i_eval_stm32h757xx_m7.dts

@ -268,9 +268,10 @@ zephyr_udc0: &usbotg_hs { @@ -268,9 +268,10 @@ zephyr_udc0: &usbotg_hs {
dual-flash;
status = "okay";
mt25ql512ab1: qspi-nor-flash-1@90000000 {
mt25ql512ab1: qspi-nor-flash-1@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
reg = <0>;
size = <DT_SIZE_M(512)>; /* 512 Mbits */
qspi-max-frequency = <72000000>;
spi-bus-width = <4>;
reset-cmd;
@ -287,9 +288,10 @@ zephyr_udc0: &usbotg_hs { @@ -287,9 +288,10 @@ zephyr_udc0: &usbotg_hs {
};
};
mt25ql512ab2: qspi-nor-flash-2@90000000 {
mt25ql512ab2: qspi-nor-flash-2@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
reg = <0>;
size = <DT_SIZE_M(512)>; /* 512 Mbits */
qspi-max-frequency = <72000000>;
status = "okay";
};

5
boards/st/stm32l496g_disco/stm32l496g_disco.dts

@ -206,9 +206,10 @@ zephyr_udc0: &usbotg_fs { @@ -206,9 +206,10 @@ zephyr_udc0: &usbotg_fs {
flash-id = <1>;
status = "okay";
mx25r6435: qspi-nor-flash@90000000 {
mx25r6435: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(8)>; /* 64 Mbits */
reg = <0>;
size = <DT_SIZE_M(64)>; /* 64 Mbits */
qspi-max-frequency = <8000000>;
status = "okay";
spi-bus-width = <4>;

5
boards/vcc-gnd/yd_stm32h750vb/yd_stm32h750vb.dts

@ -114,9 +114,10 @@ @@ -114,9 +114,10 @@
&quadspi_bk1_io2_pe2 &quadspi_bk1_io3_pd13>;
status = "okay";
w25q128jv: qspi-nor-flash@90000000 {
w25q128jv: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(16)>;
reg = <0>;
size = <DT_SIZE_M(128)>; /* 128 Mbits */
qspi-max-frequency = <80000000>;
spi-bus-width = <4>;
status = "okay";

5
boards/weact/mini_stm32h743/mini_stm32h743.dts

@ -166,9 +166,10 @@ zephyr_udc0: &usbotg_fs { @@ -166,9 +166,10 @@ zephyr_udc0: &usbotg_fs {
flash-id = <1>;
status = "okay";
w25q64_qspi: qspi-nor-flash@90000000 {
w25q64_qspi: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(8)>; /* 64 Mbits */
reg = <0>;
size = <DT_SIZE_M(64)>; /* 64 Mbits */
qspi-max-frequency = <40000000>;
status = "okay";
spi-bus-width = <4>;

5
samples/subsys/fs/littlefs/boards/nucleo_h743zi.overlay

@ -42,9 +42,10 @@ @@ -42,9 +42,10 @@
flash-id = <2>;
status = "okay";
mx25l25645g: qspi-nor-flash@90000000 {
mx25l25645g: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(32)>; /* 256 Mbits */
reg = <0>;
size = <DT_SIZE_M(256)>; /* 256 Mbits */
qspi-max-frequency = <50000000>;
reset-gpios = <&gpiod 3 GPIO_ACTIVE_LOW>;
reset-gpios-duration = <1>;

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