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Add configuration and feedback implementation necessary to run UAC2 samples on nRF54H20. Limit nRF54H20 to Full-Speed only operation because the samples currently don't have necessary logic to support High-Speed. Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>pull/91613/merge
11 changed files with 253 additions and 21 deletions
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# Enable timer for asynchronous feedback |
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CONFIG_NRFX_GPPI=y |
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CONFIG_NRFX_TIMER131=y |
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CONFIG_NRFX_GPIOTE130=y |
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# Sample is Full-Speed only, prevent High-Speed enumeration |
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CONFIG_UDC_DRIVER_HIGH_SPEED_SUPPORT_ENABLED=n |
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CONFIG_USBD_MAX_SPEED_FULL=y |
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/* |
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* Copyright (c) 2025 Nordic Semiconductor ASA |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#include "../app.overlay" |
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&pinctrl { |
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tdm130_default_alt: tdm130_default_alt { |
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group1 { |
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psels = <NRF_PSEL(TDM_SCK_M, 1, 3)>, |
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<NRF_PSEL(TDM_FSYNC_M, 1, 6)>, |
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<NRF_PSEL(TDM_SDOUT, 1, 4)>; |
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}; |
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}; |
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}; |
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i2s_tx: &tdm130 { |
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status = "okay"; |
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pinctrl-0 = <&tdm130_default_alt>; |
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pinctrl-names = "default"; |
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memory-regions = <&cpuapp_dma_region>; |
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mck-clock-source = "ACLK"; |
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sck-clock-source = "ACLK"; |
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}; |
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&audiopll { |
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frequency = <NRFS_AUDIOPLL_FREQ_AUDIO_48K>; |
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status = "okay"; |
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}; |
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&cpuapp_dma_region { |
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status = "okay"; |
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}; |
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/* PPI channel 0 for TDM130 MAXCNT */ |
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&dppic132 { |
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compatible = "nordic,nrf-dppic-global"; |
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owned-channels = <0>; |
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source-channels = <0>; |
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nonsecure-channels = <0>; |
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status = "okay"; |
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}; |
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/* PPI channel 1 for GPIOTE used for feedback in edge counter mode */ |
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&gpiote130 { |
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status = "okay"; |
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owned-channels = <1>; |
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}; |
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/* GPIOTE130 and TDM130 PPI needs routing to TIMER131 through main APB */ |
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&dppic130 { |
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compatible = "nordic,nrf-dppic-global"; |
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owned-channels = <0 1>; |
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sink-channels = <0 1>; |
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source-channels = <0 1>; |
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nonsecure-channels = <0 1>; |
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status = "okay"; |
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}; |
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/* TIMER131 PPI channel 2 is used for SOF */ |
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&dppic133 { |
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compatible = "nordic,nrf-dppic-global"; |
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owned-channels = <0 1 2>; |
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sink-channels = <0 1 2>; |
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status = "okay"; |
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}; |
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&timer131 { |
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status = "okay"; |
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}; |
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# Enable timer for asynchronous feedback |
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CONFIG_NRFX_GPPI=y |
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CONFIG_NRFX_TIMER131=y |
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# Sample is Full-Speed only, prevent High-Speed enumeration |
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CONFIG_UDC_DRIVER_HIGH_SPEED_SUPPORT_ENABLED=n |
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CONFIG_USBD_MAX_SPEED_FULL=y |
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/* |
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* Copyright (c) 2025 Nordic Semiconductor ASA |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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*/ |
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#include "../app.overlay" |
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&pinctrl { |
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tdm130_default_alt: tdm130_default_alt { |
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group1 { |
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psels = <NRF_PSEL(TDM_SCK_M, 1, 3)>, |
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<NRF_PSEL(TDM_FSYNC_M, 1, 6)>, |
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<NRF_PSEL(TDM_SDOUT, 1, 4)>, |
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<NRF_PSEL(TDM_SDIN, 1, 5)>; |
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}; |
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}; |
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}; |
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i2s_rxtx: &tdm130 { |
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status = "okay"; |
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pinctrl-0 = <&tdm130_default_alt>; |
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pinctrl-names = "default"; |
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memory-regions = <&cpuapp_dma_region>; |
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mck-clock-source = "ACLK"; |
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sck-clock-source = "ACLK"; |
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}; |
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&audiopll { |
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frequency = <NRFS_AUDIOPLL_FREQ_AUDIO_48K>; |
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status = "okay"; |
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}; |
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&cpuapp_dma_region { |
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status = "okay"; |
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}; |
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/* PPI channel 0 for TDM130 MAXCNT */ |
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&dppic132 { |
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compatible = "nordic,nrf-dppic-global"; |
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owned-channels = <0>; |
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source-channels = <0>; |
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nonsecure-channels = <0>; |
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status = "okay"; |
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}; |
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/* TDM130 PPI needs routing to TIMER131 through main APB */ |
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&dppic130 { |
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compatible = "nordic,nrf-dppic-global"; |
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owned-channels = <0>; |
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sink-channels = <0>; |
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source-channels = <0>; |
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nonsecure-channels = <0>; |
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status = "okay"; |
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}; |
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/* TIMER131 PPI channel 1 is used for SOF */ |
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&dppic133 { |
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compatible = "nordic,nrf-dppic-global"; |
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owned-channels = <0 1>; |
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sink-channels = <0 1>; |
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status = "okay"; |
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}; |
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&timer131 { |
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status = "okay"; |
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}; |
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