Browse Source
Ports the designstart SoC configuration to hardware model version 2 Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>pull/69687/head
13 changed files with 35 additions and 75 deletions
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# SPDX-License-Identifier: Apache-2.0 |
# SPDX-License-Identifier: Apache-2.0 |
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zephyr_include_directories(.) |
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set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "") |
set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "") |
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# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk> |
# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk> |
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# SPDX-License-Identifier: Apache-2.0 |
# SPDX-License-Identifier: Apache-2.0 |
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choice |
config SOC_SERIES_ARM_DESIGNSTART |
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prompt "ARM DesignStart SoCs" |
select ARM |
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depends on SOC_SERIES_ARM_DESIGNSTART |
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config SOC_ARM_DESIGNSTART_FPGA_CORTEX_M1 |
config SOC_ARM_DESIGNSTART_FPGA_CORTEX_M1 |
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bool "ARM Cortex-M1 DesignStart FPGA" |
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select CPU_CORTEX_M1 |
select CPU_CORTEX_M1 |
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imply XIP |
imply XIP |
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select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE |
select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE |
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config SOC_ARM_DESIGNSTART_FPGA_CORTEX_M3 |
config SOC_ARM_DESIGNSTART_FPGA_CORTEX_M3 |
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bool "ARM Cortex-M3 DesignStart FPGA" |
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select CPU_CORTEX_M3 |
select CPU_CORTEX_M3 |
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imply XIP |
imply XIP |
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select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE |
select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE |
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endchoice |
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# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk> |
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# SPDX-License-Identifier: Apache-2.0 |
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config SOC_SERIES_ARM_DESIGNSTART |
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bool |
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select SOC_FAMILY_ARM |
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help |
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ARM DesignStart SoC Series |
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config SOC_ARM_DESIGNSTART_FPGA_CORTEX_M1 |
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bool |
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select SOC_SERIES_ARM_DESIGNSTART |
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help |
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ARM Cortex-M1 DesignStart FPGA |
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config SOC_ARM_DESIGNSTART_FPGA_CORTEX_M3 |
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bool |
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select SOC_SERIES_ARM_DESIGNSTART |
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help |
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ARM Cortex-M3 DesignStart FPGA |
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config SOC_SERIES |
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default "designstart" if SOC_SERIES_ARM_DESIGNSTART |
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config SOC |
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default "designstart_fpga_cortex_m1" if SOC_ARM_DESIGNSTART_FPGA_CORTEX_M1 |
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default "designstart_fpga_cortex_m3" if SOC_ARM_DESIGNSTART_FPGA_CORTEX_M3 |
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# SPDX-License-Identifier: Apache-2.0 |
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add_subdirectory(${SOC_SERIES}) |
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# ARM LTD SoC configuration options |
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# Copyright (c) 2016 Linaro Limited |
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# SPDX-License-Identifier: Apache-2.0 |
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config SOC_FAMILY_ARM |
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bool |
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if SOC_FAMILY_ARM |
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config SOC_FAMILY |
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string |
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default "arm" |
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source "soc/soc_legacy/arm/arm/*/Kconfig.soc" |
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endif # SOC_FAMILY_ARM |
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# ARM LTD SoC configuration options |
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# Copyright (c) 2016 Linaro Limited |
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# SPDX-License-Identifier: Apache-2.0 |
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source "soc/soc_legacy/arm/arm/*/Kconfig.defconfig.series" |
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# ARM LTD SoC configuration options |
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# Copyright (c) 2016 Linaro Limited |
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# SPDX-License-Identifier: Apache-2.0 |
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source "soc/soc_legacy/arm/arm/*/Kconfig.series" |
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# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk> |
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# SPDX-License-Identifier: Apache-2.0 |
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if SOC_ARM_DESIGNSTART_FPGA_CORTEX_M1 |
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config SOC |
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default "designstart_cortex_m1" |
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endif # SOC_ARM_DESIGNSTART_FPGA_CORTEX_M1 |
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# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk> |
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# SPDX-License-Identifier: Apache-2.0 |
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if SOC_ARM_DESIGNSTART_FPGA_CORTEX_M3 |
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config SOC |
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default "designstart_cortex_m3" |
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endif # SOC_ARM_DESIGNSTART_FPGA_CORTEX_M3 |
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# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk> |
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# SPDX-License-Identifier: Apache-2.0 |
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if SOC_SERIES_ARM_DESIGNSTART |
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config SOC_SERIES |
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default "designstart" |
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source "soc/soc_legacy/arm/arm/designstart/Kconfig.defconfig.cortex*" |
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endif # SOC_SERIES_ARM_DESIGNSTART |
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# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk> |
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# SPDX-License-Identifier: Apache-2.0 |
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config SOC_SERIES_ARM_DESIGNSTART |
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bool "Arm DesignStart SoC Series" |
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select ARM |
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select SOC_FAMILY_ARM |
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help |
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Enable support for the ARM DesignStart SoC Series |
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