drivers: i2s: esp32: add support for non-gdma SoCs

Adds support for:
- esp32
- esp32s2

Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>

drivers/i2s/Kconfig.esp32

@@ -6,8 +6,7 @@ config I2S_ESP32
 	bool "ESP32 I2S driver"
 	default y
 	depends on DT_HAS_ESPRESSIF_ESP32_I2S_ENABLED
-	depends on DT_HAS_ESPRESSIF_ESP32_GDMA_ENABLED
-	select DMA
+	select DMA if DT_HAS_ESPRESSIF_ESP32_GDMA_ENABLED
 	help
 	  Enables the ESP32 I2S driver (GDMA SoCs only).
 
@@ -25,4 +24,11 @@ config I2S_ESP32_TX_BLOCK_COUNT
 	help
 	  Max number of blocks waiting to be transmitted by the I2S TX channel.
 
+config I2S_ESP32_DMA_DESC_NUM_MAX
+	int "ESP32 I2S number of link descriptors"
+	default 10
+	depends on !DT_HAS_ESPRESSIF_ESP32_GDMA_ENABLED
+	help
+	  Max number of link descriptor available for DMA transfers on each I2S channel
+
 endif

dts/bindings/i2s/espressif,esp32-i2s.yaml

@@ -23,12 +23,6 @@ properties:
   interrupt-parent:
     required: true
 
-  dmas:
-    required: true
-
-  dma-names:
-    required: true
-
   unit:
     type: int
     required: true

dts/xtensa/espressif/esp32/esp32_common.dtsi

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2019 Intel Corporation.
+ * Copyright (c) 2025 Espressif Systems (Shanghai) Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -359,6 +360,34 @@
 			status = "disabled";
 		};
 
+		i2s0: i2s@3ff4f000 {
+			compatible = "espressif,esp32-i2s";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x3ff4f000 0x1000>;
+			interrupts = <I2S0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>,
+				     <I2S0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
+			interrupt-names = "rx", "tx";
+			interrupt-parent = <&intc>;
+			clocks = <&rtc ESP32_I2S0_MODULE>;
+			unit = <0>;
+			status = "disabled";
+		};
+
+		i2s1: i2s@3ff6d000 {
+			compatible = "espressif,esp32-i2s";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x3ff6d000 0x1000>;
+			interrupts = <I2S1_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>,
+				     <I2S1_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
+			interrupt-names = "rx", "tx";
+			interrupt-parent = <&intc>;
+			clocks = <&rtc ESP32_I2S1_MODULE>;
+			unit = <1>;
+			status = "disabled";
+		};
+
 		trng0: trng@3ff75144 {
 			compatible = "espressif,esp32-trng";
 			reg = <0x3FF75144 0x4>;

dts/xtensa/espressif/esp32s2/esp32s2_common.dtsi

@@ -257,6 +257,20 @@
 			status = "disabled";
 		};
 
+		i2s0: i2s@3f40f000 {
+			compatible = "espressif,esp32-i2s";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x3f40f000 0x1000>;
+			interrupts = <I2S0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>,
+				     <I2S0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
+			interrupt-names = "rx", "tx";
+			interrupt-parent = <&intc>;
+			clocks = <&rtc ESP32_I2S0_MODULE>;
+			unit = <0>;
+			status = "disabled";
+		};
+
 		timer0: counter@3f41f000 {
 			compatible = "espressif,esp32-timer";
 			reg = <0x3f41f000 DT_SIZE_K(4)>;