@ -38,8 +38,8 @@ LOG_MODULE_REGISTER(video_emul_imager, CONFIG_VIDEO_LOG_LEVEL);
@@ -38,8 +38,8 @@ LOG_MODULE_REGISTER(video_emul_imager, CONFIG_VIDEO_LOG_LEVEL);
uint8_t emul_imager_fake_regs [ 10 ] ;
enum emul_imager_fmt_id {
RGB565_64x2 0 ,
YUYV_64x2 0 ,
RGB565_320x24 0 ,
YUYV_320x24 0 ,
} ;
struct emul_imager_reg {
@ -62,8 +62,8 @@ struct emul_imager_config {
@@ -62,8 +62,8 @@ struct emul_imager_config {
} ;
struct emul_imager_data {
/* First field is a frame buffer for I/O emulation purpose */
uint8_t framebuffer [ CONFIG_VIDEO_EMUL_IMAGER_FRAMEBUFFER_SIZE ] ;
/* First field is a line buffer for I/O emulation purpose */
uint8_t framebuffer [ 320 * sizeof ( uint16_t ) ] ;
/* Other fields are shared with real hardware drivers */
const struct emul_imager_mode * mode ;
enum emul_imager_fmt_id fmt_id ;
@ -83,46 +83,46 @@ static const struct emul_imager_reg emul_imager_init_regs[] = {
@@ -83,46 +83,46 @@ static const struct emul_imager_reg emul_imager_init_regs[] = {
* to set the timing parameters and other mode - dependent configuration .
*/
static const struct emul_imager_reg emul_imager_rgb565_64x2 0 [ ] = {
{ EMUL_IMAGER_REG_TIMING1 , 0x64 } ,
{ EMUL_IMAGER_REG_TIMING2 , 0x20 } ,
static const struct emul_imager_reg emul_imager_rgb565_320x24 0 [ ] = {
{ EMUL_IMAGER_REG_TIMING1 , 0x32 } ,
{ EMUL_IMAGER_REG_TIMING2 , 0x24 } ,
{ 0 } ,
} ;
static const struct emul_imager_reg emul_imager_rgb565_64x2 0_15fps [ ] = {
static const struct emul_imager_reg emul_imager_rgb565_320x24 0_15fps [ ] = {
{ EMUL_IMAGER_REG_TIMING3 , 15 } ,
{ 0 } ,
} ;
static const struct emul_imager_reg emul_imager_rgb565_64x2 0_30fps [ ] = {
static const struct emul_imager_reg emul_imager_rgb565_320x24 0_30fps [ ] = {
{ EMUL_IMAGER_REG_TIMING3 , 30 } ,
{ 0 } ,
} ;
static const struct emul_imager_reg emul_imager_rgb565_64x2 0_60fps [ ] = {
static const struct emul_imager_reg emul_imager_rgb565_320x24 0_60fps [ ] = {
{ EMUL_IMAGER_REG_TIMING3 , 60 } ,
{ 0 } ,
} ;
struct emul_imager_mode emul_imager_rgb565_64x2 0_modes [ ] = {
{ . fps = 15 , . regs = { emul_imager_rgb565_64x20 , emul_imager_rgb565_64x2 0_15fps } } ,
{ . fps = 30 , . regs = { emul_imager_rgb565_64x20 , emul_imager_rgb565_64x2 0_30fps } } ,
{ . fps = 60 , . regs = { emul_imager_rgb565_64x20 , emul_imager_rgb565_64x2 0_60fps } } ,
struct emul_imager_mode emul_imager_rgb565_320x24 0_modes [ ] = {
{ . fps = 15 , . regs = { emul_imager_rgb565_320x240 , emul_imager_rgb565_320x24 0_15fps } } ,
{ . fps = 30 , . regs = { emul_imager_rgb565_320x240 , emul_imager_rgb565_320x24 0_30fps } } ,
{ . fps = 60 , . regs = { emul_imager_rgb565_320x240 , emul_imager_rgb565_320x24 0_60fps } } ,
{ 0 } ,
} ;
static const struct emul_imager_reg emul_imager_yuyv_64x2 0 [ ] = {
{ EMUL_IMAGER_REG_TIMING1 , 0x64 } ,
{ EMUL_IMAGER_REG_TIMING2 , 0x20 } ,
static const struct emul_imager_reg emul_imager_yuyv_320x24 0 [ ] = {
{ EMUL_IMAGER_REG_TIMING1 , 0x32 } ,
{ EMUL_IMAGER_REG_TIMING2 , 0x24 } ,
{ 0 } ,
} ;
static const struct emul_imager_reg emul_imager_yuyv_64x2 0_15fps [ ] = {
static const struct emul_imager_reg emul_imager_yuyv_320x24 0_15fps [ ] = {
{ EMUL_IMAGER_REG_TIMING3 , 15 } ,
{ 0 } ,
} ;
static const struct emul_imager_reg emul_imager_yuyv_64x2 0_30fps [ ] = {
static const struct emul_imager_reg emul_imager_yuyv_320x24 0_30fps [ ] = {
{ EMUL_IMAGER_REG_TIMING3 , 30 } ,
{ 0 } ,
} ;
struct emul_imager_mode emul_imager_yuyv_64x2 0_modes [ ] = {
{ . fps = 15 , . regs = { emul_imager_yuyv_64x20 , emul_imager_yuyv_64x2 0_15fps } } ,
{ . fps = 30 , . regs = { emul_imager_yuyv_64x20 , emul_imager_yuyv_64x2 0_30fps } } ,
struct emul_imager_mode emul_imager_yuyv_320x24 0_modes [ ] = {
{ . fps = 15 , . regs = { emul_imager_yuyv_320x240 , emul_imager_yuyv_320x24 0_15fps } } ,
{ . fps = 30 , . regs = { emul_imager_yuyv_320x240 , emul_imager_yuyv_320x24 0_30fps } } ,
{ 0 } ,
} ;
@ -130,26 +130,27 @@ struct emul_imager_mode emul_imager_yuyv_64x20_modes[] = {
@@ -130,26 +130,27 @@ struct emul_imager_mode emul_imager_yuyv_64x20_modes[] = {
* index , matching fmts [ ] .
*/
static const struct emul_imager_mode * emul_imager_modes [ ] = {
[ RGB565_64x20 ] = emul_imager_rgb565_64x2 0_modes ,
[ YUYV_64x20 ] = emul_imager_yuyv_64x2 0_modes ,
[ RGB565_320x240 ] = emul_imager_rgb565_320x24 0_modes ,
[ YUYV_320x240 ] = emul_imager_yuyv_320x24 0_modes ,
} ;
/* Video device capabilities where the supported resolutions and pixel formats are listed.
* The format ID is used as index to fetch the matching mode from the list above .
*/
# define EMUL_IMAGER_VIDEO_FORMAT_CAP(width, height, forma t) \
# define EMUL_IMAGER_VIDEO_FORMAT_CAP(format, width, height) \
{ \
/* For a real imager, the width and height would be macro parameters */ \
. pixelformat = ( format ) , \
. width_min = ( width ) , \
. width_max = ( width ) , \
. width_step = 0 , \
. height_min = ( height ) , \
. height_max = ( height ) , \
. width_step = 0 , \
. height_step = 0 , \
}
static const struct video_format_cap fmts [ ] = {
[ RGB565_64x2 0 ] = EMUL_IMAGER_VIDEO_FORMAT_CAP ( 64 , 20 , VIDEO_PIX_FMT_RGB565 ) ,
[ YUYV_64x2 0 ] = EMUL_IMAGER_VIDEO_FORMAT_CAP ( 64 , 20 , VIDEO_PIX_FMT_YUYV ) ,
[ RGB565_320x24 0 ] = EMUL_IMAGER_VIDEO_FORMAT_CAP ( VIDEO_PIX_FMT_RGB565 , 320 , 240 ) ,
[ YUYV_320x24 0 ] = EMUL_IMAGER_VIDEO_FORMAT_CAP ( VIDEO_PIX_FMT_YUYV , 320 , 240 ) ,
{ 0 } ,
} ;
@ -351,10 +352,7 @@ static void emul_imager_fill_framebuffer(const struct device *const dev, struct
@@ -351,10 +352,7 @@ static void emul_imager_fill_framebuffer(const struct device *const dev, struct
memset ( fb16 , 0 , fmt - > pitch ) ;
}
/* Duplicate the first row over the whole frame */
for ( size_t i = 1 ; i < fmt - > height ; i + + ) {
memcpy ( data - > framebuffer + fmt - > pitch * i , data - > framebuffer , fmt - > pitch ) ;
}
/* Note: The framebuffer only contains a single row of data */
}
static int emul_imager_set_fmt ( const struct device * const dev , enum video_endpoint_id ep ,
@ -368,13 +366,6 @@ static int emul_imager_set_fmt(const struct device *const dev, enum video_endpoi
@@ -368,13 +366,6 @@ static int emul_imager_set_fmt(const struct device *const dev, enum video_endpoi
return - EINVAL ;
}
if ( fmt - > pitch * fmt - > height > CONFIG_VIDEO_EMUL_IMAGER_FRAMEBUFFER_SIZE ) {
LOG_ERR ( " %s has %u bytes of memory, unable to support %x %ux%u (%u bytes) " ,
dev - > name , CONFIG_VIDEO_EMUL_IMAGER_FRAMEBUFFER_SIZE , fmt - > pixelformat ,
fmt - > width , fmt - > height , fmt - > pitch * fmt - > height ) ;
return - ENOMEM ;
}
if ( memcmp ( & data - > fmt , fmt , sizeof ( data - > fmt ) ) = = 0 ) {
return 0 ;
}