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drivers: clock_control: stm32: clear mask bits before setting them 

Without this, setting a value of 0 leaves the bits unchanged rather than
zeroing them.

Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
pull/56331/head
Armin Brauns 2 years ago committed by Fabio Baltieri
parent
89751f31c9
commit
a40c5f9918
3 changed files with 6 additions and 0 deletions
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  1. 2
      drivers/clock_control/clock_stm32_ll_common.c
  2. 2
      drivers/clock_control/clock_stm32_ll_h7.c
  3. 2
      drivers/clock_control/clock_stm32_ll_u5.c

2
drivers/clock_control/clock_stm32_ll_common.c
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@ -253,6 +253,8 @@ static inline int stm32_clock_control_configure(const struct device *dev,
return 0; return 0;
} }
sys_clear_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + STM32_CLOCK_REG_GET(pclken->enr),
STM32_CLOCK_MASK_GET(pclken->enr) << STM32_CLOCK_SHIFT_GET(pclken->enr));
sys_set_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + STM32_CLOCK_REG_GET(pclken->enr), sys_set_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + STM32_CLOCK_REG_GET(pclken->enr),
STM32_CLOCK_VAL_GET(pclken->enr) << STM32_CLOCK_SHIFT_GET(pclken->enr)); STM32_CLOCK_VAL_GET(pclken->enr) << STM32_CLOCK_SHIFT_GET(pclken->enr));

2
drivers/clock_control/clock_stm32_ll_h7.c
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@ -414,6 +414,8 @@ static inline int stm32_clock_control_configure(const struct device *dev,
z_stm32_hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_DEFAULT_RETRY); z_stm32_hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_DEFAULT_RETRY);
sys_clear_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + STM32_CLOCK_REG_GET(pclken->enr),
STM32_CLOCK_MASK_GET(pclken->enr) << STM32_CLOCK_SHIFT_GET(pclken->enr));
sys_set_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + STM32_CLOCK_REG_GET(pclken->enr), sys_set_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + STM32_CLOCK_REG_GET(pclken->enr),
STM32_CLOCK_VAL_GET(pclken->enr) << STM32_CLOCK_SHIFT_GET(pclken->enr)); STM32_CLOCK_VAL_GET(pclken->enr) << STM32_CLOCK_SHIFT_GET(pclken->enr));

2
drivers/clock_control/clock_stm32_ll_u5.c
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@ -194,6 +194,8 @@ static inline int stm32_clock_control_configure(const struct device *dev,
return err; return err;
} }
sys_clear_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + STM32_CLOCK_REG_GET(pclken->enr),
STM32_CLOCK_MASK_GET(pclken->enr) << STM32_CLOCK_SHIFT_GET(pclken->enr));
sys_set_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + STM32_CLOCK_REG_GET(pclken->enr), sys_set_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + STM32_CLOCK_REG_GET(pclken->enr),
STM32_CLOCK_VAL_GET(pclken->enr) << STM32_CLOCK_SHIFT_GET(pclken->enr)); STM32_CLOCK_VAL_GET(pclken->enr) << STM32_CLOCK_SHIFT_GET(pclken->enr));

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